drivers: pwm: Add shim for nrfx PWM HW driver
Adds a translation layer to make the nrfx driver for nrf52 PWM peripheral accessible via the Zephyr's API. Signed-off-by: Justin DeMartino <jdemarti@gmail.com>
This commit is contained in:
Justin DeMartino
Carles Cufí
parent
7a7e4f5832
commit
cfc18f2102
7 changed files with 555 additions and 18 deletions
232
drivers/pwm/pwm_nrfx.c
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232
drivers/pwm/pwm_nrfx.c
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/*
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* Copyright (c) 2018, Cue Health Inc
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <nrfx_pwm.h>
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#include <pwm.h>
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#define SYS_LOG_DOMAIN "pwm_nrfx"
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#define SYS_LOG_LEVEL CONFIG_SYS_LOG_PWM_LEVEL
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#include <logging/sys_log.h>
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#define PWM_NRFX_CH_VALUE_NORMAL (1UL << 15)
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#define PWM_NRFX_CH_VALUE_INVERTED (0)
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struct pwm_nrfx_config {
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nrfx_pwm_t pwm;
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nrfx_pwm_config_t config;
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nrf_pwm_sequence_t seq;
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};
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struct pwm_nrfx_data {
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u16_t current[NRF_PWM_CHANNEL_COUNT];
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u16_t top_value;
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};
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static int pwm_nrfx_pin_set(struct device *dev, u32_t pwm,
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u32_t period_cycles, u32_t pulse_cycles)
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{
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const struct pwm_nrfx_config *pconfig = dev->config->config_info;
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struct pwm_nrfx_data *pdata = dev->driver_data;
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if (pwm >= NRF_PWM_CHANNEL_COUNT) {
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return -EINVAL;
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}
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if (period_cycles != pdata->top_value) {
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if (period_cycles > PWM_COUNTERTOP_COUNTERTOP_Msk) {
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return -EINVAL;
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}
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pdata->top_value = period_cycles;
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nrf_pwm_configure(pconfig->pwm.p_registers,
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pconfig->config.base_clock,
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pconfig->config.count_mode,
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pdata->top_value);
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}
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if (pulse_cycles > pdata->top_value) {
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return -EINVAL;
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}
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/* Modify only the COMPARE bits while preserving the POLARITY
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* bit that controls the inversion of the channel.
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* For more details see product specification.
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*/
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pdata->current[pwm] = ((pdata->current[pwm]
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& ~PWM_COUNTERTOP_COUNTERTOP_Msk)
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| pulse_cycles);
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return 0;
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}
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static int pwm_nrfx_get_cycles_per_sec(struct device *dev, u32_t pwm,
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u64_t *cycles)
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{
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const struct pwm_nrfx_config *pconfig = dev->config->config_info;
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switch (pconfig->config.base_clock) {
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case NRF_PWM_CLK_16MHz:
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*cycles = 16ul * 1000ul * 1000ul;
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break;
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case NRF_PWM_CLK_8MHz:
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*cycles = 8ul * 1000ul * 1000ul;
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break;
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case NRF_PWM_CLK_4MHz:
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*cycles = 4ul * 1000ul * 1000ul;
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break;
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case NRF_PWM_CLK_2MHz:
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*cycles = 2ul * 1000ul * 1000ul;
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break;
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case NRF_PWM_CLK_1MHz:
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*cycles = 1ul * 1000ul * 1000ul;
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break;
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case NRF_PWM_CLK_500kHz:
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*cycles = 500ul * 1000ul;
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break;
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case NRF_PWM_CLK_250kHz:
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*cycles = 250ul * 1000ul;
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break;
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case NRF_PWM_CLK_125kHz:
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*cycles = 125ul * 1000ul;
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break;
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}
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return 0;
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}
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static const struct pwm_driver_api pwm_nrfx_drv_api_funcs = {
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.pin_set = pwm_nrfx_pin_set,
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.get_cycles_per_sec = pwm_nrfx_get_cycles_per_sec,
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};
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static int pwm_nrfx_init(struct device *dev)
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{
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const struct pwm_nrfx_config *pconfig = dev->config->config_info;
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nrfx_err_t result = nrfx_pwm_init(&pconfig->pwm, &pconfig->config,
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NULL);
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if (result != NRFX_SUCCESS) {
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SYS_LOG_ERR("Failed to initialize device: %s",
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dev->config->name);
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return -EBUSY;
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}
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nrfx_pwm_simple_playback(&pconfig->pwm,
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&pconfig->seq,
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1,
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NRFX_PWM_FLAG_LOOP);
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return 0;
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}
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#define PWM_NRFX_OUTPUT_PIN(dev_idx, ch_idx) \
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(CONFIG_PWM_##dev_idx##_NRF_CH##ch_idx##_PIN | \
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(CONFIG_PWM_##dev_idx##_NRF_CH##ch_idx##_INVERTED ? \
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NRFX_PWM_PIN_INVERTED : 0))
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#define PWM_NRFX_DEFAULT_VALUE(dev_idx, ch_idx) \
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(CONFIG_PWM_##dev_idx##_NRF_CH##ch_idx##_INVERTED ? \
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PWM_NRFX_CH_VALUE_INVERTED : PWM_NRFX_CH_VALUE_NORMAL)
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#define PWM_NRFX_DEVICE(idx) \
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static struct pwm_nrfx_data pwm_nrfx_##idx##_data = { \
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.current = { \
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PWM_NRFX_DEFAULT_VALUE(idx, 0), \
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PWM_NRFX_DEFAULT_VALUE(idx, 1), \
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PWM_NRFX_DEFAULT_VALUE(idx, 2), \
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PWM_NRFX_DEFAULT_VALUE(idx, 3), \
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}, \
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.top_value = NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE \
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}; \
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static const struct pwm_nrfx_config pwm_nrfx_##idx##_config = { \
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.pwm = NRFX_PWM_INSTANCE(idx), \
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.config = { \
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.output_pins = { \
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PWM_NRFX_OUTPUT_PIN(idx, 0), \
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PWM_NRFX_OUTPUT_PIN(idx, 1), \
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PWM_NRFX_OUTPUT_PIN(idx, 2), \
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PWM_NRFX_OUTPUT_PIN(idx, 3), \
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}, \
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.base_clock = (nrf_pwm_clk_t) \
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CONFIG_PWM_##idx##_NRF_CLOCK_PRESCALER, \
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.count_mode = NRF_PWM_MODE_UP, \
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.top_value = NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE, \
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.load_mode = NRF_PWM_LOAD_INDIVIDUAL, \
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.step_mode = NRF_PWM_STEP_TRIGGERED, \
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}, \
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.seq.values.p_raw = pwm_nrfx_##idx##_data.current, \
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.seq.length = NRF_PWM_CHANNEL_COUNT \
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}; \
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\
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DEVICE_AND_API_INIT(pwm_nrfx_##idx, CONFIG_PWM_##idx##_NAME, \
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pwm_nrfx_init, &pwm_nrfx_##idx##_data, \
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&pwm_nrfx_##idx##_config, \
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
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&pwm_nrfx_drv_api_funcs)
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#ifdef CONFIG_PWM_0
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#ifndef CONFIG_PWM_0_NRF_CH0_INVERTED
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#define CONFIG_PWM_0_NRF_CH0_INVERTED 0
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#endif
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#ifndef CONFIG_PWM_0_NRF_CH1_INVERTED
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#define CONFIG_PWM_0_NRF_CH1_INVERTED 0
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#endif
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#ifndef CONFIG_PWM_0_NRF_CH2_INVERTED
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#define CONFIG_PWM_0_NRF_CH2_INVERTED 0
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#endif
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#ifndef CONFIG_PWM_0_NRF_CH3_INVERTED
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#define CONFIG_PWM_0_NRF_CH3_INVERTED 0
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#endif
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PWM_NRFX_DEVICE(0);
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#endif
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#ifdef CONFIG_PWM_1
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#ifndef CONFIG_PWM_1_NRF_CH0_INVERTED
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#define CONFIG_PWM_1_NRF_CH0_INVERTED 0
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#endif
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#ifndef CONFIG_PWM_1_NRF_CH1_INVERTED
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#define CONFIG_PWM_1_NRF_CH1_INVERTED 0
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#endif
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#ifndef CONFIG_PWM_1_NRF_CH2_INVERTED
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#define CONFIG_PWM_1_NRF_CH2_INVERTED 0
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#endif
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#ifndef CONFIG_PWM_1_NRF_CH3_INVERTED
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#define CONFIG_PWM_1_NRF_CH3_INVERTED 0
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#endif
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PWM_NRFX_DEVICE(1);
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#endif
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#ifdef CONFIG_PWM_2
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#ifndef CONFIG_PWM_2_NRF_CH0_INVERTED
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#define CONFIG_PWM_2_NRF_CH0_INVERTED 0
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#endif
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#ifndef CONFIG_PWM_2_NRF_CH1_INVERTED
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#define CONFIG_PWM_2_NRF_CH1_INVERTED 0
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#endif
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#ifndef CONFIG_PWM_2_NRF_CH2_INVERTED
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#define CONFIG_PWM_2_NRF_CH2_INVERTED 0
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#endif
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#ifndef CONFIG_PWM_2_NRF_CH3_INVERTED
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#define CONFIG_PWM_2_NRF_CH3_INVERTED 0
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#endif
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PWM_NRFX_DEVICE(2);
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#endif
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#ifdef CONFIG_PWM_3
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#ifndef CONFIG_PWM_3_NRF_CH0_INVERTED
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#define CONFIG_PWM_3_NRF_CH0_INVERTED 0
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#endif
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#ifndef CONFIG_PWM_3_NRF_CH1_INVERTED
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#define CONFIG_PWM_3_NRF_CH1_INVERTED 0
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#endif
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#ifndef CONFIG_PWM_3_NRF_CH2_INVERTED
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#define CONFIG_PWM_3_NRF_CH2_INVERTED 0
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#endif
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#ifndef CONFIG_PWM_3_NRF_CH3_INVERTED
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#define CONFIG_PWM_3_NRF_CH3_INVERTED 0
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#endif
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PWM_NRFX_DEVICE(3);
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#endif
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