diff --git a/arch/Makefile b/arch/Makefile
index 826da53d109..6dfb0bd1389 100644
--- a/arch/Makefile
+++ b/arch/Makefile
@@ -4,3 +4,6 @@ endif
 ifeq (${ARCH},x86)
 obj-y += x86/
 endif
+ifeq (${ARCH},arc)
+obj-y += arc/
+endif
diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
new file mode 100644
index 00000000000..1e2ff0ee1b9
--- /dev/null
+++ b/arch/arc/Kconfig
@@ -0,0 +1,232 @@
+# ARC EM4 options
+
+#
+# Copyright (c) 2014 Wind River Systems, Inc.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# 1) Redistributions of source code must retain the above copyright notice,
+# this list of conditions and the following disclaimer.
+#
+# 2) Redistributions in binary form must reproduce the above copyright notice,
+# this list of conditions and the following disclaimer in the documentation
+# and/or other materials provided with the distribution.
+#
+# 3) Neither the name of Wind River Systems nor the names of its contributors
+# may be used to endorse or promote products derived from this software without
+# specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+source "kernel/Kconfig"
+
+source "misc/Kconfig"
+
+menu "ARC family options"
+
+config	ARC
+	bool
+	default y
+	help
+	  This option signifies the use of an ARC system.
+
+endmenu
+
+menu "ARC EM4 processor options"
+
+config	CPU_ARCEM4
+	bool
+	default y
+	select CPU_ARCV2
+	help
+         This option signifies the use of an ARC EM4 CPU
+
+endmenu
+
+menu "ARCv2 Family Options"
+
+config	CPU_ARCV2
+	bool
+	default y
+	select ARC
+	help
+	  This option signifies the use of a CPU of the ARCv2 family.
+
+config	DATA_ENDIANNESS_LITTLE
+	bool
+	default y
+	help
+	  This is driven by the processor implementation, since it is fixed in
+	  hardware. The BSP should set this value to 'n' if the data is
+	  implemented as big endian.
+
+config	NUM_IRQ_PRIO_LEVELS
+	int
+	prompt "Number of supported interrupt priority levels"
+	default 1
+	range 1 16
+	help
+	  Interrupt priorities available will be 0 to NUM_IRQ_PRIO_LEVELS-1.
+	  The minimum value is 1.
+
+	  The BSP must provide a valid default for proper operation.
+
+config	NUM_REGULAR_IRQ_PRIO_LEVELS
+	int
+	prompt "Number of supported regular interrupt priority levels"
+	default 1
+	range 1 16
+	help
+	 This represents the number of Regular Interrupt priorities, which
+	 does NOT include the Fast (FIRQ) priority.
+	 The Regular Interrupt priorities available will be
+	  (NUM_IRQ_PRIO_LEVELS - NUM_REGULAR_IRQ_PRIO_LEVELS) to
+	  (NUM_REGULAR_IRQ_PRIO_LEVELS - 1).
+
+	  The maximum value is NUM_IRQ_PRIO_LEVELS.
+
+	  The BSP must provide a valid default for proper operation.
+
+config	NUM_IRQS
+	int
+	prompt "Upper limit of interrupt numbers/IDs used"
+	default 17
+	range 1 256
+	help
+	  Interrupts available will be 0 to NUM_IRQS-1.
+	  The minimum value is 1.
+
+	  The BSP must provide a valid default. This drives the size of the
+	  vector table.
+
+config	FIRQ_STACK_SIZE
+	int
+	prompt "Size of stack for FIRQs (in bytes)"
+	depends on CPU_ARCV2
+	default 1024
+	help
+	  FIRQs and regular IRQs have different stacks so that a FIRQ can start
+	  running without doing stack switching in software.
+
+config	STACK_CHECKING
+	bool
+	prompt "ARC CPU stack checking is enabled/disabled."
+	depends on ENHANCED_SECURITY
+	default y
+	help
+	  Enable or disable CPU stack checking.
+
+config	FAULT_DUMP
+	int
+	prompt "Fault dump level"
+	default 2
+	help
+	  Different levels for display information when a fault occurs.
+
+	  2: The default. Display specific and verbose information. Consumes
+	     the most memory (long strings).
+	  1: Display general and short information. Consumes less memory
+	     (short strings).
+	  0: Off.
+
+config	XIP
+	default n if NSIM
+	default y
+
+config  SW_ISR_TABLE
+	bool
+	prompt "Enable software interrupt handler table"
+	default y
+	help
+	  Enable an interrupt handler table implemented in software. This
+	  table, unlike ISRs connected directly in the vector table, allow
+	  a parameter to be passed to the interrupt handlers. Also, invoking
+	  the exeception/interrupt exit stub is automatically done.
+
+	  This has to be enabled for dynamically connecting interrupt handlers
+	  at runtime (SW_ISR_TABLE_DYNAMIC).
+
+config  SW_ISR_TABLE_DYNAMIC
+	bool
+	prompt "Allow installing interrupt handlers at runtime"
+	depends on SW_ISR_TABLE
+	default y
+	help
+	  This option enables nanoCpuIntConnect(). It moves the ISR table to
+	  SRAM so that it is writable. This has the side-effect of removing
+	  write-protection on the ISR table.
+
+config  SW_ISR_TABLE_STATIC_CUSTOM
+	bool
+	prompt "Projects provide a custom static software ISR table"
+	depends on SW_ISR_TABLE && !SW_ISR_TABLE_DYNAMIC
+	default n
+	help
+	  Projects, not the BSP, provide a software table of ISR and their
+	  parameters. The table is static, and thus ISRs cannot be connected
+	  at runtime.
+
+config	SW_ISR_TABLE_BSP
+	bool
+	# omit prompt to signify a "hidden" option
+	depends on SW_ISR_TABLE_DYNAMIC || (SW_ISR_TABLE && !SW_ISR_TABLE_STATIC_CUSTOM)
+	default y
+	help
+	  Not user-selectable, helps build system logic.
+
+config  IRQ_VECTOR_TABLE_CUSTOM
+	bool
+	prompt "Projects provide a custom static IRQ part of vector table"
+	depends on !SW_ISR_TABLE
+	default n
+	help
+	  Projects, not the BSP, provide the IRQ part of the vector table.
+
+	  This is the table of interrupt handlers with the best potential
+	  performance, but is the less flexible.
+
+	  The ISRs are installed directly in the vector table, thus are
+	  directly called by the CPU when an interrupt is taken. This adds
+	  the least overhead when handling an interrupt.
+
+	  Downsides:
+	  - ISRs cannot have a parameter
+	  - ISRs cannot be connected at runtime
+	  - ISRs must notify the kernel manually by invoking _ExcExit() when
+		then are about to return.
+
+config	IRQ_VECTOR_TABLE_BSP
+	bool
+	# omit prompt to signify a "hidden" option
+	depends on SW_ISR_TABLE || !IRQ_VECTOR_TABLE_CUSTOM
+	default y
+	help
+	  Not user-selectable, helps build system logic.
+
+config  ARCH_HAS_TASK_ABORT
+	bool
+	# omit prompt to signify a "hidden" option
+	default n
+
+config  ARCH_HAS_NANO_FIBER_ABORT
+	bool
+	# omit prompt to signify a "hidden" option
+	default n
+endmenu
+
+
+source "drivers/Kconfig"
+
+source "net/Kconfig"
diff --git a/arch/arc/Makefile b/arch/arc/Makefile
new file mode 100644
index 00000000000..c1512d3e104
--- /dev/null
+++ b/arch/arc/Makefile
@@ -0,0 +1,7 @@
+obj-y = core/
+obj-y += bsp/
+obj-y += timer/
+obj-y += interrupt_controller/
+obj-$(CONFIG_NSIM) += serial/
+obj-y += timer/
+
diff --git a/arch/arc/bsp/Makefile b/arch/arc/bsp/Makefile
new file mode 100644
index 00000000000..8b484e333f4
--- /dev/null
+++ b/arch/arc/bsp/Makefile
@@ -0,0 +1,8 @@
+ccflags-y +=-I$(srctree)/arch/arc/$(strip $(CONFIG_BSP_DIR))
+asflags-y +=-I$(srctree)/arch/arc/$(strip $(CONFIG_BSP_DIR))
+
+obj-y += fatal_error.o \
+	 prep_c.o \
+	 reset.o \
+	 vector_table.o
+
diff --git a/arch/arc/core/Makefile b/arch/arc/core/Makefile
new file mode 100644
index 00000000000..9d7ff7e8332
--- /dev/null
+++ b/arch/arc/core/Makefile
@@ -0,0 +1,7 @@
+ccflags-y += -I$(srctree)/kernel/nanokernel/include
+ccflags-y += -I$(srctree)/kernel/microkernel/include
+
+obj-y += atomic.o context.o context_wrapper.o \
+	cpu_idle.o  fast_irq.o  fatal.o  fault.o  \
+	fault_s.o  ffs.o  irq_lock.o  irq_manage.o  \
+	isr_wrapper.o  regular_irq.o  swap_macros.h  swap.o
diff --git a/arch/arc/interrupt_controller/Makefile b/arch/arc/interrupt_controller/Makefile
new file mode 100644
index 00000000000..71373986973
--- /dev/null
+++ b/arch/arc/interrupt_controller/Makefile
@@ -0,0 +1,5 @@
+ccflags-y +=-I$(srctree)/arch/arc/$(strip $(CONFIG_BSP_DIR))
+asflags-y +=-I$(srctree)/arch/arc/$(strip $(CONFIG_BSP_DIR))
+
+
+obj-y += arcv2_irq_unit.o
diff --git a/arch/arc/serial/Makefile b/arch/arc/serial/Makefile
new file mode 100644
index 00000000000..5c7f6772f59
--- /dev/null
+++ b/arch/arc/serial/Makefile
@@ -0,0 +1,4 @@
+ccflags-y +=-I$(srctree)/arch/arc/$(strip $(CONFIG_BSP_DIR))
+asflags-y +=-I$(srctree)/arch/arc/$(strip $(CONFIG_BSP_DIR))
+
+obj-$(CONFIG_NSIM) += nsim_uart.o
diff --git a/arch/arc/timer/Makefile b/arch/arc/timer/Makefile
new file mode 100644
index 00000000000..86b673c8dfc
--- /dev/null
+++ b/arch/arc/timer/Makefile
@@ -0,0 +1,4 @@
+ccflags-y +=-I$(srctree)/arch/arc/$(strip $(CONFIG_BSP_DIR))
+asflags-y +=-I$(srctree)/arch/arc/$(strip $(CONFIG_BSP_DIR))
+
+obj-y += arcv2_timer0.o