drivers/flash: qspi stm32: use new pinctrl API
Use the new pinctrl API to configure pins. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
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cec2cb69dd
2 changed files with 7 additions and 16 deletions
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@ -13,7 +13,7 @@
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#include <arch/common/ffs.h>
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#include <sys/util.h>
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#include <soc.h>
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#include <pinmux/pinmux_stm32.h>
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#include <drivers/pinctrl.h>
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#include <drivers/clock_control/stm32_clock_control.h>
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#include <drivers/clock_control.h>
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#include <drivers/flash.h>
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@ -63,8 +63,7 @@ struct flash_stm32_qspi_config {
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irq_config_func_t irq_config;
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size_t flash_size;
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uint32_t max_frequency;
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const struct soc_gpio_pinctrl *pinctrl_list;
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size_t pinctrl_list_size;
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const struct pinctrl_dev_config *pcfg;
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};
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struct flash_stm32_qspi_data {
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@ -652,9 +651,7 @@ static int flash_stm32_qspi_init(const struct device *dev)
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int ret;
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/* Signals configuration */
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ret = stm32_dt_pinctrl_configure(dev_cfg->pinctrl_list,
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dev_cfg->pinctrl_list_size,
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(uint32_t)dev_cfg->regs);
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ret = pinctrl_apply_state(dev_cfg->pcfg, PINCTRL_STATE_DEFAULT);
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if (ret < 0) {
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LOG_ERR("QSPI pinctrl setup failed (%d)", ret);
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return ret;
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@ -860,11 +857,10 @@ static int flash_stm32_qspi_init(const struct device *dev)
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static void flash_stm32_qspi_irq_config_func(const struct device *dev);
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static const struct soc_gpio_pinctrl qspi_pins[] =
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ST_STM32_DT_PINCTRL(quadspi, 0);
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#define STM32_QSPI_NODE DT_PARENT(DT_DRV_INST(0))
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PINCTRL_DT_DEFINE(STM32_QSPI_NODE)
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static const struct flash_stm32_qspi_config flash_stm32_qspi_cfg = {
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.regs = (QUADSPI_TypeDef *)DT_REG_ADDR(STM32_QSPI_NODE),
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.pclken = {
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@ -874,8 +870,7 @@ static const struct flash_stm32_qspi_config flash_stm32_qspi_cfg = {
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.irq_config = flash_stm32_qspi_irq_config_func,
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.flash_size = DT_INST_PROP(0, size) / 8U,
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.max_frequency = DT_INST_PROP(0, qspi_max_frequency),
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.pinctrl_list = qspi_pins,
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.pinctrl_list_size = ARRAY_SIZE(qspi_pins),
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.pcfg = PINCTRL_DT_DEV_CONFIG_GET(STM32_QSPI_NODE),
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};
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static struct flash_stm32_qspi_data flash_stm32_qspi_dev_data = {
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@ -18,7 +18,7 @@ description: |
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compatible: "st,stm32-qspi"
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include: base.yaml
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include: [base.yaml, pinctrl-device.yaml]
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bus: qspi
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@ -44,7 +44,3 @@ properties:
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For example
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dma-names = "tx_rx";
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pinctrl-0:
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type: phandles
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required: true
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