diff --git a/boards/arm/gd32f403z_eval/CMakeLists.txt b/boards/arm/gd32f403z_eval/CMakeLists.txt new file mode 100644 index 00000000000..159b5bc2592 --- /dev/null +++ b/boards/arm/gd32f403z_eval/CMakeLists.txt @@ -0,0 +1,5 @@ +# Copyright (c) 2021, ATL Electronics +# SPDX-License-Identifier: Apache-2.0 + +zephyr_library() +zephyr_library_sources(board.c) diff --git a/boards/arm/gd32f403z_eval/Kconfig b/boards/arm/gd32f403z_eval/Kconfig new file mode 100644 index 00000000000..5630f4bbf05 --- /dev/null +++ b/boards/arm/gd32f403z_eval/Kconfig @@ -0,0 +1,8 @@ +# Copyright (c) 2021 ATL-Electronics +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_INIT_PRIORITY + int "Board initialization priority" + default 50 + help + Board initialization priority. diff --git a/boards/arm/gd32f403z_eval/Kconfig.board b/boards/arm/gd32f403z_eval/Kconfig.board new file mode 100644 index 00000000000..61733d3bf97 --- /dev/null +++ b/boards/arm/gd32f403z_eval/Kconfig.board @@ -0,0 +1,6 @@ +# Copyright (c) 2021, ATL Electronics +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_GD32F403Z_EVAL + bool "GigaDevice GD32F403Z Evaluation Kit" + depends on SOC_GD32F403Z diff --git a/boards/arm/gd32f403z_eval/Kconfig.defconfig b/boards/arm/gd32f403z_eval/Kconfig.defconfig new file mode 100644 index 00000000000..39f1df8e537 --- /dev/null +++ b/boards/arm/gd32f403z_eval/Kconfig.defconfig @@ -0,0 +1,9 @@ +# Copyright (c) 2021 ATL Electronics +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_GD32F403Z_EVAL + +config BOARD + default "gd32f403z_eval" + +endif # BOARD_GD32F403Z_EVAL diff --git a/boards/arm/gd32f403z_eval/board.c b/boards/arm/gd32f403z_eval/board.c new file mode 100644 index 00000000000..9786e5339e5 --- /dev/null +++ b/boards/arm/gd32f403z_eval/board.c @@ -0,0 +1,18 @@ +/* + * Copyright (c) 2021 ATL Electronics + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +static int board_init(const struct device *dev) +{ + rcu_periph_clock_enable(RCU_GPIOA); + + gpio_init(GPIOA, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_9); + gpio_init(GPIOA, GPIO_MODE_IN_FLOATING, GPIO_OSPEED_50MHZ, GPIO_PIN_10); + + return 0; +} + +SYS_INIT(board_init, PRE_KERNEL_1, CONFIG_BOARD_INIT_PRIORITY); diff --git a/boards/arm/gd32f403z_eval/board.cmake b/boards/arm/gd32f403z_eval/board.cmake new file mode 100644 index 00000000000..a419a88e5d1 --- /dev/null +++ b/boards/arm/gd32f403z_eval/board.cmake @@ -0,0 +1,4 @@ +# Copyright (c) 2021, ATL Electronics +# SPDX-License-Identifier: Apache-2.0 + +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/arm/gd32f403z_eval/doc/img/gd32f403z_eval.png b/boards/arm/gd32f403z_eval/doc/img/gd32f403z_eval.png new file mode 100644 index 00000000000..3f984b8889d Binary files /dev/null and b/boards/arm/gd32f403z_eval/doc/img/gd32f403z_eval.png differ diff --git a/boards/arm/gd32f403z_eval/doc/index.rst b/boards/arm/gd32f403z_eval/doc/index.rst new file mode 100644 index 00000000000..5273d767cce --- /dev/null +++ b/boards/arm/gd32f403z_eval/doc/index.rst @@ -0,0 +1,165 @@ +.. _gd32f403z_eval: + +GigaDevice GD32F403Z-EVAL +######################### + + +Overview +******** + +The GD32F403Z-EVAL board is a hardware platform that enables design and debug +of the GigaDevice F403 Cortex-M4F High Performance MCU. + +The GD32F403ZE features a single-core ARM Cortex-M4F MCU which can run up +to 168-MHz with flash accesses zero wait states, 512kiB of Flash, 96kiB of +SRAM and 112 GPIOs. + +.. image:: img/gd32f403z_eval.png + :width: 800px + :align: center + :alt: gd32f403z_eval + + +Hardware +******** + +- USB interface with mini-USB connector +- 4 user LEDs +- 4 user push buttons +- Reset Button +- CAN port +- ADC connected to a potentiometer +- 2 DAC channels +- GD25Q40 4Mib SPI Flash +- HY27UF081G2A 1GiB NAND Flash +- AT24C02C 2KiB EEPROM +- 3.2 TFT LCD (320x240) +- PCM1770 Stereo DAC with Headphone Amplifier +- Micro-SDHC interface +- GD-Link interface + + - CMSIS-DAP swd debug interface over USB HID. + + +For more information about the GD32F403 SoC and GD32F403Z-Eval board: + +- `GigaDevice Cortex-M4F High Performance SoC Website`_ +- `GD32F403 Datasheet`_ +- `GD32F403 Reference Manual`_ +- `GD32F403Z Eval Schematics`_ +- `GD32 ISP Console`_ + + +Supported Features +================== + +The board configuration supports the following hardware features: + ++-----------+------------+-----------------------+ +| Interface | Controller | Driver/Component | ++===========+============+=======================+ +| NVIC | on-chip | nested vectored | +| | | interrupt controller | ++-----------+------------+-----------------------+ +| SYSTICK | on-chip | system clock | ++-----------+------------+-----------------------+ +| UART | on-chip | serial port-polling | ++-----------+------------+-----------------------+ + + +Serial Port +=========== + +The GD32F403Z-EVAL board has 5 serial communication ports. The default port +is UART0 at PIN-9 and PIN-10. + +Programming and Debugging +************************* + +Before program your board make sure to configure boot setting and serial port. +The default serial port is USART0. This port uses header JP-5/6 to route +signals between USB VBUS/ID and USART J2. + ++--------+--------+------------+ +| Boot-0 | Boot-1 | Function | ++========+========+============+ +| 1-2 | 1-2 | SRAM | ++--------+--------+------------+ +| 1-2 | 2-3 | Bootloader | ++--------+--------+------------+ +| 2-3 | Any | Flash | ++--------+--------+------------+ + ++------+------+-------------+ +| JP-5 | JP-6 | Function | ++======+======+=============+ +| 1-2 | 1-2 | USART0 / J2 | ++------+------+-------------+ +| 2-3 | 2-3 | USB VBUS/ID | ++------+------+-------------+ +| open | open | Free | ++------+------+-------------+ + +Using GD-Link +============= + +The GD32F403Z-EVAL includes an onboard programmer/debugger (GD-Link) which +allow flash programming and debug over USB. There are also program and debug +headers J1 and J100 that can be used with any ARM compatible tools. + +#. Build the Zephyr kernel and the :ref:`hello_world` sample application: + + .. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: gd32f403z_eval + :goals: build + :compact: + +#. Run your favorite terminal program to listen for output. Under Linux the + terminal should be :code:`/dev/ttyUSB0`. For example: + + .. code-block:: console + + $ minicom -D /dev/ttyUSB0 -o + + The -o option tells minicom not to send the modem initialization + string. Connection should be configured as follows: + + - Speed: 115200 + - Data: 8 bits + - Parity: None + - Stop bits: 1 + +#. To flash an image: + + .. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: gd32f403z_eval + :goals: flash + :compact: + + You should see "Hello World! gd32f403z_eval" in your terminal. + +#. To debug an image: + + .. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: gd32f403z_eval + :goals: debug + :compact: + + +.. _GigaDevice Cortex-M4F High Performance SoC Website: + https://www.gigadevice.com/products/microcontrollers/gd32/arm-cortex-m4/high-performance-line/gd32f403-series/ + +.. _GD32F403 Datasheet: + http://www.gd32mcu.com/data/documents/shujushouce/GD32F403xx_Datasheet_Rev1.3.pdf + +.. _GD32F403 Reference Manual: + http://www.gd32mcu.com/data/documents/yingyongbiji/GD32F403_User_Manual_Rev2.4.pdf + +.. _GD32F403Z Eval Schematics: + http://www.gd32mcu.com/download/down/document_id/270/path_type/1 + +.. _GD32 ISP Console: + http://www.gd32mcu.com/download/down/document_id/175/path_type/1 diff --git a/boards/arm/gd32f403z_eval/gd32f403z_eval.dts b/boards/arm/gd32f403z_eval/gd32f403z_eval.dts new file mode 100644 index 00000000000..86393b16d60 --- /dev/null +++ b/boards/arm/gd32f403z_eval/gd32f403z_eval.dts @@ -0,0 +1,26 @@ +/* + * Copyright (c) 2021, ATL Electronics + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include + +/ { + model = "GigaDevice GD32F403Z Evaluation Kit"; + compatible = "gd,gd32f403z"; + + chosen { + zephyr,sram = &sram0; + zephyr,flash = &flash0; + zephyr,console = &usart0; + zephyr,shell-uart = &usart0; + }; +}; + +&usart0 { + status = "okay"; + + current-speed = <115200>; +}; diff --git a/boards/arm/gd32f403z_eval/gd32f403z_eval.yaml b/boards/arm/gd32f403z_eval/gd32f403z_eval.yaml new file mode 100644 index 00000000000..0066bc64218 --- /dev/null +++ b/boards/arm/gd32f403z_eval/gd32f403z_eval.yaml @@ -0,0 +1,13 @@ +# Copyright (c) 2021, ATL Electronics +# SPDX-License-Identifier: Apache-2.0 + +identifier: gd32f403z_eval +name: GigaDevice GD32F403Z Evaluation Kit +type: mcu +arch: arm +ram: 96 +flash: 512 +toolchain: + - zephyr + - gnuarmemb + - xtools diff --git a/boards/arm/gd32f403z_eval/gd32f403z_eval_defconfig b/boards/arm/gd32f403z_eval/gd32f403z_eval_defconfig new file mode 100644 index 00000000000..f5b70d6a486 --- /dev/null +++ b/boards/arm/gd32f403z_eval/gd32f403z_eval_defconfig @@ -0,0 +1,14 @@ +# Copyright (c) 2021, ATL Electronics +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_SOC_SERIES_GD32F4=y +CONFIG_SOC_GD32F403Z=y +CONFIG_BOARD_GD32F403Z_EVAL=y + +CONFIG_ARM_MPU=y +CONFIG_HW_STACK_PROTECTION=y +CONFIG_CORTEX_M_SYSTICK=y + +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y +CONFIG_SERIAL=y diff --git a/boards/arm/gd32f403z_eval/support/openocd.cfg b/boards/arm/gd32f403z_eval/support/openocd.cfg new file mode 100644 index 00000000000..a97ad6bbca4 --- /dev/null +++ b/boards/arm/gd32f403z_eval/support/openocd.cfg @@ -0,0 +1,26 @@ +# Copyright (c) 2021 ATL-Electronics +# SPDX-License-Identifier: Apache-2.0 +source [find interface/cmsis-dap.cfg] +transport select swd + +# chip name +set CHIPNAME gd32f403ze +set ENDIAN little +set CPUTAPID 0x790007a3 +set FLASH_SIZE 0x80000 + +source [find target/stm32f1x.cfg] + +reset_config trst_and_srst separate + +$_TARGETNAME configure -event gdb-attach { + echo "Debugger attaching: halting execution" + reset halt + gdb_breakpoint_override hard +} + +$_TARGETNAME configure -event gdb-detach { + echo "Debugger detaching: resuming execution" + resume +} +