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arch: xip: cleanup XIP Kconfig

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unify how XIP is configured across architectures. Use imply instead of
setting defaults per architecture and imply XIP on riscv arch and remove
XIP configuration from individual defconfig files to match other
architectures.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit is contained in:
Anas Nashif 2020-08-02 10:45:10 -04:00
commit ce59510127
11 changed files with 8 additions and 21 deletions
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3
arch/Kconfig
View file

@ -20,6 +20,7 @@ config ARC
bool bool
select ARCH_IS_SET select ARCH_IS_SET
select HAS_DTS select HAS_DTS
imply XIP
help help
ARC architecture ARC architecture
@ -48,6 +49,7 @@ config NIOS2
select ARCH_IS_SET select ARCH_IS_SET
select ATOMIC_OPERATIONS_C select ATOMIC_OPERATIONS_C
select HAS_DTS select HAS_DTS
imply XIP
help help
Nios II Gen 2 architecture Nios II Gen 2 architecture
@ -55,6 +57,7 @@ config RISCV
bool bool
select ARCH_IS_SET select ARCH_IS_SET
select HAS_DTS select HAS_DTS
imply XIP
help help
RISCV architecture RISCV architecture

3
arch/arc/Kconfig
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@ -189,9 +189,6 @@ config FAULT_DUMP
0: Off. 0: Off.
config XIP
default y if !SOC_NSIM
config GEN_ISR_TABLES config GEN_ISR_TABLES
default y default y

1
arch/arm/core/aarch32/Kconfig
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@ -17,6 +17,7 @@ config CPU_CORTEX_M
select ARCH_HAS_RAMFUNC_SUPPORT select ARCH_HAS_RAMFUNC_SUPPORT
select ARCH_HAS_NESTED_EXCEPTION_DETECTION select ARCH_HAS_NESTED_EXCEPTION_DETECTION
select SWAP_NONATOMIC select SWAP_NONATOMIC
imply XIP
help help
This option signifies the use of a CPU of the Cortex-M family. This option signifies the use of a CPU of the Cortex-M family.

3
arch/arm/core/aarch32/cortex_m/Kconfig
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@ -229,9 +229,6 @@ config ARMV8_M_DSP
This option signifies the use of an ARMv8-M processor This option signifies the use of an ARMv8-M processor
implementation supporting the DSP Extension. implementation supporting the DSP Extension.
config XIP
default y
menu "ARM Cortex-M0/M0+/M3/M4/M7/M23/M33 options" menu "ARM Cortex-M0/M0+/M3/M4/M7/M23/M33 options"
depends on ARMV6_M_ARMV8_M_BASELINE || ARMV7_M_ARMV8_M_MAINLINE depends on ARMV6_M_ARMV8_M_BASELINE || ARMV7_M_ARMV8_M_MAINLINE

3
arch/nios2/Kconfig
View file

@ -21,9 +21,6 @@ endmenu
menu "Nios II Family Options" menu "Nios II Family Options"
config XIP
default y
config GEN_ISR_TABLES config GEN_ISR_TABLES
default y default y

3
arch/x86/Kconfig
View file

@ -76,9 +76,6 @@ config IRQ_OFFLOAD_VECTOR
range 32 255 range 32 255
depends on IRQ_OFFLOAD depends on IRQ_OFFLOAD
config XIP
default n
config PIC_DISABLE config PIC_DISABLE
bool "Disable PIC" bool "Disable PIC"
help help

1
boards/riscv/litex_vexriscv/litex_vexriscv_defconfig
View file

@ -27,3 +27,4 @@ CONFIG_I2C=y
CONFIG_I2C_LITEX=y CONFIG_I2C_LITEX=y
CONFIG_PWM=y CONFIG_PWM=y
CONFIG_PWM_LITEX=y CONFIG_PWM_LITEX=y
CONFIG_XIP=n

3
soc/arc/snps_nsim/Kconfig.defconfig
View file

@ -9,6 +9,9 @@ config SOC
config UART_CONSOLE_ON_DEV_NAME config UART_CONSOLE_ON_DEV_NAME
default "UART_0" default "UART_0"
config XIP
default n
source "soc/arc/snps_nsim/Kconfig.defconfig.em" source "soc/arc/snps_nsim/Kconfig.defconfig.em"
source "soc/arc/snps_nsim/Kconfig.defconfig.sem" source "soc/arc/snps_nsim/Kconfig.defconfig.sem"
source "soc/arc/snps_nsim/Kconfig.defconfig.hs" source "soc/arc/snps_nsim/Kconfig.defconfig.hs"

3
soc/riscv/openisa_rv32m1/Kconfig.defconfig
View file

@ -20,9 +20,6 @@ config NUM_IRQS
default 64 if RV32M1_INTMUX_CHANNEL_0 default 64 if RV32M1_INTMUX_CHANNEL_0
default 32 default 32
config XIP
default y
config RISCV_GENERIC_TOOLCHAIN config RISCV_GENERIC_TOOLCHAIN
default y if "$(ZEPHYR_TOOLCHAIN_VARIANT)" = "zephyr" default y if "$(ZEPHYR_TOOLCHAIN_VARIANT)" = "zephyr"
default n default n

3
soc/riscv/riscv-privilege/miv/Kconfig.defconfig.series
View file

@ -29,7 +29,4 @@ config MAX_IRQ_PER_AGGREGATOR
config NUM_IRQS config NUM_IRQS
default 42 default 42
config XIP
default y
endif # SOC_SERIES_RISCV32_MIV endif # SOC_SERIES_RISCV32_MIV

3
soc/riscv/riscv-privilege/sifive-freedom/Kconfig.defconfig.series
View file

@ -29,7 +29,4 @@ config MAX_IRQ_PER_AGGREGATOR
config NUM_IRQS config NUM_IRQS
default 64 default 64
config XIP
default y
endif # SOC_SERIES_RISCV_SIFIVE_FREEDOM endif # SOC_SERIES_RISCV_SIFIVE_FREEDOM