x86: rename CONFIG_SSE* to CONFIG_X86_SSE*
This adds X86 keyword to the kconfigs to indicate these are for x86. The old options are still there marked as deprecated. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit is contained in:
parent
29cf9d879d
commit
ce44048d46
16 changed files with 71 additions and 52 deletions
|
@ -48,6 +48,31 @@ config X86_64
|
|||
select SCHED_IPI_SUPPORTED
|
||||
select X86_MMU
|
||||
|
||||
menu "x86 Features"
|
||||
|
||||
config X86_SSE
|
||||
bool "Enable SSE Support"
|
||||
depends on FPU
|
||||
help
|
||||
This option enables SSE support, and the use of SSE registers
|
||||
by threads.
|
||||
|
||||
config X86_SSE_FP_MATH
|
||||
bool "Compiler-generated SSEx instructions for floating point math"
|
||||
depends on X86_SSE
|
||||
help
|
||||
This option allows the compiler to generate SSEx instructions for
|
||||
performing floating point math. This can greatly improve performance
|
||||
when exactly the same operations are to be performed on multiple
|
||||
data objects; however, it can also significantly reduce performance
|
||||
when preemptive task switches occur because of the larger register
|
||||
set that must be saved and restored.
|
||||
|
||||
Disabling this option means that the compiler utilizes only the
|
||||
x87 instruction set for floating point operations.
|
||||
|
||||
endmenu
|
||||
|
||||
config X86_KERNEL_OFFSET
|
||||
int "Kernel offset from beginning of RAM"
|
||||
default 1048576
|
||||
|
|
|
@ -92,22 +92,16 @@ if CPU_HAS_FPU
|
|||
config SSE
|
||||
bool "SSE registers"
|
||||
depends on FPU
|
||||
select X86_SSE
|
||||
help
|
||||
This option enables the use of SSE registers by threads.
|
||||
This option is deprecated. Please use CONFIG_X86_SSE instead.
|
||||
|
||||
config SSE_FP_MATH
|
||||
bool "Compiler-generated SSEx instructions"
|
||||
depends on SSE
|
||||
depends on X86_SSE
|
||||
select X86_SSE_FP_MATH
|
||||
help
|
||||
This option allows the compiler to generate SSEx instructions for
|
||||
performing floating point math. This can greatly improve performance
|
||||
when exactly the same operations are to be performed on multiple
|
||||
data objects; however, it can also significantly reduce performance
|
||||
when preemptive task switches occur because of the larger register
|
||||
set that must be saved and restored.
|
||||
|
||||
Disabling this option means that the compiler utilizes only the
|
||||
x87 instruction set for floating point operations.
|
||||
This option is deprecated. Please use CONFIG_X86_SSE_FP_MATH instead.
|
||||
|
||||
config EAGER_FPU_SHARING
|
||||
bool
|
||||
|
|
|
@ -34,7 +34,7 @@
|
|||
#endif
|
||||
|
||||
|
||||
#if defined(CONFIG_SSE)
|
||||
#if defined(CONFIG_X86_SSE)
|
||||
GDATA(_sse_mxcsr_default_value)
|
||||
#endif
|
||||
|
||||
|
@ -101,7 +101,7 @@ __csSet:
|
|||
|
||||
fninit /* set x87 FPU to its default state */
|
||||
|
||||
#if defined(CONFIG_SSE)
|
||||
#if defined(CONFIG_X86_SSE)
|
||||
/*
|
||||
* Permit use of SSE instructions
|
||||
*
|
||||
|
@ -116,7 +116,7 @@ __csSet:
|
|||
|
||||
ldmxcsr _sse_mxcsr_default_value /* initialize SSE control/status reg */
|
||||
|
||||
#endif /* CONFIG_SSE */
|
||||
#endif /* CONFIG_X86_SSE */
|
||||
|
||||
#endif /* !CONFIG_FPU */
|
||||
|
||||
|
@ -236,7 +236,7 @@ __csSet:
|
|||
|
||||
_x86_bss_zero:
|
||||
/* ECX = size, EDI = starting address */
|
||||
#ifdef CONFIG_SSE
|
||||
#ifdef CONFIG_X86_SSE
|
||||
/* use XMM register to clear 16 bytes at a time */
|
||||
pxor %xmm0, %xmm0 /* zero out xmm0 register */
|
||||
|
||||
|
@ -258,7 +258,7 @@ bssWords:
|
|||
rep
|
||||
stosl /* zero memory per 4 bytes */
|
||||
|
||||
#else /* !CONFIG_SSE */
|
||||
#else /* !CONFIG_X86_SSE */
|
||||
|
||||
/* clear out BSS double words (32-bits at a time) */
|
||||
|
||||
|
@ -267,13 +267,13 @@ bssWords:
|
|||
rep
|
||||
stosl /* zero memory per 4 bytes */
|
||||
|
||||
#endif /* CONFIG_SSE */
|
||||
#endif /* CONFIG_X86_SSE */
|
||||
ret
|
||||
|
||||
#ifdef CONFIG_XIP
|
||||
_x86_data_copy:
|
||||
/* EDI = dest, ESI = source, ECX = size in 32-bit chunks */
|
||||
#ifdef CONFIG_SSE
|
||||
#ifdef CONFIG_X86_SSE
|
||||
/* copy 16 bytes at a time using XMM until < 16 bytes remain */
|
||||
|
||||
movl %ecx ,%edx /* save number of quad bytes */
|
||||
|
@ -290,7 +290,7 @@ dataDQ:
|
|||
dataWords:
|
||||
movl %edx, %ecx /* restore # quad bytes */
|
||||
andl $0x3, %ecx /* only need to copy at most 3 quad bytes */
|
||||
#endif /* CONFIG_SSE */
|
||||
#endif /* CONFIG_X86_SSE */
|
||||
|
||||
rep
|
||||
movsl /* copy data 4 bytes at a time */
|
||||
|
@ -298,14 +298,14 @@ dataWords:
|
|||
#endif /* CONFIG_XIP */
|
||||
|
||||
|
||||
#if defined(CONFIG_SSE)
|
||||
#if defined(CONFIG_X86_SSE)
|
||||
|
||||
/* SSE control & status register initial value */
|
||||
|
||||
_sse_mxcsr_default_value:
|
||||
.long 0x1f80 /* all SSE exceptions clear & masked */
|
||||
|
||||
#endif /* CONFIG_SSE */
|
||||
#endif /* CONFIG_X86_SSE */
|
||||
|
||||
/* Interrupt Descriptor Table (IDT) definition */
|
||||
|
||||
|
|
|
@ -145,7 +145,7 @@ static inline void z_do_sse_regs_init(void)
|
|||
*/
|
||||
static void FpCtxSave(struct k_thread *thread)
|
||||
{
|
||||
#ifdef CONFIG_SSE
|
||||
#ifdef CONFIG_X86_SSE
|
||||
if ((thread->base.user_options & K_SSE_REGS) != 0) {
|
||||
z_do_fp_and_sse_regs_save(&thread->arch.preempFloatReg);
|
||||
return;
|
||||
|
@ -163,7 +163,7 @@ static void FpCtxSave(struct k_thread *thread)
|
|||
static inline void FpCtxInit(struct k_thread *thread)
|
||||
{
|
||||
z_do_fp_regs_init();
|
||||
#ifdef CONFIG_SSE
|
||||
#ifdef CONFIG_X86_SSE
|
||||
if ((thread->base.user_options & K_SSE_REGS) != 0) {
|
||||
z_do_sse_regs_init();
|
||||
}
|
||||
|
|
|
@ -131,18 +131,18 @@ SECTION_FUNC(TEXT, arch_swap)
|
|||
* switch.
|
||||
*/
|
||||
/* Save outgpoing thread context */
|
||||
#ifdef CONFIG_SSE
|
||||
#ifdef CONFIG_X86_SSE
|
||||
fxsave _thread_offset_to_preempFloatReg(%edx)
|
||||
fninit
|
||||
#else
|
||||
fnsave _thread_offset_to_preempFloatReg(%edx)
|
||||
#endif
|
||||
/* Restore incoming thread context */
|
||||
#ifdef CONFIG_SSE
|
||||
#ifdef CONFIG_X86_SSE
|
||||
fxrstor _thread_offset_to_preempFloatReg(%eax)
|
||||
#else
|
||||
frstor _thread_offset_to_preempFloatReg(%eax)
|
||||
#endif /* CONFIG_SSE */
|
||||
#endif /* CONFIG_X86_SSE */
|
||||
#elif defined(CONFIG_LAZY_FPU_SHARING)
|
||||
/*
|
||||
* Clear the CR0[TS] bit (in the event the current thread
|
||||
|
@ -206,7 +206,7 @@ SECTION_FUNC(TEXT, arch_swap)
|
|||
je restoreContext_NoFloatSave
|
||||
|
||||
|
||||
#ifdef CONFIG_SSE
|
||||
#ifdef CONFIG_X86_SSE
|
||||
testb $K_SSE_REGS, _thread_offset_to_user_options(%ebx)
|
||||
je x87FloatSave
|
||||
|
||||
|
@ -221,7 +221,7 @@ SECTION_FUNC(TEXT, arch_swap)
|
|||
jmp floatSaveDone
|
||||
|
||||
x87FloatSave:
|
||||
#endif /* CONFIG_SSE */
|
||||
#endif /* CONFIG_X86_SSE */
|
||||
|
||||
/* 'fnsave' performs an implicit 'fninit' after saving state! */
|
||||
|
||||
|
@ -245,7 +245,7 @@ restoreContext_NoFloatSave:
|
|||
testb $X86_THREAD_FLAG_ALL, _thread_offset_to_flags(%eax)
|
||||
je restoreContext_NoFloatRestore
|
||||
|
||||
#ifdef CONFIG_SSE
|
||||
#ifdef CONFIG_X86_SSE
|
||||
testb $K_SSE_REGS, _thread_offset_to_user_options(%eax)
|
||||
je x87FloatRestore
|
||||
|
||||
|
@ -254,7 +254,7 @@ restoreContext_NoFloatSave:
|
|||
|
||||
x87FloatRestore:
|
||||
|
||||
#endif /* CONFIG_SSE */
|
||||
#endif /* CONFIG_X86_SSE */
|
||||
|
||||
frstor _thread_offset_to_preempFloatReg(%eax)
|
||||
|
||||
|
|
|
@ -21,10 +21,10 @@ if(CMAKE_C_COMPILER_ID STREQUAL "Clang")
|
|||
)
|
||||
endif()
|
||||
|
||||
if(CONFIG_SSE)
|
||||
if(CONFIG_X86_SSE)
|
||||
zephyr_cc_option(-msse)
|
||||
|
||||
if(CONFIG_SSE_FP_MATH)
|
||||
if(CONFIG_X86_SSE_FP_MATH)
|
||||
zephyr_cc_option(-mfpmath=sse)
|
||||
else()
|
||||
zephyr_cc_option(-mfpmath=387)
|
||||
|
|
|
@ -44,7 +44,7 @@
|
|||
#define _THREAD_WRAPPER_REQUIRED
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_LAZY_FPU_SHARING) && defined(CONFIG_SSE)
|
||||
#if defined(CONFIG_LAZY_FPU_SHARING) && defined(CONFIG_X86_SSE)
|
||||
#define _FP_USER_MASK (K_FP_REGS | K_SSE_REGS)
|
||||
#elif defined(CONFIG_LAZY_FPU_SHARING)
|
||||
#define _FP_USER_MASK (K_FP_REGS)
|
||||
|
|
|
@ -319,8 +319,8 @@ Also, ensure that any thread that uses the floating point registers has
|
|||
sufficient added stack space for saving floating point register values
|
||||
during context switches, as described above.
|
||||
|
||||
Use the :option:`CONFIG_SSE` configuration option to enable support for
|
||||
SSEx instructions (x86 only).
|
||||
For x86, use the :option:`CONFIG_X86_SSE` configuration option to enable
|
||||
support for SSEx instructions.
|
||||
|
||||
API Reference
|
||||
*************
|
||||
|
|
|
@ -27,7 +27,7 @@
|
|||
* cases a 4 byte boundary is sufficient.
|
||||
*/
|
||||
#if defined(CONFIG_EAGER_FPU_SHARING) || defined(CONFIG_LAZY_FPU_SHARING)
|
||||
#ifdef CONFIG_SSE
|
||||
#ifdef CONFIG_X86_SSE
|
||||
#define FP_REG_SET_ALIGN 16
|
||||
#else
|
||||
#define FP_REG_SET_ALIGN 4
|
||||
|
@ -82,7 +82,7 @@ typedef struct _callee_saved _callee_saved_t;
|
|||
* The macros CONFIG_{LAZY|EAGER}_FPU_SHARING shall be set to indicate that the
|
||||
* saving/restoring of the traditional x87 floating point (and MMX) registers
|
||||
* are supported by the kernel's context swapping code. The macro
|
||||
* CONFIG_SSE shall _also_ be set if saving/restoring of the XMM
|
||||
* CONFIG_X86_SSE shall _also_ be set if saving/restoring of the XMM
|
||||
* registers is also supported in the kernel's context swapping code.
|
||||
*/
|
||||
|
||||
|
@ -120,7 +120,7 @@ typedef struct s_FpRegSet { /* # of bytes: name of register */
|
|||
tFpReg fpReg[8]; /* 80 : ST0 -> ST7 */
|
||||
} tFpRegSet __aligned(FP_REG_SET_ALIGN);
|
||||
|
||||
#ifdef CONFIG_SSE
|
||||
#ifdef CONFIG_X86_SSE
|
||||
|
||||
/* definition of a single x87 (floating point / MMX) register */
|
||||
|
||||
|
@ -168,12 +168,12 @@ typedef struct s_FpRegSetEx /* # of bytes: name of register */
|
|||
unsigned char rsrvd3[176]; /* 176 : reserved */
|
||||
} tFpRegSetEx __aligned(FP_REG_SET_ALIGN);
|
||||
|
||||
#else /* CONFIG_SSE == 0 */
|
||||
#else /* CONFIG_X86_SSE == 0 */
|
||||
|
||||
typedef struct s_FpRegSetEx {
|
||||
} tFpRegSetEx;
|
||||
|
||||
#endif /* CONFIG_SSE == 0 */
|
||||
#endif /* CONFIG_X86_SSE == 0 */
|
||||
|
||||
#else /* !CONFIG_LAZY_FPU_SHARING && !CONFIG_EAGER_FPU_SHARING */
|
||||
|
||||
|
|
|
@ -247,7 +247,7 @@ extern void k_thread_foreach_unlocked(
|
|||
#ifdef CONFIG_X86
|
||||
/* x86 Bitmask definitions for threads user options */
|
||||
|
||||
#if defined(CONFIG_FPU_SHARING) && defined(CONFIG_SSE)
|
||||
#if defined(CONFIG_FPU_SHARING) && defined(CONFIG_X86_SSE)
|
||||
/* thread uses SSEx (and also FP) registers */
|
||||
#define K_SSE_REGS (BIT(7))
|
||||
#endif
|
||||
|
|
|
@ -17,8 +17,8 @@ tests:
|
|||
benchmark.kernel.application.fp.x86.fpu:
|
||||
extra_args: CONF_FILE=prj_fp.conf
|
||||
extra_configs:
|
||||
- CONFIG_SSE=y
|
||||
- CONFIG_SSE_FP_MATH=n
|
||||
- CONFIG_X86_SSE=y
|
||||
- CONFIG_X86_SSE_FP_MATH=n
|
||||
arch_allow: x86
|
||||
filter: CONFIG_CPU_HAS_FPU
|
||||
min_flash: 34
|
||||
|
@ -29,8 +29,8 @@ tests:
|
|||
benchmark.kernel.application.fp.x86.sse:
|
||||
extra_args: CONF_FILE=prj_fp.conf
|
||||
extra_configs:
|
||||
- CONFIG_SSE=y
|
||||
- CONFIG_SSE_FP_MATH=y
|
||||
- CONFIG_X86_SSE=y
|
||||
- CONFIG_X86_SSE_FP_MATH=y
|
||||
arch_allow: x86
|
||||
filter: CONFIG_CPU_HAS_FPU
|
||||
min_flash: 34
|
||||
|
|
|
@ -2,4 +2,4 @@ CONFIG_ZTEST=y
|
|||
CONFIG_TEST_USERSPACE=y
|
||||
CONFIG_FPU=y
|
||||
CONFIG_FPU_SHARING=y
|
||||
CONFIG_SSE=y
|
||||
CONFIG_X86_SSE=y
|
||||
|
|
|
@ -20,12 +20,12 @@ tests:
|
|||
kernel.fpu_sharing.float_disable.x86.fpu:
|
||||
extra_args: CONF_FILE=prj_x86.conf
|
||||
extra_configs:
|
||||
- CONFIG_SSE_FP_MATH=n
|
||||
- CONFIG_X86_SSE_FP_MATH=n
|
||||
platform_allow: qemu_x86
|
||||
tags: kernel userspace
|
||||
kernel.fpu_sharing.float_disable.x86.sse:
|
||||
extra_args: CONF_FILE=prj_x86.conf
|
||||
extra_configs:
|
||||
- CONFIG_SSE_FP_MATH=y
|
||||
- CONFIG_X86_SSE_FP_MATH=y
|
||||
platform_allow: qemu_x86
|
||||
tags: kernel userspace
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
CONFIG_ZTEST=y
|
||||
CONFIG_FPU=y
|
||||
CONFIG_SSE=y
|
||||
CONFIG_X86_SSE=y
|
||||
CONFIG_FPU_SHARING=y
|
||||
CONFIG_STDOUT_CONSOLE=y
|
||||
|
|
|
@ -17,7 +17,7 @@
|
|||
#error Rebuild with the FPU_SHARING config option enabled
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_X86) && !defined(CONFIG_SSE)
|
||||
#if defined(CONFIG_X86) && !defined(CONFIG_X86_SSE)
|
||||
#error Rebuild with the SSE config option enabled
|
||||
#endif
|
||||
|
||||
|
|
|
@ -36,7 +36,7 @@ tests:
|
|||
kernel.fpu_sharing.generic.x86.fpu:
|
||||
extra_args: CONF_FILE=prj_x86.conf
|
||||
extra_configs:
|
||||
- CONFIG_SSE_FP_MATH=n
|
||||
- CONFIG_X86_SSE_FP_MATH=n
|
||||
platform_allow: qemu_x86
|
||||
slow: true
|
||||
tags: kernel
|
||||
|
@ -44,7 +44,7 @@ tests:
|
|||
kernel.fpu_sharing.generic.x86.sse:
|
||||
extra_args: CONF_FILE=prj_x86.conf
|
||||
extra_configs:
|
||||
- CONFIG_SSE_FP_MATH=y
|
||||
- CONFIG_X86_SSE_FP_MATH=y
|
||||
platform_allow: qemu_x86
|
||||
slow: true
|
||||
tags: kernel
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue