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soc: esp32: change SRAM1_IRAM_START macro definition

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Changes the SRAM1_IRAM_START macro definition for:
- esp32c2
- esp32c3

Signed-off-by: Marcio Ribeiro <marcio.ribeiro@espressif.com>
This commit is contained in:
Marcio Ribeiro 2024-12-10 14:03:30 -03:00 • committed by Benjamin Cabé
commit cdbb1ddbad
2 changed files with 2 additions and 2 deletions
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2
soc/espressif/esp32c2/memory.h
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@ -9,7 +9,7 @@
#define SRAM0_SIZE DT_REG_SIZE(DT_NODELABEL(sram0))
/* SRAM1 (256kB) memory */
#define SRAM1_IRAM_START (SRAM0_IRAM_START + SRAM0_SIZE)
#define SRAM1_IRAM_START (SRAM1_DRAM_START + IRAM_DRAM_OFFSET)
#define SRAM1_DRAM_START DT_REG_ADDR(DT_NODELABEL(sram1))
#define SRAM1_SIZE DT_REG_SIZE(DT_NODELABEL(sram1))

2
soc/espressif/esp32c3/memory.h
View file

@ -9,7 +9,7 @@
#define SRAM0_SIZE DT_REG_SIZE(DT_NODELABEL(sram0))
/* SRAM1 (384kB) memory */
#define SRAM1_DRAM_START DT_REG_ADDR(DT_NODELABEL(sram1))
#define SRAM1_IRAM_START (SRAM0_IRAM_START + SRAM0_SIZE)
#define SRAM1_IRAM_START (SRAM1_DRAM_START + IRAM_DRAM_OFFSET)
#define SRAM1_SIZE DT_REG_SIZE(DT_NODELABEL(sram1))
/* ICache size is fixed to 16KB on ESP32-C3 */
#define ICACHE_SIZE SRAM0_SIZE