diff --git a/boards/arm/stm32l496g_disco/CMakeLists.txt b/boards/arm/stm32l496g_disco/CMakeLists.txt
new file mode 100644
index 00000000000..a3f1c5f24e9
--- /dev/null
+++ b/boards/arm/stm32l496g_disco/CMakeLists.txt
@@ -0,0 +1,4 @@
+#  Copyright (c) 2021 STMicroelectronics
+#  SPDX-License-Identifier: Apache-2.0
+
+zephyr_sources_ifdef(CONFIG_ADC board_adc_vref.c)
diff --git a/boards/arm/stm32l496g_disco/board_adc_vref.c b/boards/arm/stm32l496g_disco/board_adc_vref.c
new file mode 100644
index 00000000000..1a1749674aa
--- /dev/null
+++ b/boards/arm/stm32l496g_disco/board_adc_vref.c
@@ -0,0 +1,31 @@
+/*
+ * Copyright (c) 2021 STMicroelectronics
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr.h>
+#include <init.h>
+#include <stm32_ll_adc.h>
+#include <devicetree.h>
+
+static int enable_adc_reference(const struct device *dev)
+{
+	uint8_t init_status;
+	/* VREF+ is not connected to VDDA by default */
+	/* Use 2.5V as reference (instead of 3.3V) for internal channels
+	 * calculation
+	 */
+	__HAL_RCC_SYSCFG_CLK_ENABLE();
+
+	/* VREF_OUT2 = 2.5 V */
+	HAL_SYSCFG_VREFBUF_VoltageScalingConfig(SYSCFG_VREFBUF_VOLTAGE_SCALE1);
+	HAL_SYSCFG_VREFBUF_HighImpedanceConfig(
+					SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE);
+
+	init_status = HAL_SYSCFG_EnableVREFBUF();
+	__ASSERT(init_status == HAL_OK,	"ADC Conversion value may be incorrect");
+
+	return init_status;
+}
+
+SYS_INIT(enable_adc_reference, POST_KERNEL, 0);
diff --git a/boards/arm/stm32l496g_disco/doc/index.rst b/boards/arm/stm32l496g_disco/doc/index.rst
index d5abf9d040f..90043fb3e99 100644
--- a/boards/arm/stm32l496g_disco/doc/index.rst
+++ b/boards/arm/stm32l496g_disco/doc/index.rst
@@ -146,6 +146,8 @@ The Zephyr stm32l496g_disco board configuration supports the following hardware
 +-----------+------------+-------------------------------------+
 | PWM       | on-chip    | pwm                                 |
 +-----------+------------+-------------------------------------+
+| ADC       | on-chip    | adc                                 |
++-----------+------------+-------------------------------------+
 
 Other hardware features are not yet supported on this Zephyr port.
 
diff --git a/boards/arm/stm32l496g_disco/stm32l496g_disco.dts b/boards/arm/stm32l496g_disco/stm32l496g_disco.dts
index 20bf25548f0..dbbee2d0a24 100644
--- a/boards/arm/stm32l496g_disco/stm32l496g_disco.dts
+++ b/boards/arm/stm32l496g_disco/stm32l496g_disco.dts
@@ -134,3 +134,8 @@
 		     &sdmmc1_ck_pc12 &sdmmc1_cmd_pd2>;
 	status = "okay";
 };
+
+&adc1 {
+	pinctrl-0 = < &adc1_in2_pc1>;
+	status = "okay";
+};
diff --git a/boards/arm/stm32l496g_disco/stm32l496g_disco.yaml b/boards/arm/stm32l496g_disco/stm32l496g_disco.yaml
index aa5d7136ce3..be69f323831 100644
--- a/boards/arm/stm32l496g_disco/stm32l496g_disco.yaml
+++ b/boards/arm/stm32l496g_disco/stm32l496g_disco.yaml
@@ -16,3 +16,4 @@ supported:
   - gpio
   - counter
   - sdhc
+  - adc