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timer: riscv_machine_timer: prevent spurious interrupt while rearming the timer

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Rearming the riscv machine timer is done by first updating the
mtimecmp low value register. If the low value is updated with a
relatively small value, a timer interrupt can be generated while
updating the mtimecmp high value.

To avoid such a spurious interrupt to occur, disable the timer
interrupt while rearming the timer.

Change-Id: I50ab3f19554a9a8dfe70943b6da0d20be3de88dc
Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
This commit is contained in:
Jean-Paul Etienne 2017-03-14 22:15:16 +01:00 • committed by Anas Nashif
commit cd14317c41
1 changed files with 10 additions and 2 deletions
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12
drivers/timer/riscv_machine_timer.c
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@ -31,6 +31,13 @@ static ALWAYS_INLINE void riscv_machine_rearm_timer(void)
{ {
uint64_t rtc; uint64_t rtc;
/*
* Disable timer interrupt while rearming the timer
* to avoid generation of interrupts while setting
* the mtimecmp->val_low register.
*/
irq_disable(RISCV_MACHINE_TIMER_IRQ);
/* /*
* Following machine-mode timer implementation in QEMU, the actual * Following machine-mode timer implementation in QEMU, the actual
* RTC read is performed when reading low timer value register. * RTC read is performed when reading low timer value register.
@ -49,6 +56,9 @@ static ALWAYS_INLINE void riscv_machine_rearm_timer(void)
rtc += sys_clock_hw_cycles_per_tick; rtc += sys_clock_hw_cycles_per_tick;
mtimecmp->val_low = (uint32_t)(rtc & 0xffffffff); mtimecmp->val_low = (uint32_t)(rtc & 0xffffffff);
mtimecmp->val_high = (uint32_t)((rtc >> 32) & 0xffffffff); mtimecmp->val_high = (uint32_t)((rtc >> 32) & 0xffffffff);
/* Enable timer interrupt */
irq_enable(RISCV_MACHINE_TIMER_IRQ);
} }
static void riscv_machine_timer_irq_handler(void *unused) static void riscv_machine_timer_irq_handler(void *unused)
@ -72,8 +82,6 @@ int _sys_clock_driver_init(struct device *device)
IRQ_CONNECT(RISCV_MACHINE_TIMER_IRQ, 0, IRQ_CONNECT(RISCV_MACHINE_TIMER_IRQ, 0,
riscv_machine_timer_irq_handler, NULL, 0); riscv_machine_timer_irq_handler, NULL, 0);
irq_enable(RISCV_MACHINE_TIMER_IRQ);
/* Initialize timer, just call riscv_machine_rearm_timer */ /* Initialize timer, just call riscv_machine_rearm_timer */
riscv_machine_rearm_timer(); riscv_machine_rearm_timer();