diff --git a/drivers/adc/adc_dw.c b/drivers/adc/adc_dw.c
index a8ea5bf8415..295aca1a488 100644
--- a/drivers/adc/adc_dw.c
+++ b/drivers/adc/adc_dw.c
@@ -52,10 +52,10 @@
 static void adc_config_irq(void);
 
 #ifdef CONFIG_ADC_DW_CALIBRATION
-static void calibration_command(uint8_t command)
+static void calibration_command(u8_t command)
 {
-	uint32_t state;
-	uint32_t reg_value;
+	u32_t state;
+	u32_t reg_value;
 
 	state = irq_lock();
 	reg_value = sys_in32(PERIPH_ADDR_BASE_CREG_MST0);
@@ -77,9 +77,9 @@ static void calibration_command(uint8_t command)
 static void adc_goto_normal_mode(struct device *dev)
 {
 	struct adc_info *info = dev->driver_data;
-	uint8_t calibration_value;
-	uint32_t reg_value;
-	uint32_t state;
+	u8_t calibration_value;
+	u32_t reg_value;
+	u32_t state;
 
 	reg_value = sys_in32(PERIPH_ADDR_BASE_CREG_SLV0);
 
@@ -119,8 +119,8 @@ static void adc_goto_normal_mode(struct device *dev)
 #else
 static void adc_goto_normal_mode(struct device *dev)
 {
-	uint32_t reg_value;
-	uint32_t state;
+	u32_t reg_value;
+	u32_t state;
 
 	ARG_UNUSED(dev);
 	reg_value = sys_in32(
@@ -159,8 +159,8 @@ static void adc_goto_normal_mode(struct device *dev)
 
 static void adc_goto_deep_power_down(void)
 {
-	uint32_t reg_value;
-	uint32_t state;
+	u32_t reg_value;
+	u32_t state;
 
 	reg_value = sys_in32(PERIPH_ADDR_BASE_CREG_SLV0);
 	if ((reg_value & 0xE >> 1) != 0) {
@@ -182,10 +182,10 @@ static void adc_goto_deep_power_down(void)
 
 static void adc_dw_enable(struct device *dev)
 {
-	uint32_t reg_value;
+	u32_t reg_value;
 	struct adc_info *info = dev->driver_data;
 	const struct adc_config *config = dev->config->config_info;
-	uint32_t adc_base = config->reg_base;
+	u32_t adc_base = config->reg_base;
 
 	/*Go to Normal Mode*/
 	sys_out32(ADC_INT_DSB|ENABLE_ADC, adc_base + ADC_CTRL);
@@ -202,10 +202,10 @@ static void adc_dw_enable(struct device *dev)
 
 static void adc_dw_disable(struct device *dev)
 {
-	uint32_t saved;
+	u32_t saved;
 	struct adc_info *info = dev->driver_data;
 	const struct adc_config *config = dev->config->config_info;
-	uint32_t adc_base = config->reg_base;
+	u32_t adc_base = config->reg_base;
 
 	sys_out32(ADC_INT_DSB|ENABLE_ADC, adc_base + ADC_CTRL);
 	adc_goto_deep_power_down();
@@ -221,15 +221,15 @@ static void adc_dw_disable(struct device *dev)
 
 static int adc_dw_read_request(struct device *dev, struct adc_seq_table *seq_tbl)
 {
-	uint32_t i;
-	uint32_t ctrl;
-	uint32_t tmp_val;
-	uint32_t num_iters;
-	uint32_t saved;
+	u32_t i;
+	u32_t ctrl;
+	u32_t tmp_val;
+	u32_t num_iters;
+	u32_t saved;
 	struct adc_seq_entry *entry;
 	struct adc_info *info = dev->driver_data;
 	const struct adc_config *config = dev->config->config_info;
-	uint32_t adc_base = config->reg_base;
+	u32_t adc_base = config->reg_base;
 
 	if (info->state != ADC_STATE_IDLE) {
 		return 1;
@@ -312,10 +312,10 @@ static struct adc_driver_api api_funcs = {
 
 int adc_dw_init(struct device *dev)
 {
-	uint32_t tmp_val;
-	uint32_t val;
+	u32_t tmp_val;
+	u32_t val;
 	const struct adc_config *config = dev->config->config_info;
-	uint32_t adc_base = config->reg_base;
+	u32_t adc_base = config->reg_base;
 	struct adc_info *info = dev->driver_data;
 
 	sys_out32(ADC_INT_DSB | ADC_CLK_ENABLE, adc_base + ADC_CTRL);
@@ -353,17 +353,17 @@ static void adc_dw_rx_isr(void *arg)
 	struct device_config *dev_config = dev->config;
 	const struct adc_config *config = dev_config->config_info;
 	struct adc_info *info = dev->driver_data;
-	uint32_t adc_base = config->reg_base;
+	u32_t adc_base = config->reg_base;
 	struct adc_seq_entry *entries = info->entries;
-	uint32_t reg_val;
-	uint32_t seq_index;
+	u32_t reg_val;
+	u32_t seq_index;
 
 	for (seq_index = 0; seq_index < info->seq_size; seq_index++) {
-		uint32_t *adc_buffer;
+		u32_t *adc_buffer;
 
 		reg_val = sys_in32(adc_base + ADC_SET);
 		sys_out32(reg_val|ADC_POP_SAMPLE, adc_base + ADC_SET);
-		adc_buffer = (uint32_t *)entries[seq_index].buffer;
+		adc_buffer = (u32_t *)entries[seq_index].buffer;
 		*adc_buffer = sys_in32(adc_base + ADC_SAMPLE);
 	}
 
@@ -386,15 +386,15 @@ static void adc_dw_rx_isr(void *arg)
 	struct device_config *dev_config = dev->config;
 	const struct adc_config *config = dev_config->config_info;
 	struct adc_info *info = dev->driver_data;
-	uint32_t adc_base = config->reg_base;
+	u32_t adc_base = config->reg_base;
 	struct adc_seq_entry *entries = info->entries;
-	uint32_t reg_val;
-	uint32_t sequence_index;
-	uint8_t full_buffer_flag = 0;
+	u32_t reg_val;
+	u32_t sequence_index;
+	u8_t full_buffer_flag = 0;
 
 	for (sequence_index = 0; sequence_index < info->seq_size; sequence_index++) {
-		uint32_t *adc_buffer;
-		uint32_t repetitive_index;
+		u32_t *adc_buffer;
+		u32_t repetitive_index;
 
 		repetitive_index = info->index[sequence_index];
 		/*API array is 8 bits array but ADC reads blocks of 32 bits with every sample.*/
@@ -405,7 +405,7 @@ static void adc_dw_rx_isr(void *arg)
 
 		reg_val = sys_in32(adc_base + ADC_SET);
 		sys_out32(reg_val|ADC_POP_SAMPLE, adc_base + ADC_SET);
-		adc_buffer = (uint32_t *)entries[sequence_index].buffer;
+		adc_buffer = (u32_t *)entries[sequence_index].buffer;
 		adc_buffer[repetitive_index] = sys_in32(adc_base + ADC_SAMPLE);
 		repetitive_index++;
 		info->index[sequence_index] = repetitive_index;
@@ -437,8 +437,8 @@ static void adc_dw_err_isr(void *arg)
 	struct device *dev = (struct device *) arg;
 	const struct adc_config  *config = dev->config->config_info;
 	struct adc_info    *info   = dev->driver_data;
-	uint32_t adc_base = config->reg_base;
-	uint32_t reg_val = sys_in32(adc_base + ADC_SET);
+	u32_t adc_base = config->reg_base;
+	u32_t reg_val = sys_in32(adc_base + ADC_SET);
 
 
 	sys_out32(RESUME_ADC_CAPTURE, adc_base + ADC_CTRL);
diff --git a/drivers/adc/adc_dw.h b/drivers/adc/adc_dw.h
index c31f5e105f6..cdd5e2a5e04 100644
--- a/drivers/adc/adc_dw.h
+++ b/drivers/adc/adc_dw.h
@@ -160,24 +160,24 @@ typedef void (*adc_dw_config_t)(void);
  */
 struct adc_config {
 	/**Register base address for hardware registers.*/
-	uint32_t reg_base;
+	u32_t reg_base;
 	/**IIO address for the IRQ mask register.*/
-	uint32_t reg_irq_mask;
+	u32_t reg_irq_mask;
 	/**IIO address for the error mask register.*/
-	uint32_t reg_err_mask;
+	u32_t reg_err_mask;
 	/**Output mode*/
-	uint8_t  out_mode;
+	u8_t  out_mode;
 	/**Capture mode*/
-	uint8_t  capture_mode;
+	u8_t  capture_mode;
 	/**Sequence mode*/
-	uint8_t  seq_mode;
+	u8_t  seq_mode;
 	/**Serial delay*/
-	uint8_t  serial_dly;
+	u8_t  serial_dly;
 	/**Sample width*/
-	uint8_t  sample_width;
-	uint8_t  padding[3];
+	u8_t  sample_width;
+	u8_t  padding[3];
 	/**Clock ratio*/
-	uint32_t clock_ratio;
+	u32_t clock_ratio;
 	/**Config handler*/
 	adc_dw_config_t config_func;
 };
@@ -191,20 +191,20 @@ struct adc_info {
 	struct k_sem device_sync_sem;
 #ifdef CONFIG_ADC_DW_REPETITIVE
 	/**Current reception buffer index*/
-	uint8_t  index[BUFS_NUM];
+	u8_t  index[BUFS_NUM];
 #endif
 	/**Sequence entries' array*/
 	struct adc_seq_entry *entries;
 	/**State of execution of the driver*/
-	uint8_t  state;
+	u8_t  state;
 	/**Sequence size*/
-	uint8_t seq_size;
+	u8_t seq_size;
 #ifdef CONFIG_ADC_DW_CALIBRATION
 	/**Calibration value*/
-	uint8_t calibration_value;
+	u8_t calibration_value;
 #endif
 #ifdef CONFIG_ADC_DW_DUMMY_CONVERSION
-	uint8_t dummy_conversion;
+	u8_t dummy_conversion;
 #endif
 
 };
diff --git a/drivers/adc/adc_qmsi_ss.c b/drivers/adc/adc_qmsi_ss.c
index 3feb47a87c3..f8be737de0a 100644
--- a/drivers/adc/adc_qmsi_ss.c
+++ b/drivers/adc/adc_qmsi_ss.c
@@ -31,7 +31,7 @@ struct adc_info  {
 	struct k_sem device_sync_sem;
 	struct k_sem sem;
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
-	uint32_t device_power_state;
+	u32_t device_power_state;
 	qm_ss_adc_context_t adc_ctx;
 #endif
 };
@@ -239,14 +239,14 @@ static const struct adc_driver_api api_funcs = {
 
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
 static void adc_qmsi_ss_set_power_state(struct device *dev,
-					uint32_t power_state)
+					u32_t power_state)
 {
 	struct adc_info *context = dev->driver_data;
 
 	context->device_power_state = power_state;
 }
 
-static uint32_t adc_qmsi_ss_get_power_state(struct device *dev)
+static u32_t adc_qmsi_ss_get_power_state(struct device *dev)
 {
 	struct adc_info *context = dev->driver_data;
 
@@ -275,17 +275,17 @@ static int adc_qmsi_ss_resume_device_from_suspend(struct device *dev)
 	return 0;
 }
 
-static int adc_qmsi_ss_device_ctrl(struct device *dev, uint32_t ctrl_command,
+static int adc_qmsi_ss_device_ctrl(struct device *dev, u32_t ctrl_command,
 				   void *context)
 {
 	if (ctrl_command == DEVICE_PM_SET_POWER_STATE) {
-		if (*((uint32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
+		if (*((u32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
 			return adc_qmsi_ss_suspend_device(dev);
-		} else if (*((uint32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
+		} else if (*((u32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
 			return adc_qmsi_ss_resume_device_from_suspend(dev);
 		}
 	} else if (ctrl_command == DEVICE_PM_GET_POWER_STATE) {
-		*((uint32_t *)context) = adc_qmsi_ss_get_power_state(dev);
+		*((u32_t *)context) = adc_qmsi_ss_get_power_state(dev);
 	}
 
 	return 0;
@@ -327,7 +327,7 @@ DEVICE_DEFINE(adc_qmsi_ss, CONFIG_ADC_0_NAME, &adc_qmsi_ss_init,
 
 static void adc_config_irq(void)
 {
-	uint32_t *scss_intmask;
+	u32_t *scss_intmask;
 
 	IRQ_CONNECT(IRQ_ADC_IRQ, CONFIG_ADC_0_IRQ_PRI,
 				adc_qmsi_ss_rx_isr, DEVICE_GET(adc_qmsi_ss), 0);
@@ -338,9 +338,9 @@ static void adc_config_irq(void)
 	irq_enable(IRQ_ADC_ERR);
 
 	scss_intmask =
-		(uint32_t *)&QM_INTERRUPT_ROUTER->ss_adc_0_error_int_mask;
+		(u32_t *)&QM_INTERRUPT_ROUTER->ss_adc_0_error_int_mask;
 	*scss_intmask &= ~BIT(8);
 
-	scss_intmask = (uint32_t *)&QM_INTERRUPT_ROUTER->ss_adc_0_int_mask;
+	scss_intmask = (u32_t *)&QM_INTERRUPT_ROUTER->ss_adc_0_int_mask;
 	*scss_intmask &= ~BIT(8);
 }
diff --git a/drivers/adc/adc_ti_adc108s102.c b/drivers/adc/adc_ti_adc108s102.c
index 291a119d6cd..c746202c1a8 100644
--- a/drivers/adc/adc_ti_adc108s102.c
+++ b/drivers/adc/adc_ti_adc108s102.c
@@ -24,7 +24,7 @@ static inline int _ti_adc108s102_sampling(struct device *dev)
 
 	SYS_LOG_DBG("Sampling!\n");
 
-	/* SPI deals with uint8_t buffers so multiplying by 2 the length */
+	/* SPI deals with u8_t buffers so multiplying by 2 the length */
 	return spi_transceive(adc->spi, adc->cmd_buffer,
 			      adc->cmd_buf_len * 2,
 			      adc->sampling_buffer,
@@ -37,7 +37,7 @@ static inline void _ti_adc108s102_handle_result(struct device *dev)
 	struct adc_seq_table *seq_table = adc->seq_table;
 	struct ti_adc108s102_chan *chan;
 	struct adc_seq_entry *entry;
-	uint32_t s_i, i;
+	u32_t s_i, i;
 
 	SYS_LOG_DBG("_ti_adc108s102_handle_result()");
 
@@ -49,20 +49,20 @@ static inline void _ti_adc108s102_handle_result(struct device *dev)
 			continue;
 		}
 
-		*((uint16_t *)(entry->buffer+chan->buf_idx)) =
+		*((u16_t *)(entry->buffer+chan->buf_idx)) =
 				ADC108S102_RESULT(adc->sampling_buffer[s_i]);
 
 		chan->buf_idx += 2;
 	}
 }
 
-static inline int32_t _ti_adc108s102_prepare(struct device *dev)
+static inline s32_t _ti_adc108s102_prepare(struct device *dev)
 {
 	struct ti_adc108s102_data *adc = dev->driver_data;
 	struct adc_seq_table *seq_table = adc->seq_table;
 	struct ti_adc108s102_chan *chan;
-	int32_t sampling_delay = 0;
-	uint32_t i;
+	s32_t sampling_delay = 0;
+	u32_t i;
 
 	adc->cmd_buf_len = 0;
 	adc->sampling_buf_len = 1; /* Counting the dummy byte */
@@ -120,7 +120,7 @@ static void ti_adc108s102_disable(struct device *dev)
 static inline int _verify_entries(struct adc_seq_table *seq_table)
 {
 	struct adc_seq_entry *entry;
-	uint32_t chans_set = 0;
+	u32_t chans_set = 0;
 	int i;
 
 	for (i = 0; i < seq_table->num_entries; i++) {
@@ -148,7 +148,7 @@ static int ti_adc108s102_read(struct device *dev,
 	struct ti_adc108s102_data *adc = dev->driver_data;
 	struct spi_config spi_conf;
 	int ret = 0;
-	int32_t delay;
+	s32_t delay;
 
 	spi_conf.config = config->spi_config_flags;
 	spi_conf.max_sys_freq = config->spi_freq;
@@ -178,7 +178,7 @@ static int ti_adc108s102_read(struct device *dev,
 		}
 
 		/* convert to milliseconds */
-		delay = (int32_t)((MSEC_PER_SEC * (uint64_t)delay) /
+		delay = (s32_t)((MSEC_PER_SEC * (u64_t)delay) /
 			sys_clock_ticks_per_sec);
 
 		k_sleep(delay);
diff --git a/drivers/adc/adc_ti_adc108s102.h b/drivers/adc/adc_ti_adc108s102.h
index f9afff09518..9f5ce406cd6 100644
--- a/drivers/adc/adc_ti_adc108s102.h
+++ b/drivers/adc/adc_ti_adc108s102.h
@@ -25,7 +25,7 @@ extern "C" {
 #define ADC108S102_SAMPLING_BUFFER_SIZE		9
 #define ADC108S102_CHANNELS			8
 #define ADC108S102_CHANNELS_SIZE		\
-			(ADC108S102_CHANNELS * sizeof(uint32_t))
+			(ADC108S102_CHANNELS * sizeof(u32_t))
 #define ADC108S102_CHANNEL_CMD(_channel_)	\
 			sys_cpu_to_be16((_channel_ << 8) << 3)
 #define ADC108S102_RESULT_MASK			0xfff /* 12 bits resolution */
@@ -34,25 +34,25 @@ extern "C" {
 
 struct ti_adc108s102_config {
 	const char *spi_port;
-	uint32_t spi_config_flags;
-	uint32_t spi_freq;
-	uint32_t spi_slave;
+	u32_t spi_config_flags;
+	u32_t spi_freq;
+	u32_t spi_slave;
 };
 
 struct ti_adc108s102_chan {
-	uint32_t buf_idx;
+	u32_t buf_idx;
 };
 
 struct ti_adc108s102_data {
-	uint16_t cmd_buffer[ADC108S102_CMD_BUFFER_SIZE];
-	uint16_t sampling_buffer[ADC108S102_SAMPLING_BUFFER_SIZE];
+	u16_t cmd_buffer[ADC108S102_CMD_BUFFER_SIZE];
+	u16_t sampling_buffer[ADC108S102_SAMPLING_BUFFER_SIZE];
 	struct device *spi;
 	struct ti_adc108s102_chan chans[ADC108S102_CHANNELS];
 	struct adc_seq_table *seq_table;
 
-	uint8_t cmd_buf_len;
-	uint8_t sampling_buf_len;
-	uint8_t stride[2];
+	u8_t cmd_buf_len;
+	u8_t sampling_buf_len;
+	u8_t stride[2];
 };
 
 #ifdef __cplusplus
diff --git a/drivers/aio/aio_comparator_qmsi.c b/drivers/aio/aio_comparator_qmsi.c
index 33cd773d06d..3a41285e7fc 100644
--- a/drivers/aio/aio_comparator_qmsi.c
+++ b/drivers/aio/aio_comparator_qmsi.c
@@ -30,7 +30,7 @@ struct aio_qmsi_cmp_cb {
 
 struct aio_qmsi_cmp_dev_data_t {
 	/** Number of total comparators */
-	uint8_t num_cmp;
+	u8_t num_cmp;
 	/** Callback for each comparator */
 	struct aio_qmsi_cmp_cb cb[AIO_QMSI_CMP_COUNT];
 };
@@ -40,7 +40,7 @@ static qm_ac_config_t config;
 
 static int aio_cmp_config(struct device *dev);
 
-static int aio_qmsi_cmp_disable(struct device *dev, uint8_t index)
+static int aio_qmsi_cmp_disable(struct device *dev, u8_t index)
 {
 	if (index >= AIO_QMSI_CMP_COUNT) {
 		return -EINVAL;
@@ -62,7 +62,7 @@ static int aio_qmsi_cmp_disable(struct device *dev, uint8_t index)
 	return 0;
 }
 
-static int aio_qmsi_cmp_configure(struct device *dev, uint8_t index,
+static int aio_qmsi_cmp_configure(struct device *dev, u8_t index,
 			 enum aio_cmp_polarity polarity,
 			 enum aio_cmp_ref refsel,
 			 aio_cmp_cb cb, void *param)
@@ -106,7 +106,7 @@ static int aio_qmsi_cmp_configure(struct device *dev, uint8_t index,
 	return 0;
 }
 
-static uint32_t aio_cmp_qmsi_get_pending_int(struct device *dev)
+static u32_t aio_cmp_qmsi_get_pending_int(struct device *dev)
 {
 	return QM_SCSS_CMP->cmp_stat_clr;
 }
@@ -119,7 +119,7 @@ static const struct aio_cmp_driver_api aio_cmp_funcs = {
 
 static int aio_qmsi_cmp_init(struct device *dev)
 {
-	uint8_t i;
+	u8_t i;
 	struct aio_qmsi_cmp_dev_data_t *dev_data =
 		(struct aio_qmsi_cmp_dev_data_t *)dev->driver_data;
 
@@ -154,12 +154,12 @@ static int aio_qmsi_cmp_init(struct device *dev)
 
 static void aio_qmsi_cmp_isr(void *data)
 {
-	uint8_t i;
+	u8_t i;
 	struct device *dev = data;
 	struct aio_qmsi_cmp_dev_data_t *dev_data =
 		(struct aio_qmsi_cmp_dev_data_t *)dev->driver_data;
 
-	uint32_t int_status = QM_SCSS_CMP->cmp_stat_clr;
+	u32_t int_status = QM_SCSS_CMP->cmp_stat_clr;
 
 	for (i = 0; i < dev_data->num_cmp; i++) {
 		if (int_status & (1 << i)) {
diff --git a/drivers/clock_control/beetle_clock_control.c b/drivers/clock_control/beetle_clock_control.c
index fce6b100fd2..49c8219e824 100644
--- a/drivers/clock_control/beetle_clock_control.c
+++ b/drivers/clock_control/beetle_clock_control.c
@@ -21,15 +21,15 @@
 
 struct beetle_clock_control_cfg_t {
 	/* Clock Control ID */
-	uint32_t clock_control_id;
+	u32_t clock_control_id;
 	/* Clock control freq */
-	uint32_t freq;
+	u32_t freq;
 };
 
-static inline void beetle_set_clock(volatile uint32_t *base,
-				    uint8_t bit, enum arm_soc_state_t state)
+static inline void beetle_set_clock(volatile u32_t *base,
+				    u8_t bit, enum arm_soc_state_t state)
 {
-	uint32_t key;
+	u32_t key;
 
 	key = irq_lock();
 
@@ -50,31 +50,31 @@ static inline void beetle_set_clock(volatile uint32_t *base,
 	irq_unlock(key);
 }
 
-static inline void beetle_ahb_set_clock_on(uint8_t bit,
+static inline void beetle_ahb_set_clock_on(u8_t bit,
 					   enum arm_soc_state_t state)
 {
-	beetle_set_clock((volatile uint32_t *)&(__BEETLE_SYSCON->ahbclkcfg0set),
+	beetle_set_clock((volatile u32_t *)&(__BEETLE_SYSCON->ahbclkcfg0set),
 			 bit, state);
 }
 
-static inline void beetle_ahb_set_clock_off(uint8_t bit,
+static inline void beetle_ahb_set_clock_off(u8_t bit,
 					    enum arm_soc_state_t state)
 {
-	beetle_set_clock((volatile uint32_t *)&(__BEETLE_SYSCON->ahbclkcfg0clr),
+	beetle_set_clock((volatile u32_t *)&(__BEETLE_SYSCON->ahbclkcfg0clr),
 			 bit, state);
 }
 
-static inline void beetle_apb_set_clock_on(uint8_t bit,
+static inline void beetle_apb_set_clock_on(u8_t bit,
 					   enum arm_soc_state_t state)
 {
-	beetle_set_clock((volatile uint32_t *)&(__BEETLE_SYSCON->apbclkcfg0set),
+	beetle_set_clock((volatile u32_t *)&(__BEETLE_SYSCON->apbclkcfg0set),
 			 bit, state);
 }
 
-static inline void beetle_apb_set_clock_off(uint8_t bit,
+static inline void beetle_apb_set_clock_off(u8_t bit,
 					    enum arm_soc_state_t state)
 {
-	beetle_set_clock((volatile uint32_t *)&(__BEETLE_SYSCON->apbclkcfg0clr),
+	beetle_set_clock((volatile u32_t *)&(__BEETLE_SYSCON->apbclkcfg0clr),
 			 bit, state);
 }
 
@@ -84,7 +84,7 @@ static inline int beetle_clock_control_on(struct device *dev,
 	struct arm_clock_control_t *beetle_cc =
 				(struct arm_clock_control_t *)(sub_system);
 
-	uint8_t bit = 0;
+	u8_t bit = 0;
 
 	switch (beetle_cc->bus) {
 	case CMSDK_AHB:
@@ -108,7 +108,7 @@ static inline int beetle_clock_control_off(struct device *dev,
 	struct arm_clock_control_t *beetle_cc =
 				(struct arm_clock_control_t *)(sub_system);
 
-	uint8_t bit = 0;
+	u8_t bit = 0;
 
 	switch (beetle_cc->bus) {
 	case CMSDK_AHB:
@@ -127,12 +127,12 @@ static inline int beetle_clock_control_off(struct device *dev,
 
 static int beetle_clock_control_get_subsys_rate(struct device *clock,
 					      clock_control_subsys_t sub_system,
-					      uint32_t *rate)
+					      u32_t *rate)
 {
 #ifdef CONFIG_CLOCK_CONTROL_BEETLE_ENABLE_PLL
 	const struct beetle_clock_control_cfg_t * const cfg =
 						clock->config->config_info;
-	uint32_t nc_mainclk = beetle_round_freq(cfg->freq);
+	u32_t nc_mainclk = beetle_round_freq(cfg->freq);
 
 	*rate = nc_mainclk;
 #else
@@ -152,9 +152,9 @@ static const struct clock_control_driver_api beetle_clock_control_api = {
 };
 
 #ifdef CONFIG_CLOCK_CONTROL_BEETLE_ENABLE_PLL
-static uint32_t beetle_round_freq(uint32_t mainclk)
+static u32_t beetle_round_freq(u32_t mainclk)
 {
-	uint32_t nc_mainclk = 0;
+	u32_t nc_mainclk = 0;
 
 	/*
 	 * Verify that the frequency is in the supported range otherwise
@@ -173,9 +173,9 @@ static uint32_t beetle_round_freq(uint32_t mainclk)
 	return nc_mainclk;
 }
 
-static uint32_t beetle_get_prescaler(uint32_t mainclk)
+static u32_t beetle_get_prescaler(u32_t mainclk)
 {
-	uint32_t pre_mainclk = 0;
+	u32_t pre_mainclk = 0;
 
 	/*
 	 * Verify that the frequency is in the supported range otherwise
@@ -194,10 +194,10 @@ static uint32_t beetle_get_prescaler(uint32_t mainclk)
 	return pre_mainclk;
 }
 
-static int beetle_pll_enable(uint32_t mainclk)
+static int beetle_pll_enable(u32_t mainclk)
 {
 
-	uint32_t pre_mainclk = beetle_get_prescaler(mainclk);
+	u32_t pre_mainclk = beetle_get_prescaler(mainclk);
 
 	/* Set PLLCTRL Register */
 	__BEETLE_SYSCON->pllctrl = BEETLE_PLL_CONFIGURATION;
diff --git a/drivers/clock_control/nrf5_power_clock.c b/drivers/clock_control/nrf5_power_clock.c
index 80833ab443e..dc023998b1e 100644
--- a/drivers/clock_control/nrf5_power_clock.c
+++ b/drivers/clock_control/nrf5_power_clock.c
@@ -13,12 +13,12 @@
 #include <misc/__assert.h>
 #include <arch/arm/cortex_m/cmsis.h>
 
-static uint8_t m16src_ref;
-static uint8_t m16src_grd;
+static u8_t m16src_ref;
+static u8_t m16src_grd;
 
 static int _m16src_start(struct device *dev, clock_control_subsys_t sub_system)
 {
-	uint32_t imask;
+	u32_t imask;
 	bool blocking;
 
 	/* If the clock is already started then just increment refcount.
@@ -48,7 +48,7 @@ static int _m16src_start(struct device *dev, clock_control_subsys_t sub_system)
 	/* If blocking then spin-wait in CPU sleep until 16MHz clock settles. */
 	blocking = POINTER_TO_UINT(sub_system);
 	if (blocking) {
-		uint32_t intenset;
+		u32_t intenset;
 
 		irq_disable(POWER_CLOCK_IRQn);
 
@@ -98,7 +98,7 @@ hf_already_started:
 
 static int _m16src_stop(struct device *dev, clock_control_subsys_t sub_system)
 {
-	uint32_t imask;
+	u32_t imask;
 
 	ARG_UNUSED(sub_system);
 
@@ -139,8 +139,8 @@ static int _m16src_stop(struct device *dev, clock_control_subsys_t sub_system)
 
 static int _k32src_start(struct device *dev, clock_control_subsys_t sub_system)
 {
-	uint32_t lf_clk_src;
-	uint32_t intenset;
+	u32_t lf_clk_src;
+	u32_t intenset;
 
 	/* TODO: implement the ref count and re-entrancy guard, if a use-case
 	 * needs it.
@@ -217,7 +217,7 @@ static int _k32src_start(struct device *dev, clock_control_subsys_t sub_system)
 
 static void _power_clock_isr(void *arg)
 {
-	uint8_t pof, hf_intenset, hf_stat, hf, lf, done, ctto;
+	u8_t pof, hf_intenset, hf_stat, hf, lf, done, ctto;
 	struct device *dev = arg;
 
 	pof = (NRF_POWER->EVENTS_POFWARN != 0);
diff --git a/drivers/clock_control/quark_se_clock_control.c b/drivers/clock_control/quark_se_clock_control.c
index bd705a0dea0..ee0975da340 100644
--- a/drivers/clock_control/quark_se_clock_control.c
+++ b/drivers/clock_control/quark_se_clock_control.c
@@ -23,14 +23,14 @@
 #include <logging/sys_log.h>
 
 struct quark_se_clock_control_config {
-	uint32_t base_address;
+	u32_t base_address;
 };
 
 static inline int quark_se_clock_control_on(struct device *dev,
 					    clock_control_subsys_t sub_system)
 {
 	const struct quark_se_clock_control_config *info = dev->config->config_info;
-	uint32_t subsys = POINTER_TO_INT(sub_system);
+	u32_t subsys = POINTER_TO_INT(sub_system);
 
 	if (sub_system == CLOCK_CONTROL_SUBSYS_ALL) {
 		SYS_LOG_DBG("Enabling all clock gates on dev %p", dev);
@@ -48,7 +48,7 @@ static inline int quark_se_clock_control_off(struct device *dev,
 					     clock_control_subsys_t sub_system)
 {
 	const struct quark_se_clock_control_config *info = dev->config->config_info;
-	uint32_t subsys = POINTER_TO_INT(sub_system);
+	u32_t subsys = POINTER_TO_INT(sub_system);
 
 	if (sub_system == CLOCK_CONTROL_SUBSYS_ALL) {
 		SYS_LOG_DBG("Disabling all clock gates on dev %p", dev);
diff --git a/drivers/clock_control/stm32_ll_clock.c b/drivers/clock_control/stm32_ll_clock.c
index b5b69041ea6..a5f67c359ba 100644
--- a/drivers/clock_control/stm32_ll_clock.c
+++ b/drivers/clock_control/stm32_ll_clock.c
@@ -35,7 +35,7 @@ static void config_bus_clk_init(LL_UTILS_ClkInitTypeDef *clk_init)
 					CONFIG_CLOCK_STM32_APB2_PRESCALER);
 }
 
-static uint32_t get_bus_clock(uint32_t clock, uint32_t prescaler)
+static u32_t get_bus_clock(u32_t clock, u32_t prescaler)
 {
 	return clock / prescaler;
 }
@@ -108,7 +108,7 @@ static inline int stm32_clock_control_off(struct device *dev,
 
 static int stm32_clock_control_get_subsys_rate(struct device *clock,
 						clock_control_subsys_t sub_system,
-						uint32_t *rate)
+						u32_t *rate)
 {
 	struct stm32_pclken *pclken = (struct stm32_pclken *)(sub_system);
 	/*
@@ -117,10 +117,10 @@ static int stm32_clock_control_get_subsys_rate(struct device *clock,
 	 * since it will be updated after clock configuration and hence
 	 * more likely to contain actual clock speed
 	 */
-	uint32_t ahb_clock = SystemCoreClock;
-	uint32_t apb1_clock = get_bus_clock(ahb_clock,
+	u32_t ahb_clock = SystemCoreClock;
+	u32_t apb1_clock = get_bus_clock(ahb_clock,
 				CONFIG_CLOCK_STM32_APB1_PRESCALER);
-	uint32_t apb2_clock = get_bus_clock(ahb_clock,
+	u32_t apb2_clock = get_bus_clock(ahb_clock,
 				CONFIG_CLOCK_STM32_APB2_PRESCALER);
 
 	ARG_UNUSED(clock);
diff --git a/drivers/clock_control/stm32f107xx_clock.c b/drivers/clock_control/stm32f107xx_clock.c
index b5cd07c8776..a26d3c04712 100644
--- a/drivers/clock_control/stm32f107xx_clock.c
+++ b/drivers/clock_control/stm32f107xx_clock.c
@@ -21,7 +21,7 @@
 #include <clock_control/stm32_clock_control.h>
 
 struct stm32f10x_rcc_data {
-	uint8_t *base;
+	u8_t *base;
 };
 
 static inline int stm32f10x_clock_control_on(struct device *dev,
@@ -30,7 +30,7 @@ static inline int stm32f10x_clock_control_on(struct device *dev,
 	struct stm32f10x_rcc_data *data = dev->driver_data;
 	volatile struct stm32f10x_rcc *rcc =
 		(struct stm32f10x_rcc *)(data->base);
-	uint32_t subsys = POINTER_TO_UINT(sub_system);
+	u32_t subsys = POINTER_TO_UINT(sub_system);
 
 	if (subsys > STM32F10X_CLOCK_APB2_BASE) {
 		subsys &=  ~(STM32F10X_CLOCK_APB2_BASE);
@@ -48,7 +48,7 @@ static inline int stm32f10x_clock_control_off(struct device *dev,
 	struct stm32f10x_rcc_data *data = dev->driver_data;
 	volatile struct stm32f10x_rcc *rcc =
 		(struct stm32f10x_rcc *)(data->base);
-	uint32_t subsys = POINTER_TO_UINT(sub_system);
+	u32_t subsys = POINTER_TO_UINT(sub_system);
 
 	if (subsys > STM32F10X_CLOCK_APB2_BASE) {
 		subsys &= ~(STM32F10X_CLOCK_APB2_BASE);
@@ -197,10 +197,10 @@ static int pll2mul(int mul)
 }
 #endif /* CONFIG_CLOCK_STM32F10X_CONN_LINE_PLL2_MULTIPLIER */
 
-static uint32_t get_ahb_clock(uint32_t sysclk)
+static u32_t get_ahb_clock(u32_t sysclk)
 {
 	/* AHB clock is generated based on SYSCLK  */
-	uint32_t sysclk_div =
+	u32_t sysclk_div =
 		CONFIG_CLOCK_STM32F10X_CONN_LINE_AHB_PRESCALER;
 
 	if (sysclk_div == 0) {
@@ -210,7 +210,7 @@ static uint32_t get_ahb_clock(uint32_t sysclk)
 	return sysclk / sysclk_div;
 }
 
-static uint32_t get_apb_clock(uint32_t ahb_clock, uint32_t prescaler)
+static u32_t get_apb_clock(u32_t ahb_clock, u32_t prescaler)
 {
 	if (prescaler == 0) {
 		prescaler = 1;
@@ -222,15 +222,15 @@ static uint32_t get_apb_clock(uint32_t ahb_clock, uint32_t prescaler)
 static
 int stm32f10x_clock_control_get_subsys_rate(struct device *clock,
 					    clock_control_subsys_t sub_system,
-					    uint32_t *rate)
+					    u32_t *rate)
 {
 	ARG_UNUSED(clock);
 
-	uint32_t subsys = POINTER_TO_UINT(sub_system);
-	uint32_t prescaler =
+	u32_t subsys = POINTER_TO_UINT(sub_system);
+	u32_t prescaler =
 		CONFIG_CLOCK_STM32F10X_CONN_LINE_APB1_PRESCALER;
 	/* assumes SYSCLK is SYS_CLOCK_HW_CYCLES_PER_SEC */
-	uint32_t ahb_clock =
+	u32_t ahb_clock =
 		get_ahb_clock(CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC);
 
 	if (subsys > STM32F10X_CLOCK_APB2_BASE) {
@@ -275,26 +275,26 @@ static int stm32f10x_clock_control_init(struct device *dev)
 		(struct stm32f10x_rcc *)(data->base);
 	/* SYSCLK source defaults to HSI */
 	int sysclk_src = STM32F10X_RCC_CFG_SYSCLK_SRC_HSI;
-	uint32_t hpre =
+	u32_t hpre =
 		ahb_prescaler(CONFIG_CLOCK_STM32F10X_CONN_LINE_AHB_PRESCALER);
-	uint32_t ppre1 =
+	u32_t ppre1 =
 		apb_prescaler(CONFIG_CLOCK_STM32F10X_CONN_LINE_APB1_PRESCALER);
-	uint32_t ppre2 =
+	u32_t ppre2 =
 		apb_prescaler(CONFIG_CLOCK_STM32F10X_CONN_LINE_APB2_PRESCALER);
 #ifdef CONFIG_CLOCK_STM32F10X_CONN_LINE_PLL_MULTIPLIER
-	uint32_t pll_mul =
+	u32_t pll_mul =
 		pllmul(CONFIG_CLOCK_STM32F10X_CONN_LINE_PLL_MULTIPLIER);
 #endif	/* CONFIG_CLOCK_STM32F10X_CONN_LINE_PLL_MULTIPLIER */
 #ifdef CONFIG_CLOCK_STM32F10X_CONN_LINE_PLL2_MULTIPLIER
-	uint32_t pll2_mul =
+	u32_t pll2_mul =
 		pll2mul(CONFIG_CLOCK_STM32F10X_CONN_LINE_PLL2_MULTIPLIER);
 #endif /* CONFIG_CLOCK_STM32F10X_CONN_LINE_PLL2_MULTIPLIER */
 #ifdef CONFIG_CLOCK_STM32F10X_CONN_LINE_PREDIV1
-	uint32_t prediv1 =
+	u32_t prediv1 =
 		prediv_prescaler(CONFIG_CLOCK_STM32F10X_CONN_LINE_PREDIV1);
 #endif /* CONFIG_CLOCK_STM32F10X_CONN_LINE_PREDIV1 */
 #ifdef CONFIG_CLOCK_STM32F10X_CONN_LINE_PREDIV2
-	uint32_t prediv2 =
+	u32_t prediv2 =
 		prediv_prescaler(CONFIG_CLOCK_STM32F10X_CONN_LINE_PREDIV2);
 #endif /* CLOCK_STM32F10X_CONN_LINE_PREDIV2 */
 
@@ -406,7 +406,7 @@ static int stm32f10x_clock_control_init(struct device *dev)
 }
 
 static struct stm32f10x_rcc_data stm32f10x_rcc_data = {
-	.base = (uint8_t *)RCC_BASE,
+	.base = (u8_t *)RCC_BASE,
 };
 
 /* FIXME: move prescaler/multiplier defines into device config */
diff --git a/drivers/clock_control/stm32f10x_clock.c b/drivers/clock_control/stm32f10x_clock.c
index 16f16e35c81..90fea32c06b 100644
--- a/drivers/clock_control/stm32f10x_clock.c
+++ b/drivers/clock_control/stm32f10x_clock.c
@@ -22,7 +22,7 @@
 #include <clock_control/stm32_clock_control.h>
 
 struct stm32f10x_rcc_data {
-	uint8_t *base;
+	u8_t *base;
 };
 
 static inline int stm32f10x_clock_control_on(struct device *dev,
@@ -32,7 +32,7 @@ static inline int stm32f10x_clock_control_on(struct device *dev,
 
 	volatile struct stm32f10x_rcc *rcc = (struct stm32f10x_rcc *)(data->base);
 
-	uint32_t subsys = POINTER_TO_UINT(sub_system);
+	u32_t subsys = POINTER_TO_UINT(sub_system);
 
 	if (subsys > STM32F10X_CLOCK_APB2_BASE) {
 		subsys &=  ~(STM32F10X_CLOCK_APB2_BASE);
@@ -49,7 +49,7 @@ static inline int stm32f10x_clock_control_off(struct device *dev,
 	struct stm32f10x_rcc_data *data = dev->driver_data;
 	volatile struct stm32f10x_rcc *rcc =
 		(struct stm32f10x_rcc *)(data->base);
-	uint32_t subsys = POINTER_TO_UINT(sub_system);
+	u32_t subsys = POINTER_TO_UINT(sub_system);
 
 	if (subsys > STM32F10X_CLOCK_APB2_BASE) {
 		subsys &= ~(STM32F10X_CLOCK_APB2_BASE);
@@ -139,10 +139,10 @@ static int __pllmul(int mul)
 #endif	/* CONFIG_CLOCK_STM32F10X_PLL_MULTIPLIER */
 
 
-static uint32_t __get_ahb_clock(uint32_t sysclk)
+static u32_t __get_ahb_clock(u32_t sysclk)
 {
 	/* AHB clock is generated based on SYSCLK  */
-	uint32_t sysclk_div = CONFIG_CLOCK_STM32F10X_AHB_PRESCALER;
+	u32_t sysclk_div = CONFIG_CLOCK_STM32F10X_AHB_PRESCALER;
 
 	if (sysclk_div == 0) {
 		sysclk_div = 1;
@@ -150,7 +150,7 @@ static uint32_t __get_ahb_clock(uint32_t sysclk)
 	return sysclk / sysclk_div;
 }
 
-static uint32_t __get_apb_clock(uint32_t ahb_clock, uint32_t prescaler)
+static u32_t __get_apb_clock(u32_t ahb_clock, u32_t prescaler)
 {
 	if (prescaler == 0) {
 		prescaler = 1;
@@ -160,20 +160,20 @@ static uint32_t __get_apb_clock(uint32_t ahb_clock, uint32_t prescaler)
 
 static int stm32f10x_clock_control_get_subsys_rate(struct device *clock,
 						   clock_control_subsys_t sub_system,
-						   uint32_t *rate)
+						   u32_t *rate)
 {
 	ARG_UNUSED(clock);
 
-	uint32_t subsys = POINTER_TO_UINT(sub_system);
+	u32_t subsys = POINTER_TO_UINT(sub_system);
 
-	uint32_t prescaler = CONFIG_CLOCK_STM32F10X_APB1_PRESCALER;
+	u32_t prescaler = CONFIG_CLOCK_STM32F10X_APB1_PRESCALER;
 
 	if (subsys > STM32F10X_CLOCK_APB2_BASE) {
 		prescaler = CONFIG_CLOCK_STM32F10X_APB2_PRESCALER;
 	}
 
 	/* assumes SYSCLK is SYS_CLOCK_HW_CYCLES_PER_SEC */
-	uint32_t ahb_clock =
+	u32_t ahb_clock =
 		__get_ahb_clock(CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC);
 
 	*rate = __get_apb_clock(ahb_clock, prescaler);
@@ -213,11 +213,11 @@ static int stm32f10x_clock_control_init(struct device *dev)
 		(struct stm32f10x_rcc *)(data->base);
 	/* SYSCLK source defaults to HSI */
 	int sysclk_src = STM32F10X_RCC_CFG_SYSCLK_SRC_HSI;
-	uint32_t hpre = __ahb_prescaler(CONFIG_CLOCK_STM32F10X_AHB_PRESCALER);
-	uint32_t ppre1 = __apb_prescaler(CONFIG_CLOCK_STM32F10X_APB1_PRESCALER);
-	uint32_t ppre2 = __apb_prescaler(CONFIG_CLOCK_STM32F10X_APB2_PRESCALER);
+	u32_t hpre = __ahb_prescaler(CONFIG_CLOCK_STM32F10X_AHB_PRESCALER);
+	u32_t ppre1 = __apb_prescaler(CONFIG_CLOCK_STM32F10X_APB1_PRESCALER);
+	u32_t ppre2 = __apb_prescaler(CONFIG_CLOCK_STM32F10X_APB2_PRESCALER);
 #ifdef CONFIG_CLOCK_STM32F10X_PLL_MULTIPLIER
-	uint32_t pllmul = __pllmul(CONFIG_CLOCK_STM32F10X_PLL_MULTIPLIER);
+	u32_t pllmul = __pllmul(CONFIG_CLOCK_STM32F10X_PLL_MULTIPLIER);
 #endif	/* CONFIG_CLOCK_STM32F10X_PLL_MULTIPLIER */
 
 	/* disable PLL */
@@ -303,7 +303,7 @@ static int stm32f10x_clock_control_init(struct device *dev)
 }
 
 static struct stm32f10x_rcc_data stm32f10x_rcc_data = {
-	.base = (uint8_t *)RCC_BASE,
+	.base = (u8_t *)RCC_BASE,
 };
 
 /* FIXME: move prescaler/multiplier defines into device config */
diff --git a/drivers/clock_control/stm32f4x_clock.c b/drivers/clock_control/stm32f4x_clock.c
index 330776a6819..45c7781510e 100644
--- a/drivers/clock_control/stm32f4x_clock.c
+++ b/drivers/clock_control/stm32f4x_clock.c
@@ -23,7 +23,7 @@
 #include <clock_control/stm32_clock_control.h>
 
 struct stm32f4x_rcc_data {
-	uint8_t *base;
+	u8_t *base;
 };
 
 static inline int stm32f4x_clock_control_on(struct device *dev,
@@ -32,7 +32,7 @@ static inline int stm32f4x_clock_control_on(struct device *dev,
 	struct stm32f4x_rcc_data *data = dev->driver_data;
 	volatile struct stm32f4x_rcc *rcc = (struct stm32f4x_rcc *)(data->base);
 	struct stm32f4x_pclken *pclken = (struct stm32f4x_pclken *)(sub_system);
-	uint32_t tmpreg = 0;	/* Register delay helper */
+	u32_t tmpreg = 0;	/* Register delay helper */
 
 	switch (pclken->bus) {
 	case STM32F4X_CLOCK_BUS_AHB1:
@@ -62,7 +62,7 @@ static inline int stm32f4x_clock_control_off(struct device *dev,
 	struct stm32f4x_rcc_data *data = dev->driver_data;
 	volatile struct stm32f4x_rcc *rcc = (struct stm32f4x_rcc *)(data->base);
 	struct stm32f4x_pclken *pclken = (struct stm32f4x_pclken *)(sub_system);
-	uint32_t tmpreg = 0;	/* Register delay helper */
+	u32_t tmpreg = 0;	/* Register delay helper */
 
 	switch (pclken->bus) {
 	case STM32F4X_CLOCK_BUS_AHB1:
@@ -170,10 +170,10 @@ static int __pllp_div(int div)
 }
 #endif	/* CONFIG_CLOCK_STM32F4X_SYSCLK_SRC_PLL */
 
-static uint32_t __get_ahb_clock(uint32_t sysclk)
+static u32_t __get_ahb_clock(u32_t sysclk)
 {
 	/* AHB clock is generated based on SYSCLK */
-	uint32_t sysclk_div = CONFIG_CLOCK_STM32F4X_AHB_PRESCALER;
+	u32_t sysclk_div = CONFIG_CLOCK_STM32F4X_AHB_PRESCALER;
 
 	if (sysclk_div == 0) {
 		sysclk_div = 1;
@@ -182,7 +182,7 @@ static uint32_t __get_ahb_clock(uint32_t sysclk)
 	return sysclk / sysclk_div;
 }
 
-static uint32_t __get_apb_clock(uint32_t ahb_clock, uint32_t prescaler)
+static u32_t __get_apb_clock(u32_t ahb_clock, u32_t prescaler)
 {
 	if (prescaler == 0) {
 		prescaler = 1;
@@ -193,15 +193,15 @@ static uint32_t __get_apb_clock(uint32_t ahb_clock, uint32_t prescaler)
 
 static int stm32f4x_clock_control_get_subsys_rate(struct device *clock,
 						  clock_control_subsys_t sub_system,
-						  uint32_t *rate)
+						  u32_t *rate)
 {
 	struct stm32f4x_pclken *pclken = (struct stm32f4x_pclken *)(sub_system);
 	/* assumes SYSCLK is SYS_CLOCK_HW_CYCLES_PER_SEC */
-	uint32_t ahb_clock =
+	u32_t ahb_clock =
 		__get_ahb_clock(CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC);
-	uint32_t apb1_clock = __get_apb_clock(ahb_clock,
+	u32_t apb1_clock = __get_apb_clock(ahb_clock,
 				CONFIG_CLOCK_STM32F4X_APB1_PRESCALER);
-	uint32_t apb2_clock = __get_apb_clock(ahb_clock,
+	u32_t apb2_clock = __get_apb_clock(ahb_clock,
 				CONFIG_CLOCK_STM32F4X_APB2_PRESCALER);
 	ARG_UNUSED(clock);
 
@@ -234,17 +234,17 @@ static int stm32f4x_clock_control_init(struct device *dev)
 		(struct stm32f4x_rcc *)(data->base);
 	/* SYSCLK source defaults to HSI */
 	int sysclk_src = STM32F4X_RCC_CFG_SYSCLK_SRC_HSI;
-	uint32_t hpre = __ahb_prescaler(CONFIG_CLOCK_STM32F4X_AHB_PRESCALER);
-	uint32_t ppre1 = __apb_prescaler(CONFIG_CLOCK_STM32F4X_APB1_PRESCALER);
-	uint32_t ppre2 = __apb_prescaler(CONFIG_CLOCK_STM32F4X_APB2_PRESCALER);
+	u32_t hpre = __ahb_prescaler(CONFIG_CLOCK_STM32F4X_AHB_PRESCALER);
+	u32_t ppre1 = __apb_prescaler(CONFIG_CLOCK_STM32F4X_APB1_PRESCALER);
+	u32_t ppre2 = __apb_prescaler(CONFIG_CLOCK_STM32F4X_APB2_PRESCALER);
 #ifdef CONFIG_CLOCK_STM32F4X_SYSCLK_SRC_PLL
-	uint32_t pllmdiv = CONFIG_CLOCK_STM32F4X_PLLM_DIV_FACTOR;
-	uint32_t pllnmul = CONFIG_CLOCK_STM32F4X_PLLN_MULTIPLIER;
-	uint32_t pllpdiv = __pllp_div(CONFIG_CLOCK_STM32F4X_PLLP_DIV_FACTOR);
-	uint32_t pllqdiv = CONFIG_CLOCK_STM32F4X_PLLQ_DIV_FACTOR;
+	u32_t pllmdiv = CONFIG_CLOCK_STM32F4X_PLLM_DIV_FACTOR;
+	u32_t pllnmul = CONFIG_CLOCK_STM32F4X_PLLN_MULTIPLIER;
+	u32_t pllpdiv = __pllp_div(CONFIG_CLOCK_STM32F4X_PLLP_DIV_FACTOR);
+	u32_t pllqdiv = CONFIG_CLOCK_STM32F4X_PLLQ_DIV_FACTOR;
 #endif	/* CONFIG_CLOCK_STM32F4X_SYSCLK_SRC_PLL */
 	/* Register delay helper */
-	uint32_t tmpreg = 0;
+	u32_t tmpreg = 0;
 
 	/* Enable power control clock */
 	rcc->apb1enr |= STM32F4X_RCC_APB1ENR_PWREN;
@@ -333,7 +333,7 @@ static int stm32f4x_clock_control_init(struct device *dev)
 }
 
 static struct stm32f4x_rcc_data stm32f4x_rcc_data = {
-	.base = (uint8_t *)RCC_BASE,
+	.base = (u8_t *)RCC_BASE,
 };
 
 /* FIXME: move prescaler/multiplier defines into device config */
diff --git a/drivers/console/ipm_console_receiver.c b/drivers/console/ipm_console_receiver.c
index 77df98a93cb..e64d1f5d422 100644
--- a/drivers/console/ipm_console_receiver.c
+++ b/drivers/console/ipm_console_receiver.c
@@ -18,8 +18,8 @@
 
 static void ipm_console_thread(void *arg1, void *arg2, void *arg3)
 {
-	uint8_t size32;
-	uint16_t type;
+	u8_t size32;
+	u16_t type;
 	int ret, key;
 	struct device *d;
 	const struct ipm_console_receiver_config_info *config_info;
@@ -37,7 +37,7 @@ static void ipm_console_thread(void *arg1, void *arg2, void *arg3)
 		k_sem_take(&driver_data->sem, K_FOREVER);
 
 		ret = sys_ring_buf_get(&driver_data->rb, &type,
-				       (uint8_t *)&config_info->line_buf[pos],
+				       (u8_t *)&config_info->line_buf[pos],
 				       NULL, &size32);
 		if (ret) {
 			/* Shouldn't ever happen... */
@@ -84,7 +84,7 @@ static void ipm_console_thread(void *arg1, void *arg2, void *arg3)
 	}
 }
 
-static void ipm_console_receive_callback(void *context, uint32_t id,
+static void ipm_console_receive_callback(void *context, u32_t id,
 					 volatile void *data)
 {
 	struct device *d;
diff --git a/drivers/console/telnet_console.c b/drivers/console/telnet_console.c
index f4945c9980e..993591477d4 100644
--- a/drivers/console/telnet_console.c
+++ b/drivers/console/telnet_console.c
@@ -55,13 +55,13 @@
  */
 struct line_buf {
 	char buf[TELNET_LINE_SIZE];
-	uint16_t len;
+	u16_t len;
 };
 
 struct line_buf_rb {
 	struct line_buf l_bufs[TELNET_LINES];
-	uint16_t line_in;
-	uint16_t line_out;
+	u16_t line_in;
+	u16_t line_out;
 };
 
 static struct line_buf_rb telnet_rb;
@@ -160,7 +160,7 @@ static void telnet_rb_switch(void)
 
 static inline struct line_buf *telnet_rb_get_line_out(void)
 {
-	uint16_t out = telnet_rb.line_out;
+	u16_t out = telnet_rb.line_out;
 
 	telnet_rb.line_out++;
 	if (telnet_rb.line_out == TELNET_LINES) {
@@ -256,7 +256,7 @@ static int telnet_console_out_nothing(int c)
 	return c;
 }
 
-static inline void telnet_command_send_reply(uint8_t *msg, uint16_t len)
+static inline void telnet_command_send_reply(u8_t *msg, u16_t len)
 {
 	net_pkt_append(out_pkt, len, msg, K_FOREVER);
 
@@ -270,7 +270,7 @@ static inline void telnet_reply_ay_command(void)
 {
 	static const char alive[24] = "Zephyr at your service\r\n";
 
-	telnet_command_send_reply((uint8_t *)alive, 24);
+	telnet_command_send_reply((u8_t *)alive, 24);
 }
 
 static inline void telnet_reply_do_command(void)
@@ -284,7 +284,7 @@ static inline void telnet_reply_do_command(void)
 		break;
 	}
 
-	telnet_command_send_reply((uint8_t *)&telnet_cmd,
+	telnet_command_send_reply((u8_t *)&telnet_cmd,
 				  sizeof(struct telnet_simple_command));
 }
 
@@ -354,7 +354,7 @@ static inline bool telnet_handle_command(struct net_pkt *pkt)
 static inline void telnet_handle_input(struct net_pkt *pkt)
 {
 	struct console_input *input;
-	uint16_t len, offset, pos;
+	u16_t len, offset, pos;
 
 	len = net_pkt_appdatalen(pkt);
 	if (len > CONSOLE_MAX_LINE_LEN || len < TELNET_MIN_MSG) {
@@ -503,7 +503,7 @@ error:
 }
 
 void telnet_register_input(struct k_fifo *avail, struct k_fifo *lines,
-			   uint8_t (*completion)(char *str, uint8_t len))
+			   u8_t (*completion)(char *str, u8_t len))
 {
 	ARG_UNUSED(completion);
 
diff --git a/drivers/console/telnet_protocol.h b/drivers/console/telnet_protocol.h
index 1a191c7306a..b29a78500eb 100644
--- a/drivers/console/telnet_protocol.h
+++ b/drivers/console/telnet_protocol.h
@@ -107,11 +107,11 @@
 /** Describes a telnet command */
 struct telnet_simple_command {
 	/** Mandatory IAC code */
-	uint8_t iac;
+	u8_t iac;
 	/** Type of operation (see Telnet commands above) */
-	uint8_t op;
+	u8_t op;
 	/** Option code */
-	uint8_t opt;
+	u8_t opt;
 };
 
 static inline void telnet_command_cpy(struct telnet_simple_command *dst,
diff --git a/drivers/console/uart_console.c b/drivers/console/uart_console.c
index 3dbc453b761..c5380e47780 100644
--- a/drivers/console/uart_console.c
+++ b/drivers/console/uart_console.c
@@ -132,7 +132,7 @@ extern void __printk_hook_install(int (*fn)(int));
 #if defined(CONFIG_CONSOLE_HANDLER)
 static struct k_fifo *avail_queue;
 static struct k_fifo *lines_queue;
-static uint8_t (*completion_cb)(char *line, uint8_t len);
+static u8_t (*completion_cb)(char *line, u8_t len);
 
 /* Control characters */
 #define ESC                0x1b
@@ -148,7 +148,7 @@ static uint8_t (*completion_cb)(char *line, uint8_t len);
 #define ANSI_HOME          'H'
 #define ANSI_DEL           '~'
 
-static int read_uart(struct device *uart, uint8_t *buf, unsigned int size)
+static int read_uart(struct device *uart, u8_t *buf, unsigned int size)
 {
 	int rx;
 
@@ -183,7 +183,7 @@ static inline void cursor_restore(void)
 	printk("\x1b[u");
 }
 
-static void insert_char(char *pos, char c, uint8_t end)
+static void insert_char(char *pos, char c, u8_t end)
 {
 	char tmp;
 
@@ -211,7 +211,7 @@ static void insert_char(char *pos, char c, uint8_t end)
 	cursor_restore();
 }
 
-static void del_char(char *pos, uint8_t end)
+static void del_char(char *pos, u8_t end)
 {
 	uart_poll_out(uart_console_dev, '\b');
 
@@ -244,9 +244,9 @@ enum {
 
 static atomic_t esc_state;
 static unsigned int ansi_val, ansi_val_2;
-static uint8_t cur, end;
+static u8_t cur, end;
 
-static void handle_ansi(uint8_t byte, char *line)
+static void handle_ansi(u8_t byte, char *line)
 {
 	if (atomic_test_and_clear_bit(&esc_state, ESC_ANSI_FIRST)) {
 		if (!isdigit(byte)) {
@@ -342,7 +342,7 @@ void uart_console_isr(struct device *unused)
 	while (uart_irq_update(uart_console_dev) &&
 	       uart_irq_is_pending(uart_console_dev)) {
 		static struct console_input *cmd;
-		uint8_t byte;
+		u8_t byte;
 		int rx;
 
 		if (!uart_irq_rx_ready(uart_console_dev)) {
@@ -430,7 +430,7 @@ void uart_console_isr(struct device *unused)
 
 static void console_input_init(void)
 {
-	uint8_t c;
+	u8_t c;
 
 	uart_irq_rx_disable(uart_console_dev);
 	uart_irq_tx_disable(uart_console_dev);
@@ -446,7 +446,7 @@ static void console_input_init(void)
 }
 
 void uart_register_input(struct k_fifo *avail, struct k_fifo *lines,
-			 uint8_t (*completion)(char *str, uint8_t len))
+			 u8_t (*completion)(char *str, u8_t len))
 {
 	avail_queue = avail;
 	lines_queue = lines;
@@ -492,7 +492,7 @@ static int uart_console_init(struct device *arg)
 
 #ifdef CONFIG_USB_UART_CONSOLE
 	while (1) {
-		uint32_t dtr = 0;
+		u32_t dtr = 0;
 
 		uart_line_ctrl_get(uart_console_dev, LINE_CTRL_DTR, &dtr);
 		if (dtr) {
diff --git a/drivers/console/uart_pipe.c b/drivers/console/uart_pipe.c
index 44f711e1477..987f51964c8 100644
--- a/drivers/console/uart_pipe.c
+++ b/drivers/console/uart_pipe.c
@@ -21,7 +21,7 @@
 
 static struct device *uart_pipe_dev;
 
-static uint8_t *recv_buf;
+static u8_t *recv_buf;
 static size_t recv_buf_len;
 static uart_pipe_recv_cb app_cb;
 static size_t recv_off;
@@ -53,7 +53,7 @@ static void uart_pipe_isr(struct device *unused)
 	}
 }
 
-int uart_pipe_send(const uint8_t *data, int len)
+int uart_pipe_send(const u8_t *data, int len)
 {
 	while (len--)  {
 		uart_poll_out(uart_pipe_dev, *data++);
@@ -64,7 +64,7 @@ int uart_pipe_send(const uint8_t *data, int len)
 
 static void uart_pipe_setup(struct device *uart)
 {
-	uint8_t c;
+	u8_t c;
 
 	uart_irq_rx_disable(uart);
 	uart_irq_tx_disable(uart);
@@ -79,7 +79,7 @@ static void uart_pipe_setup(struct device *uart)
 	uart_irq_rx_enable(uart);
 }
 
-void uart_pipe_register(uint8_t *buf, size_t len, uart_pipe_recv_cb cb)
+void uart_pipe_register(u8_t *buf, size_t len, uart_pipe_recv_cb cb)
 {
 	recv_buf = buf;
 	recv_buf_len = len;
diff --git a/drivers/counter/counter_dtmr_cmsdk_apb.c b/drivers/counter/counter_dtmr_cmsdk_apb.c
index 01b872579f9..fe94588d74b 100644
--- a/drivers/counter/counter_dtmr_cmsdk_apb.c
+++ b/drivers/counter/counter_dtmr_cmsdk_apb.c
@@ -50,13 +50,13 @@ static int counter_dtmr_cmsdk_apb_stop(struct device *dev)
 	return 0;
 }
 
-static uint32_t counter_dtmr_cmsdk_apb_read(struct device *dev)
+static u32_t counter_dtmr_cmsdk_apb_read(struct device *dev)
 {
 	const struct counter_dtmr_cmsdk_apb_cfg * const cfg =
 						dev->config->config_info;
 
 	/* Return Counter Value */
-	uint32_t value = 0;
+	u32_t value = 0;
 
 	value = DUALTIMER_MAX_RELOAD - cfg->dtimer->timer1value;
 
@@ -65,7 +65,7 @@ static uint32_t counter_dtmr_cmsdk_apb_read(struct device *dev)
 
 static int counter_dtmr_cmsdk_apb_set_alarm(struct device *dev,
 					   counter_callback_t callback,
-					   uint32_t count, void *user_data)
+					   u32_t count, void *user_data)
 {
 	return -ENODEV;
 }
diff --git a/drivers/counter/counter_qmsi_aon.c b/drivers/counter/counter_qmsi_aon.c
index cc1995abc41..cc0a8f93e34 100644
--- a/drivers/counter/counter_qmsi_aon.c
+++ b/drivers/counter/counter_qmsi_aon.c
@@ -29,9 +29,9 @@ static int aon_counter_qmsi_stop(struct device *dev)
 	return 0;
 }
 
-static uint32_t aon_counter_qmsi_read(struct device *dev)
+static u32_t aon_counter_qmsi_read(struct device *dev)
 {
-	uint32_t value;
+	u32_t value;
 
 	qm_aonc_get_value(QM_AONC_0, &value);
 
@@ -40,7 +40,7 @@ static uint32_t aon_counter_qmsi_read(struct device *dev)
 
 static int aon_counter_qmsi_set_alarm(struct device *dev,
 				      counter_callback_t callback,
-				      uint32_t count, void *user_data)
+				      u32_t count, void *user_data)
 {
 	return -ENODEV;
 }
diff --git a/drivers/counter/counter_qmsi_aonpt.c b/drivers/counter/counter_qmsi_aonpt.c
index 607812febd8..70dcb900cf2 100644
--- a/drivers/counter/counter_qmsi_aonpt.c
+++ b/drivers/counter/counter_qmsi_aonpt.c
@@ -26,7 +26,7 @@ struct aon_data {
 	struct k_sem sem;
 #endif
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
-	uint32_t device_power_state;
+	u32_t device_power_state;
 #endif
 };
 
@@ -98,9 +98,9 @@ static int aon_timer_qmsi_stop(struct device *dev)
 	return 0;
 }
 
-static uint32_t aon_timer_qmsi_read(struct device *dev)
+static u32_t aon_timer_qmsi_read(struct device *dev)
 {
-	uint32_t value;
+	u32_t value;
 
 	qm_aonpt_get_value(QM_AONC_0, &value);
 
@@ -109,7 +109,7 @@ static uint32_t aon_timer_qmsi_read(struct device *dev)
 
 static int aon_timer_qmsi_set_alarm(struct device *dev,
 				    counter_callback_t callback,
-				    uint32_t count, void *user_data)
+				    u32_t count, void *user_data)
 {
 	qm_aonpt_config_t qmsi_cfg;
 	int result = 0;
@@ -142,7 +142,7 @@ static int aon_timer_qmsi_set_alarm(struct device *dev,
 	return result;
 }
 
-static uint32_t aon_timer_qmsi_get_pending_int(struct device *dev)
+static u32_t aon_timer_qmsi_get_pending_int(struct device *dev)
 {
 	return QM_AONC[QM_AONC_0]->aonpt_stat;
 }
@@ -158,14 +158,14 @@ static const struct counter_driver_api aon_timer_qmsi_api = {
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
 static qm_aonc_context_t aonc_ctx;
 
-static void aonpt_qmsi_set_power_state(struct device *dev, uint32_t power_state)
+static void aonpt_qmsi_set_power_state(struct device *dev, u32_t power_state)
 {
 	struct aon_data *context = dev->driver_data;
 
 	context->device_power_state = power_state;
 }
 
-static uint32_t aonpt_qmsi_get_power_state(struct device *dev)
+static u32_t aonpt_qmsi_get_power_state(struct device *dev)
 {
 	struct aon_data *context = dev->driver_data;
 
@@ -194,17 +194,17 @@ static int aonpt_resume_device_from_suspend(struct device *dev)
 * Implements the driver control management functionality
 * the *context may include IN data or/and OUT data
 */
-static int aonpt_qmsi_device_ctrl(struct device *dev, uint32_t ctrl_command,
+static int aonpt_qmsi_device_ctrl(struct device *dev, u32_t ctrl_command,
 				  void *context)
 {
 	if (ctrl_command == DEVICE_PM_SET_POWER_STATE) {
-		if (*((uint32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
+		if (*((u32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
 			return aonpt_suspend_device(dev);
-		} else if (*((uint32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
+		} else if (*((u32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
 			return aonpt_resume_device_from_suspend(dev);
 		}
 	} else if (ctrl_command == DEVICE_PM_GET_POWER_STATE) {
-		*((uint32_t *)context) = aonpt_qmsi_get_power_state(dev);
+		*((u32_t *)context) = aonpt_qmsi_get_power_state(dev);
 		return 0;
 	}
 
diff --git a/drivers/counter/counter_tmr_cmsdk_apb.c b/drivers/counter/counter_tmr_cmsdk_apb.c
index fbe1ff6f280..a4ae9d0b8ef 100644
--- a/drivers/counter/counter_tmr_cmsdk_apb.c
+++ b/drivers/counter/counter_tmr_cmsdk_apb.c
@@ -50,13 +50,13 @@ static int counter_tmr_cmsdk_apb_stop(struct device *dev)
 	return 0;
 }
 
-static uint32_t counter_tmr_cmsdk_apb_read(struct device *dev)
+static u32_t counter_tmr_cmsdk_apb_read(struct device *dev)
 {
 	const struct counter_tmr_cmsdk_apb_cfg * const cfg =
 						dev->config->config_info;
 
 	/* Return Counter Value */
-	uint32_t value = 0;
+	u32_t value = 0;
 
 	value = TIMER_MAX_RELOAD - cfg->timer->value;
 
@@ -65,7 +65,7 @@ static uint32_t counter_tmr_cmsdk_apb_read(struct device *dev)
 
 static int counter_tmr_cmsdk_apb_set_alarm(struct device *dev,
 					   counter_callback_t callback,
-					   uint32_t count, void *user_data)
+					   u32_t count, void *user_data)
 {
 	return -ENODEV;
 }
diff --git a/drivers/counter/dualtimer_cmsdk_apb.h b/drivers/counter/dualtimer_cmsdk_apb.h
index 7af6a724da0..1f17f7de2f2 100644
--- a/drivers/counter/dualtimer_cmsdk_apb.h
+++ b/drivers/counter/dualtimer_cmsdk_apb.h
@@ -14,41 +14,41 @@ extern "C" {
 
 struct dualtimer_cmsdk_apb {
 	/* Offset: 0x000 (R/W) Timer 1 Load */
-	volatile uint32_t timer1load;
+	volatile u32_t timer1load;
 	/* Offset: 0x004 (R/ ) Timer 1 Counter Current Value */
-	volatile uint32_t timer1value;
+	volatile u32_t timer1value;
 	/* Offset: 0x008 (R/W) Timer 1 Control */
-	volatile uint32_t timer1ctrl;
+	volatile u32_t timer1ctrl;
 	/* Offset: 0x00C ( /W) Timer 1 Interrupt Clear */
-	volatile uint32_t timer1intclr;
+	volatile u32_t timer1intclr;
 	/* Offset: 0x010 (R/ ) Timer 1 Raw Interrupt Status */
-	volatile uint32_t timer1ris;
+	volatile u32_t timer1ris;
 	/* Offset: 0x014 (R/ ) Timer 1 Masked Interrupt Status */
-	volatile uint32_t timer1mis;
+	volatile u32_t timer1mis;
 	/* Offset: 0x018 (R/W) Background Load Register */
-	volatile uint32_t timer1bgload;
+	volatile u32_t timer1bgload;
 	/* Reserved */
-	volatile uint32_t reserved0;
+	volatile u32_t reserved0;
 	/* Offset: 0x020 (R/W) Timer 2 Load */
-	volatile uint32_t timer2load;
+	volatile u32_t timer2load;
 	/* Offset: 0x024 (R/ ) Timer 2 Counter Current Value */
-	volatile uint32_t timer2value;
+	volatile u32_t timer2value;
 	/* Offset: 0x028 (R/W) Timer 2 Control */
-	volatile uint32_t timer2ctrl;
+	volatile u32_t timer2ctrl;
 	/* Offset: 0x02C ( /W) Timer 2 Interrupt Clear */
-	volatile uint32_t timer2intclr;
+	volatile u32_t timer2intclr;
 	/* Offset: 0x030 (R/ ) Timer 2 Raw Interrupt Status */
-	volatile uint32_t timer2ris;
+	volatile u32_t timer2ris;
 	/* Offset: 0x034 (R/ ) Timer 2 Masked Interrupt Status */
-	volatile uint32_t timer2mis;
+	volatile u32_t timer2mis;
 	/* Offset: 0x038 (R/W) Background Load Register */
-	volatile uint32_t timer2bgload;
+	volatile u32_t timer2bgload;
 	/* Reserved */
-	volatile uint32_t reserved1[945];
+	volatile u32_t reserved1[945];
 	/* Offset: 0xF00 (R/W) Integration Test Control Register */
-	volatile uint32_t itcr;
+	volatile u32_t itcr;
 	/* Offset: 0xF04 ( /W) Integration Test Output Set Register */
-	volatile uint32_t itop;
+	volatile u32_t itop;
 };
 
 #define DUALTIMER_CTRL_EN	(1 << 7)
diff --git a/drivers/counter/timer_cmsdk_apb.h b/drivers/counter/timer_cmsdk_apb.h
index 57544a66ec3..4a94fcc2b79 100644
--- a/drivers/counter/timer_cmsdk_apb.h
+++ b/drivers/counter/timer_cmsdk_apb.h
@@ -14,16 +14,16 @@ extern "C" {
 
 struct timer_cmsdk_apb {
 	/* Offset: 0x000 (R/W) control register */
-	volatile uint32_t ctrl;
+	volatile u32_t ctrl;
 	/* Offset: 0x004 (R/W) current value register */
-	volatile uint32_t value;
+	volatile u32_t value;
 	/* Offset: 0x008 (R/W) reload value register */
-	volatile uint32_t reload;
+	volatile u32_t reload;
 	union {
 		/* Offset: 0x00C (R/ ) interrupt status register */
-		volatile uint32_t intstatus;
+		volatile u32_t intstatus;
 		/* Offset: 0x00C ( /W) interruptclear register */
-		volatile uint32_t intclear;
+		volatile u32_t intclear;
 	};
 };
 
diff --git a/drivers/counter/timer_dtmr_cmsdk_apb.c b/drivers/counter/timer_dtmr_cmsdk_apb.c
index b33ecf52893..d48fb92208f 100644
--- a/drivers/counter/timer_dtmr_cmsdk_apb.c
+++ b/drivers/counter/timer_dtmr_cmsdk_apb.c
@@ -36,7 +36,7 @@ struct timer_dtmr_cmsdk_apb_cfg {
 };
 
 struct timer_dtmr_cmsdk_apb_dev_data {
-	uint32_t load;
+	u32_t load;
 	enum dtimer_status_t status;
 };
 
@@ -73,14 +73,14 @@ static int timer_dtmr_cmsdk_apb_stop(struct device *dev)
 	return 0;
 }
 
-static uint32_t timer_dtmr_cmsdk_apb_read(struct device *dev)
+static u32_t timer_dtmr_cmsdk_apb_read(struct device *dev)
 {
 	const struct timer_dtmr_cmsdk_apb_cfg * const cfg =
 						dev->config->config_info;
 	struct timer_dtmr_cmsdk_apb_dev_data *data = dev->driver_data;
 
 	/* Return Timer Value */
-	uint32_t value = 0;
+	u32_t value = 0;
 
 	value = data->load - cfg->dtimer->timer1value;
 
@@ -89,7 +89,7 @@ static uint32_t timer_dtmr_cmsdk_apb_read(struct device *dev)
 
 static int timer_dtmr_cmsdk_apb_set_alarm(struct device *dev,
 					   counter_callback_t callback,
-					   uint32_t count, void *user_data)
+					   u32_t count, void *user_data)
 {
 	const struct timer_dtmr_cmsdk_apb_cfg * const cfg =
 						dev->config->config_info;
@@ -115,7 +115,7 @@ static int timer_dtmr_cmsdk_apb_set_alarm(struct device *dev,
 	return 0;
 }
 
-static uint32_t timer_dtmr_cmsdk_apb_get_pending_int(struct device *dev)
+static u32_t timer_dtmr_cmsdk_apb_get_pending_int(struct device *dev)
 {
 	const struct timer_dtmr_cmsdk_apb_cfg * const cfg =
 						dev->config->config_info;
diff --git a/drivers/counter/timer_tmr_cmsdk_apb.c b/drivers/counter/timer_tmr_cmsdk_apb.c
index dc41bed3691..77e7f45bc21 100644
--- a/drivers/counter/timer_tmr_cmsdk_apb.c
+++ b/drivers/counter/timer_tmr_cmsdk_apb.c
@@ -36,7 +36,7 @@ struct timer_tmr_cmsdk_apb_cfg {
 };
 
 struct timer_tmr_cmsdk_apb_dev_data {
-	uint32_t load;
+	u32_t load;
 	enum timer_status_t status;
 };
 
@@ -73,14 +73,14 @@ static int timer_tmr_cmsdk_apb_stop(struct device *dev)
 	return 0;
 }
 
-static uint32_t timer_tmr_cmsdk_apb_read(struct device *dev)
+static u32_t timer_tmr_cmsdk_apb_read(struct device *dev)
 {
 	const struct timer_tmr_cmsdk_apb_cfg * const cfg =
 						dev->config->config_info;
 	struct timer_tmr_cmsdk_apb_dev_data *data = dev->driver_data;
 
 	/* Return Counter Value */
-	uint32_t value = 0;
+	u32_t value = 0;
 
 	value = data->load - cfg->timer->value;
 
@@ -89,7 +89,7 @@ static uint32_t timer_tmr_cmsdk_apb_read(struct device *dev)
 
 static int timer_tmr_cmsdk_apb_set_alarm(struct device *dev,
 					 counter_callback_t callback,
-					 uint32_t count, void *user_data)
+					 u32_t count, void *user_data)
 {
 	const struct timer_tmr_cmsdk_apb_cfg * const cfg =
 						dev->config->config_info;
@@ -117,7 +117,7 @@ static int timer_tmr_cmsdk_apb_set_alarm(struct device *dev,
 	return 0;
 }
 
-static uint32_t timer_tmr_cmsdk_apb_get_pending_int(struct device *dev)
+static u32_t timer_tmr_cmsdk_apb_get_pending_int(struct device *dev)
 {
 	const struct timer_tmr_cmsdk_apb_cfg * const cfg =
 						dev->config->config_info;
diff --git a/drivers/crc/crc16_sw.c b/drivers/crc/crc16_sw.c
index ee9da073bb9..932dc79fddc 100644
--- a/drivers/crc/crc16_sw.c
+++ b/drivers/crc/crc16_sw.c
@@ -6,17 +6,17 @@
 
 #include <crc16.h>
 
-uint16_t crc16(const uint8_t *src, size_t len, uint16_t polynomial,
-	       uint16_t initial_value)
+u16_t crc16(const u8_t *src, size_t len, u16_t polynomial,
+	       u16_t initial_value)
 {
-	uint16_t crc = initial_value;
+	u16_t crc = initial_value;
 	size_t i, b;
 
 	/* src length + crc width of zeros appended */
 	for (i = 0; i < len + sizeof(crc); i++) {
 
 		for (b = 0; b < 8; b++) {
-			uint16_t divide = crc & 0x8000;
+			u16_t divide = crc & 0x8000;
 
 			crc = (crc << 1);
 
diff --git a/drivers/crypto/crypto_ataes132a.c b/drivers/crypto/crypto_ataes132a.c
index ade1d866af8..a666c95cc07 100644
--- a/drivers/crypto/crypto_ataes132a.c
+++ b/drivers/crypto/crypto_ataes132a.c
@@ -36,17 +36,17 @@ static void ataes132a_init_states(void)
 	}
 }
 
-static int ataes132a_send_command(struct device *dev, uint8_t opcode,
-				  uint8_t mode, uint8_t *params,
-				  uint8_t nparams, uint8_t *response,
-				  uint8_t *nresponse)
+static int ataes132a_send_command(struct device *dev, u8_t opcode,
+				  u8_t mode, u8_t *params,
+				  u8_t nparams, u8_t *response,
+				  u8_t *nresponse)
 {
 	int retry_count = 0;
 	struct ataes132a_device_data *data = dev->driver_data;
 	const struct ataes132a_device_config *cfg = dev->config->config_info;
-	uint8_t count;
-	uint8_t status;
-	uint8_t crc[2];
+	u8_t count;
+	u8_t status;
+	u8_t crc[2];
 	int i, i2c_return;
 
 	count = nparams + 5;
@@ -192,19 +192,19 @@ int ataes132a_init(struct device *dev)
 }
 
 int ataes132a_aes_ccm_decrypt(struct device *dev,
-			      uint8_t key_id,
+			      u8_t key_id,
 			      struct ataes132a_mac_mode *mac_mode,
 			      struct ataes132a_mac_packet *mac_packet,
 			      struct cipher_aead_pkt *aead_op,
-			      uint8_t *nonce_buf)
+			      u8_t *nonce_buf)
 {
-	uint8_t command_mode = 0x0;
+	u8_t command_mode = 0x0;
 	struct ataes132a_device_data *data = dev->driver_data;
-	uint8_t out_len;
-	uint8_t in_buf_len;
-	uint8_t return_code;
-	uint8_t expected_out_len;
-	uint8_t param_buffer[52];
+	u8_t out_len;
+	u8_t in_buf_len;
+	u8_t return_code;
+	u8_t expected_out_len;
+	u8_t param_buffer[52];
 
 	if (!aead_op) {
 		SYS_LOG_ERR("Parameter cannot be null");
@@ -392,18 +392,18 @@ int ataes132a_aes_ccm_decrypt(struct device *dev,
 }
 
 int ataes132a_aes_ccm_encrypt(struct device *dev,
-			      uint8_t key_id,
+			      u8_t key_id,
 			      struct ataes132a_mac_mode *mac_mode,
 			      struct cipher_aead_pkt *aead_op,
-			      uint8_t *nonce_buf,
-			      uint8_t *mac_count)
+			      u8_t *nonce_buf,
+			      u8_t *mac_count)
 {
-	uint8_t command_mode = 0x0;
+	u8_t command_mode = 0x0;
 	struct ataes132a_device_data *data = dev->driver_data;
-	uint8_t buf_len;
-	uint8_t out_len;
-	uint8_t return_code;
-	uint8_t param_buffer[40];
+	u8_t buf_len;
+	u8_t out_len;
+	u8_t return_code;
+	u8_t param_buffer[40];
 
 	if (!aead_op) {
 		SYS_LOG_ERR("Parameter cannot be null");
@@ -580,14 +580,14 @@ int ataes132a_aes_ccm_encrypt(struct device *dev,
 }
 
 int ataes132a_aes_ecb_block(struct device *dev,
-			    uint8_t key_id,
+			    u8_t key_id,
 			    struct cipher_pkt *pkt)
 {
 	struct ataes132a_device_data *data = dev->driver_data;
-	uint8_t buf_len;
-	uint8_t out_len;
-	uint8_t return_code;
-	uint8_t param_buffer[19];
+	u8_t buf_len;
+	u8_t out_len;
+	u8_t return_code;
+	u8_t param_buffer[19];
 
 	if (!pkt) {
 		SYS_LOG_ERR("Parameter cannot be null");
@@ -668,16 +668,16 @@ int ataes132a_aes_ecb_block(struct device *dev,
 }
 
 static int do_ccm_encrypt_mac(struct cipher_ctx *ctx,
-			      struct cipher_aead_pkt *aead_op, uint8_t *nonce)
+			      struct cipher_aead_pkt *aead_op, u8_t *nonce)
 {
 	struct device *dev = ctx->device;
 	struct ataes132a_driver_state *state = ctx->drv_sessn_state;
 	struct ataes132a_mac_mode mac_mode;
-	uint8_t key_id;
+	u8_t key_id;
 
 	key_id = state->key_id;
 
-	assert(*(uint8_t *)ctx->key.handle == key_id);
+	assert(*(u8_t *)ctx->key.handle == key_id);
 
 	/* Removing all this salt from the MAC reduces the protection
 	 * but allows any other crypto implementations to authorize
@@ -717,16 +717,16 @@ static int do_ccm_encrypt_mac(struct cipher_ctx *ctx,
 }
 
 static int do_ccm_decrypt_auth(struct cipher_ctx *ctx,
-			   struct cipher_aead_pkt *aead_op, uint8_t *nonce)
+			   struct cipher_aead_pkt *aead_op, u8_t *nonce)
 {
 	struct device *dev = ctx->device;
 	struct ataes132a_driver_state *state = ctx->drv_sessn_state;
 	struct ataes132a_mac_mode mac_mode;
-	uint8_t key_id;
+	u8_t key_id;
 
 	key_id = state->key_id;
 
-	assert(*(uint8_t *)ctx->key.handle == key_id);
+	assert(*(u8_t *)ctx->key.handle == key_id);
 
 	/* Removing all this salt from the MAC reduces the protection
 	 * but allows any other crypto implementations to authorize
@@ -766,11 +766,11 @@ static int do_block(struct cipher_ctx *ctx, struct cipher_pkt *pkt)
 {
 	struct device *dev = ctx->device;
 	struct ataes132a_driver_state *state = ctx->drv_sessn_state;
-	uint8_t key_id;
+	u8_t key_id;
 
 	key_id = state->key_id;
 
-	assert(*(uint8_t *)ctx->key.handle == key_id);
+	assert(*(u8_t *)ctx->key.handle == key_id);
 
 	if (pkt->out_buf_max < 16) {
 		SYS_LOG_ERR("Not enough space available in out buffer.");
@@ -797,10 +797,10 @@ int ataes132a_session_setup(struct device *dev, struct cipher_ctx *ctx,
 			     enum cipher_algo algo, enum cipher_mode mode,
 			     enum cipher_op op_type)
 {
-	uint8_t key_id = *((uint8_t *)ctx->key.handle);
+	u8_t key_id = *((u8_t *)ctx->key.handle);
 	struct ataes132a_device_data *data = dev->driver_data;
 	const struct ataes132a_device_config *cfg = dev->config->config_info;
-	uint8_t config;
+	u8_t config;
 
 	if (ataes132a_state[key_id].in_use) {
 		SYS_LOG_ERR("Session in progress");
diff --git a/drivers/crypto/crypto_ataes132a_priv.h b/drivers/crypto/crypto_ataes132a_priv.h
index 57f1224da00..aced3cddefb 100644
--- a/drivers/crypto/crypto_ataes132a_priv.h
+++ b/drivers/crypto/crypto_ataes132a_priv.h
@@ -110,14 +110,14 @@
 
 #define CRC16_POLY 0x8005
 
-void ataes132a_atmel_crc(uint8_t *input, uint8_t length,
-			 uint8_t *output)
+void ataes132a_atmel_crc(u8_t *input, u8_t length,
+			 u8_t *output)
 {
 	int i, j;
-	uint8_t bit;
-	uint16_t crc;
-	uint16_t double_carry;
-	uint8_t higher_crc_bit;
+	u8_t bit;
+	u16_t crc;
+	u16_t double_carry;
+	u8_t higher_crc_bit;
 
 	for (i = 0, crc = 0; i < length; i++) {
 		for (j = 7; j >=  0; j--) {
@@ -133,15 +133,15 @@ void ataes132a_atmel_crc(uint8_t *input, uint8_t length,
 		}
 	}
 
-	*(uint16_t *)output = crc << 8 | crc >> 8;
+	*(u16_t *)output = crc << 8 | crc >> 8;
 }
 
-static inline int burst_write_i2c(struct device *dev, uint16_t dev_addr,
-				  uint16_t start_addr, uint8_t *buf,
-				  uint8_t num_bytes)
+static inline int burst_write_i2c(struct device *dev, u16_t dev_addr,
+				  u16_t start_addr, u8_t *buf,
+				  u8_t num_bytes)
 {
 	const struct i2c_driver_api *api = dev->driver_api;
-	uint8_t addr_buffer[2];
+	u8_t addr_buffer[2];
 	struct i2c_msg msg[2];
 
 	addr_buffer[1] = start_addr & 0xFF;
@@ -158,12 +158,12 @@ static inline int burst_write_i2c(struct device *dev, uint16_t dev_addr,
 }
 
 
-static inline int burst_read_i2c(struct device *dev, uint16_t dev_addr,
-				 uint16_t start_addr, uint8_t *buf,
-				 uint8_t num_bytes)
+static inline int burst_read_i2c(struct device *dev, u16_t dev_addr,
+				 u16_t start_addr, u8_t *buf,
+				 u8_t num_bytes)
 {
 	const struct i2c_driver_api *api = dev->driver_api;
-	uint8_t addr_buffer[2];
+	u8_t addr_buffer[2];
 	struct i2c_msg msg[2];
 
 	addr_buffer[1] = start_addr & 0xFF;
@@ -179,35 +179,35 @@ static inline int burst_read_i2c(struct device *dev, uint16_t dev_addr,
 	return api->transfer(dev, msg, 2, dev_addr);
 }
 
-static inline int read_reg_i2c(struct device *dev, uint16_t dev_addr,
-			       uint16_t reg_addr, uint8_t *value)
+static inline int read_reg_i2c(struct device *dev, u16_t dev_addr,
+			       u16_t reg_addr, u8_t *value)
 {
 	return burst_read_i2c(dev, dev_addr, reg_addr, value, 1);
 }
 
-static inline int write_reg_i2c(struct device *dev, uint16_t dev_addr,
-				uint16_t reg_addr, uint8_t value)
+static inline int write_reg_i2c(struct device *dev, u16_t dev_addr,
+				u16_t reg_addr, u8_t value)
 {
 	return burst_write_i2c(dev, dev_addr, reg_addr, &value, 1);
 }
 
 struct ataes132a_device_config {
 	const char *i2c_port;
-	uint16_t i2c_addr;
-	uint8_t i2c_speed;
+	u16_t i2c_addr;
+	u8_t i2c_speed;
 };
 
 struct ataes132a_device_data {
 	struct device *i2c;
-	uint8_t command_buffer[64];
+	u8_t command_buffer[64];
 	struct k_sem device_sem;
 };
 
 struct ataes132a_driver_state {
 	bool in_use;
-	uint8_t key_id;
-	uint8_t key_config;
-	uint8_t chip_config;
+	u8_t key_id;
+	u8_t key_config;
+	u8_t chip_config;
 };
 
 /**
@@ -216,9 +216,9 @@ struct ataes132a_driver_state {
  */
 struct ataes132a_mac_packet {
 	/** Key storage id used on CCM encryption */
-	uint8_t encryption_key_id;
+	u8_t encryption_key_id;
 	/** MAC Count value */
-	uint8_t encryption_mac_count;
+	u8_t encryption_mac_count;
 };
 
 /**
@@ -312,11 +312,11 @@ int ataes132a_init(struct device *i2c_dev);
  * @return Returns 0 in case of success and an error code otherwise.
  */
 int ataes132a_aes_ccm_decrypt(struct device *i2c_dev,
-			      uint8_t key_id,
+			      u8_t key_id,
 			      struct ataes132a_mac_mode *mac_mode,
 			      struct ataes132a_mac_packet *mac_packet,
 			      struct cipher_aead_pkt *aead_op,
-			      uint8_t *nonce_buf);
+			      u8_t *nonce_buf);
 
  /**
   * @brief ATAES132A CCM encrypt function
@@ -360,11 +360,11 @@ int ataes132a_aes_ccm_decrypt(struct device *i2c_dev,
   * @return Returns 0 in case of success and an error code otherwise.
   */
 int ataes132a_aes_ccm_encrypt(struct device *i2c_dev,
-			      uint8_t key_id,
+			      u8_t key_id,
 			      struct ataes132a_mac_mode *mac_mode,
 			      struct cipher_aead_pkt *aead_op,
-			      uint8_t *nonce_buf,
-			      uint8_t *mac_count);
+			      u8_t *nonce_buf,
+			      u8_t *mac_count);
 
 /**
  * @brief ATAES132A ECM block function
@@ -388,7 +388,7 @@ int ataes132a_aes_ccm_encrypt(struct device *i2c_dev,
  * @return Returns 0 in case of success and an error code otherwise.
  */
 int ataes132a_aes_ecb_block(struct device *i2c_dev,
-			    uint8_t key_id,
+			    u8_t key_id,
 			    struct cipher_pkt *pkt);
 
 #endif /* _ATAES132A_PRIV_ */
diff --git a/drivers/crypto/tc_shim.c b/drivers/crypto/tc_shim.c
index 8c79294336f..a35efd26691 100644
--- a/drivers/crypto/tc_shim.c
+++ b/drivers/crypto/tc_shim.c
@@ -26,7 +26,7 @@
 static struct tc_shim_drv_state tc_driver_state[CRYPTO_MAX_SESSION];
 
 static int do_cbc_encrypt(struct cipher_ctx *ctx, struct cipher_pkt *op,
-			  uint8_t *iv)
+			  u8_t *iv)
 {
 	struct tc_shim_drv_state *data =  ctx->drv_sessn_state;
 
@@ -44,7 +44,7 @@ static int do_cbc_encrypt(struct cipher_ctx *ctx, struct cipher_pkt *op,
 }
 
 static int do_cbc_decrypt(struct cipher_ctx *ctx, struct cipher_pkt *op,
-			  uint8_t *iv)
+			  u8_t *iv)
 {
 	struct tc_shim_drv_state *data =  ctx->drv_sessn_state;
 
@@ -71,10 +71,10 @@ static int do_cbc_decrypt(struct cipher_ctx *ctx, struct cipher_pkt *op,
 
 
 static int do_ctr_op(struct cipher_ctx *ctx, struct cipher_pkt *op,
-		     uint8_t *iv)
+		     u8_t *iv)
 {
 	struct tc_shim_drv_state *data =  ctx->drv_sessn_state;
-	uint8_t ctr[16] = {0};	/* CTR mode Counter =  iv:ctr */
+	u8_t ctr[16] = {0};	/* CTR mode Counter =  iv:ctr */
 	int ivlen = ctx->keylen - (ctx->mode_params.ctr_info.ctr_len >> 3);
 
 	/* Tinycrypt takes the last 4 bytes of the counter parameter as the
@@ -93,7 +93,7 @@ static int do_ctr_op(struct cipher_ctx *ctx, struct cipher_pkt *op,
 }
 
 static int do_ccm_encrypt_mac(struct cipher_ctx *ctx,
-			     struct cipher_aead_pkt *aead_op, uint8_t *nonce)
+			     struct cipher_aead_pkt *aead_op, u8_t *nonce)
 {
 	struct tc_ccm_mode_struct ccm;
 	struct tc_shim_drv_state *data =  ctx->drv_sessn_state;
@@ -125,7 +125,7 @@ static int do_ccm_encrypt_mac(struct cipher_ctx *ctx,
 }
 
 static int do_ccm_decrypt_auth(struct cipher_ctx *ctx,
-			       struct cipher_aead_pkt *aead_op, uint8_t *nonce)
+			       struct cipher_aead_pkt *aead_op, u8_t *nonce)
 {
 	struct tc_ccm_mode_struct ccm;
 	struct tc_shim_drv_state *data =  ctx->drv_sessn_state;
diff --git a/drivers/display/mb_display.c b/drivers/display/mb_display.c
index cf5e8c64e75..e8392920ca7 100644
--- a/drivers/display/mb_display.c
+++ b/drivers/display/mb_display.c
@@ -38,21 +38,21 @@ struct mb_display {
 
 	struct k_timer  timer;       /* Rendering timer */
 
-	uint8_t         img_count;   /* Image count */
+	u8_t         img_count;   /* Image count */
 
-	uint8_t         cur_img;     /* Current image or character to show */
+	u8_t         cur_img;     /* Current image or character to show */
 
-	uint8_t         scroll:3,    /* Scroll shift */
+	u8_t         scroll:3,    /* Scroll shift */
 			first:1,     /* First frame of a scroll sequence */
 			loop:1,      /* Loop to beginning */
 			text:1,      /* We're showing a string (not image) */
 			img_sep:1;   /* One column image separation */
 
 	/* The following variables track the currently shown image */
-	uint8_t         cur;         /* Currently rendered row */
-	uint32_t        row[3];      /* Content (columns) for each row */
-	int64_t         expiry;      /* When to stop showing current image */
-	int32_t         duration;    /* Duration for each shown image */
+	u8_t         cur;         /* Currently rendered row */
+	u32_t        row[3];      /* Content (columns) for each row */
+	s64_t         expiry;      /* When to stop showing current image */
+	s32_t         duration;    /* Duration for each shown image */
 
 	union {
 		const struct mb_image *img; /* Array of images to show */
@@ -64,7 +64,7 @@ struct mb_display {
 };
 
 struct x_y {
-	uint8_t x:4,
+	u8_t x:4,
 		y:4;
 };
 
@@ -78,7 +78,7 @@ static const struct x_y map[DISPLAY_ROWS][DISPLAY_COLS] = {
 };
 
 /* Mask of all the column bits */
-static const uint32_t col_mask = (((~0UL) << LED_COL1_GPIO_PIN) &
+static const u32_t col_mask = (((~0UL) << LED_COL1_GPIO_PIN) &
 				  ((~0UL) >> (31 - LED_COL9_GPIO_PIN)));
 
 static inline const struct mb_image *get_font(char ch)
@@ -123,10 +123,10 @@ static void start_image(struct mb_display *disp, const struct mb_image *img)
 
 #define ROW_PIN(n) (LED_ROW1_GPIO_PIN + (n))
 
-static inline void update_pins(struct mb_display *disp, uint32_t val)
+static inline void update_pins(struct mb_display *disp, u32_t val)
 {
 	if (IS_ENABLED(CONFIG_MICROBIT_DISPLAY_PIN_GRANULARITY)) {
-		uint32_t pin, prev = (disp->cur + 2) % 3;
+		u32_t pin, prev = (disp->cur + 2) % 3;
 
 		/* Disable the previous row */
 		gpio_pin_write(disp->dev, ROW_PIN(prev), 0);
@@ -197,7 +197,7 @@ static inline bool last_frame(struct mb_display *disp)
 	}
 }
 
-static inline uint8_t scroll_steps(struct mb_display *disp)
+static inline u8_t scroll_steps(struct mb_display *disp)
 {
 	return 5 + disp->img_sep;
 }
@@ -285,7 +285,7 @@ static struct mb_display display = {
 	.timer = K_TIMER_INITIALIZER(display.timer, show_row, clear_display),
 };
 
-static void start_scroll(struct mb_display *disp, int32_t duration)
+static void start_scroll(struct mb_display *disp, s32_t duration)
 {
 	/* Divide total duration by number of scrolling steps */
 	if (duration) {
@@ -300,7 +300,7 @@ static void start_scroll(struct mb_display *disp, int32_t duration)
 	start_image(disp, get_font(' '));
 }
 
-static void start_single(struct mb_display *disp, int32_t duration)
+static void start_single(struct mb_display *disp, s32_t duration)
 {
 	disp->duration = duration;
 
@@ -311,8 +311,8 @@ static void start_single(struct mb_display *disp, int32_t duration)
 	}
 }
 
-void mb_display_image(struct mb_display *disp, uint32_t mode, int32_t duration,
-		      const struct mb_image *img, uint8_t img_count)
+void mb_display_image(struct mb_display *disp, u32_t mode, s32_t duration,
+		      const struct mb_image *img, u8_t img_count)
 {
 	reset_display(disp);
 
@@ -343,8 +343,8 @@ void mb_display_stop(struct mb_display *disp)
 	reset_display(disp);
 }
 
-void mb_display_print(struct mb_display *disp, uint32_t mode,
-		      int32_t duration, const char *fmt, ...)
+void mb_display_print(struct mb_display *disp, u32_t mode,
+		      s32_t duration, const char *fmt, ...)
 {
 	va_list ap;
 
diff --git a/drivers/dma/dma_qmsi.c b/drivers/dma/dma_qmsi.c
index b69f125b0db..9580764c3aa 100644
--- a/drivers/dma/dma_qmsi.c
+++ b/drivers/dma/dma_qmsi.c
@@ -29,7 +29,7 @@ struct dma_qmsi_config_info {
 };
 
 struct dma_qmsi_context {
-	uint32_t index;
+	u32_t index;
 	struct device *dev;
 };
 
@@ -38,11 +38,11 @@ struct dma_qmsi_driver_data {
 	void (*error[QM_DMA_CHANNEL_NUM])(struct device *dev, void *data);
 	void *callback_data[QM_DMA_CHANNEL_NUM];
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
-	uint32_t device_power_state;
+	u32_t device_power_state;
 	qm_dma_context_t saved_ctx;
 #endif
 	void (*dma_user_callback[QM_DMA_CHANNEL_NUM])(struct device *dev,
-						      uint32_t channel_id,
+						      u32_t channel_id,
 						      int error_code);
 };
 
@@ -50,11 +50,11 @@ struct dma_qmsi_driver_data {
 static struct dma_qmsi_context dma_context[QM_DMA_CHANNEL_NUM];
 static void dma_qmsi_config(struct device *dev);
 
-static void dma_callback(void *callback_context, uint32_t len,
+static void dma_callback(void *callback_context, u32_t len,
 						 int error_code)
 {
 	struct dma_qmsi_driver_data *data;
-	uint32_t channel;
+	u32_t channel;
 	struct dma_qmsi_context *context = callback_context;
 
 	channel = context->index;
@@ -68,12 +68,12 @@ static void dma_callback(void *callback_context, uint32_t len,
 	data->transfer[channel](context->dev, data->callback_data[channel]);
 }
 
-static void dma_drv_callback(void *callback_context, uint32_t len,
+static void dma_drv_callback(void *callback_context, u32_t len,
 			     int error_code)
 {
 	struct dma_qmsi_context *context = callback_context;
 	struct dma_qmsi_driver_data *data;
-	uint32_t channel;
+	u32_t channel;
 
 	channel = context->index;
 	data = context->dev->driver_data;
@@ -81,7 +81,7 @@ static void dma_drv_callback(void *callback_context, uint32_t len,
 	data->dma_user_callback[channel](context->dev, channel, error_code);
 }
 
-static int dma_qmsi_channel_config(struct device *dev, uint32_t channel,
+static int dma_qmsi_channel_config(struct device *dev, u32_t channel,
 				   struct dma_channel_config *config)
 {
 	qm_dma_channel_config_t qmsi_cfg;
@@ -119,7 +119,7 @@ static int dma_qmsi_channel_config(struct device *dev, uint32_t channel,
 	return qm_dma_channel_set_config(info->instance, channel, &qmsi_cfg);
 }
 
-static int dma_qmsi_transfer_config(struct device *dev, uint32_t channel,
+static int dma_qmsi_transfer_config(struct device *dev, u32_t channel,
 				    struct dma_transfer_config *config)
 {
 	const struct dma_qmsi_config_info *info = dev->config->config_info;
@@ -128,7 +128,7 @@ static int dma_qmsi_transfer_config(struct device *dev, uint32_t channel,
 					 (qm_dma_transfer_t *)config);
 }
 
-static int width_index(uint32_t num_bytes, uint32_t *index)
+static int width_index(u32_t num_bytes, u32_t *index)
 {
 	switch (num_bytes) {
 	case 1:
@@ -156,7 +156,7 @@ static int width_index(uint32_t num_bytes, uint32_t *index)
 	return 0;
 }
 
-static int bst_index(uint32_t num_units, uint32_t *index)
+static int bst_index(u32_t num_units, u32_t *index)
 {
 	switch (num_units) {
 	case 1:
@@ -190,14 +190,14 @@ static int bst_index(uint32_t num_units, uint32_t *index)
 	return 0;
 }
 
-static int dma_qmsi_chan_config(struct device *dev, uint32_t channel,
+static int dma_qmsi_chan_config(struct device *dev, u32_t channel,
 				struct dma_config *config)
 {
 	const struct dma_qmsi_config_info *info = dev->config->config_info;
 	struct dma_qmsi_driver_data *data = dev->driver_data;
 	qm_dma_transfer_t qmsi_transfer_cfg = { 0 };
 	qm_dma_channel_config_t qmsi_cfg = { 0 };
-	uint32_t temp = 0;
+	u32_t temp = 0;
 	int ret = 0;
 
 	if (config->block_count != 1) {
@@ -250,16 +250,16 @@ static int dma_qmsi_chan_config(struct device *dev, uint32_t channel,
 	}
 
 	qmsi_transfer_cfg.block_size = config->head_block->block_size;
-	qmsi_transfer_cfg.source_address = (uint32_t *)
+	qmsi_transfer_cfg.source_address = (u32_t *)
 					   config->head_block->source_address;
-	qmsi_transfer_cfg.destination_address = (uint32_t *)
+	qmsi_transfer_cfg.destination_address = (u32_t *)
 					      config->head_block->dest_address;
 
 	return qm_dma_transfer_set_config(info->instance, channel,
 					  &qmsi_transfer_cfg);
 }
 
-static int dma_qmsi_transfer_start(struct device *dev, uint32_t channel)
+static int dma_qmsi_transfer_start(struct device *dev, u32_t channel)
 {
 	int ret;
 	const struct dma_qmsi_config_info *info = dev->config->config_info;
@@ -271,7 +271,7 @@ static int dma_qmsi_transfer_start(struct device *dev, uint32_t channel)
 	return ret;
 }
 
-static int dma_qmsi_start(struct device *dev, uint32_t channel)
+static int dma_qmsi_start(struct device *dev, u32_t channel)
 {
 	int ret;
 	const struct dma_qmsi_config_info *info = dev->config->config_info;
@@ -283,14 +283,14 @@ static int dma_qmsi_start(struct device *dev, uint32_t channel)
 	return ret;
 }
 
-static int dma_qmsi_transfer_stop(struct device *dev, uint32_t channel)
+static int dma_qmsi_transfer_stop(struct device *dev, u32_t channel)
 {
 	const struct dma_qmsi_config_info *info = dev->config->config_info;
 
 	return qm_dma_transfer_terminate(info->instance, channel);
 }
 
-static int dma_qmsi_stop(struct device *dev, uint32_t channel)
+static int dma_qmsi_stop(struct device *dev, u32_t channel)
 {
 	const struct dma_qmsi_config_info *info = dev->config->config_info;
 
@@ -308,14 +308,14 @@ static const struct dma_driver_api dma_funcs = {
 };
 
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
-static void dma_qmsi_set_power_state(struct device *dev, uint32_t power_state)
+static void dma_qmsi_set_power_state(struct device *dev, u32_t power_state)
 {
 	struct dma_qmsi_driver_data *ctx = dev->driver_data;
 
 	ctx->device_power_state = power_state;
 }
 
-static uint32_t dma_qmsi_get_power_state(struct device *dev)
+static u32_t dma_qmsi_get_power_state(struct device *dev)
 {
 	struct dma_qmsi_driver_data *ctx = dev->driver_data;
 
@@ -364,17 +364,17 @@ static int dma_resume_device(struct device *dev)
 	return 0;
 }
 
-static int dma_qmsi_device_ctrl(struct device *dev, uint32_t ctrl_command,
+static int dma_qmsi_device_ctrl(struct device *dev, u32_t ctrl_command,
 				void *context)
 {
 	if (ctrl_command == DEVICE_PM_SET_POWER_STATE) {
-		if (*((uint32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
+		if (*((u32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
 			return dma_suspend_device(dev);
-		} else if (*((uint32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
+		} else if (*((u32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
 			return dma_resume_device(dev);
 		}
 	} else if (ctrl_command == DEVICE_PM_GET_POWER_STATE) {
-		*((uint32_t *)context) = dma_qmsi_get_power_state(dev);
+		*((u32_t *)context) = dma_qmsi_get_power_state(dev);
 	}
 
 	return 0;
diff --git a/drivers/dma/dma_stm32f4x.c b/drivers/dma/dma_stm32f4x.c
index cdfe6e812e0..71f4e627982 100644
--- a/drivers/dma/dma_stm32f4x.c
+++ b/drivers/dma/dma_stm32f4x.c
@@ -32,37 +32,37 @@
 
 struct dma_stm32_stream_reg {
 	/* Shared registers */
-	uint32_t lisr;
-	uint32_t hisr;
-	uint32_t lifcr;
-	uint32_t hifcr;
+	u32_t lisr;
+	u32_t hisr;
+	u32_t lifcr;
+	u32_t hifcr;
 
 	/* Per stream registers */
-	uint32_t scr;
-	uint32_t sndtr;
-	uint32_t spar;
-	uint32_t sm0ar;
-	uint32_t sm1ar;
-	uint32_t sfcr;
+	u32_t scr;
+	u32_t sndtr;
+	u32_t spar;
+	u32_t sm0ar;
+	u32_t sm1ar;
+	u32_t sfcr;
 };
 
 struct dma_stm32_stream {
-	uint32_t direction;
+	u32_t direction;
 	struct device *dev;
 	struct dma_stm32_stream_reg regs;
 	bool busy;
 
-	void (*dma_callback)(struct device *dev, uint32_t id,
+	void (*dma_callback)(struct device *dev, u32_t id,
 			     int error_code);
 };
 
 static struct dma_stm32_device {
-	uint32_t base;
+	u32_t base;
 	struct device *clk;
 	struct dma_stm32_stream stream[DMA_STM32_MAX_STREAMS];
 	bool mem2mem;
-	uint8_t channel_rx;
-	uint8_t channel_tx;
+	u8_t channel_rx;
+	u8_t channel_tx;
 } device_data[DMA_STM32_MAX_DEVS];
 
 struct dma_stm32_config {
@@ -170,23 +170,23 @@ struct dma_stm32_config {
 #define   DMA_STM32_SFCR_MASK		(DMA_STM32_SFCR_FEIE \
 					 | DMA_STM32_SFCR_DMDIS)
 
-#define SYS_LOG_U32			__attribute((__unused__)) uint32_t
+#define SYS_LOG_U32			__attribute((__unused__)) u32_t
 
 static void dma_stm32_1_config(struct dma_stm32_device *ddata);
 static void dma_stm32_2_config(struct dma_stm32_device *ddata);
 
-static uint32_t dma_stm32_read(struct dma_stm32_device *ddata, uint32_t reg)
+static u32_t dma_stm32_read(struct dma_stm32_device *ddata, u32_t reg)
 {
 	return sys_read32(ddata->base + reg);
 }
 
 static void dma_stm32_write(struct dma_stm32_device *ddata,
-			    uint32_t reg, uint32_t val)
+			    u32_t reg, u32_t val)
 {
 	sys_write32(val, ddata->base + reg);
 }
 
-static void dma_stm32_dump_reg(struct dma_stm32_device *ddata, uint32_t id)
+static void dma_stm32_dump_reg(struct dma_stm32_device *ddata, u32_t id)
 {
 	SYS_LOG_INF("Using stream: %d\n", id);
 	SYS_LOG_INF("SCR:   0x%x \t(config)\n",
@@ -203,10 +203,10 @@ static void dma_stm32_dump_reg(struct dma_stm32_device *ddata, uint32_t id)
 		    dma_stm32_read(ddata, DMA_STM32_SFCR(id)));
 }
 
-static uint32_t dma_stm32_irq_status(struct dma_stm32_device *ddata,
-				     uint32_t id)
+static u32_t dma_stm32_irq_status(struct dma_stm32_device *ddata,
+				     u32_t id)
 {
-	uint32_t irqs;
+	u32_t irqs;
 
 	if (id & 4) {
 		irqs = dma_stm32_read(ddata, DMA_STM32_HISR);
@@ -218,7 +218,7 @@ static uint32_t dma_stm32_irq_status(struct dma_stm32_device *ddata,
 }
 
 static void dma_stm32_irq_clear(struct dma_stm32_device *ddata,
-				uint32_t id, uint32_t irqs)
+				u32_t id, u32_t irqs)
 {
 	irqs = irqs << (((id & 2) << 3) | ((id & 1) * 6));
 
@@ -229,12 +229,12 @@ static void dma_stm32_irq_clear(struct dma_stm32_device *ddata,
 	}
 }
 
-static void dma_stm32_irq_handler(void *arg, uint32_t id)
+static void dma_stm32_irq_handler(void *arg, u32_t id)
 {
 	struct device *dev = arg;
 	struct dma_stm32_device *ddata = dev->driver_data;
 	struct dma_stm32_stream *stream = &ddata->stream[id];
-	uint32_t irqstatus, config, sfcr;
+	u32_t irqstatus, config, sfcr;
 
 	irqstatus = dma_stm32_irq_status(ddata, id);
 	config = dma_stm32_read(ddata, DMA_STM32_SCR(id));
@@ -261,9 +261,9 @@ static void dma_stm32_irq_handler(void *arg, uint32_t id)
 }
 
 static int dma_stm32_disable_stream(struct dma_stm32_device *ddata,
-				  uint32_t id)
+				  u32_t id)
 {
-	uint32_t config;
+	u32_t config;
 	int count = 0;
 	int ret = 0;
 
@@ -289,16 +289,16 @@ static int dma_stm32_disable_stream(struct dma_stm32_device *ddata,
 	return ret;
 }
 
-static int dma_stm32_config_devcpy(struct device *dev, uint32_t id,
+static int dma_stm32_config_devcpy(struct device *dev, u32_t id,
 				   struct dma_config *config)
 
 {
 	struct dma_stm32_device *ddata = dev->driver_data;
 	struct dma_stm32_stream_reg *regs = &ddata->stream[id].regs;
-	uint32_t src_bus_width  = dma_width_index(config->source_data_size);
-	uint32_t dst_bus_width  = dma_width_index(config->dest_data_size);
-	uint32_t src_burst_size = dma_burst_index(config->source_burst_length);
-	uint32_t dst_burst_size = dma_burst_index(config->dest_burst_length);
+	u32_t src_bus_width  = dma_width_index(config->source_data_size);
+	u32_t dst_bus_width  = dma_width_index(config->dest_data_size);
+	u32_t src_burst_size = dma_burst_index(config->source_burst_length);
+	u32_t dst_burst_size = dma_burst_index(config->dest_burst_length);
 	enum dma_channel_direction direction = config->channel_direction;
 
 	switch (direction) {
@@ -339,7 +339,7 @@ static int dma_stm32_config_devcpy(struct device *dev, uint32_t id,
 	return 0;
 }
 
-static int dma_stm32_config_memcpy(struct device *dev, uint32_t id)
+static int dma_stm32_config_memcpy(struct device *dev, u32_t id)
 {
 	struct dma_stm32_device *ddata = dev->driver_data;
 	struct dma_stm32_stream_reg *regs = &ddata->stream[id].regs;
@@ -357,7 +357,7 @@ static int dma_stm32_config_memcpy(struct device *dev, uint32_t id)
 	return 0;
 }
 
-static int dma_stm32_config(struct device *dev, uint32_t id,
+static int dma_stm32_config(struct device *dev, u32_t id,
 			    struct dma_config *config)
 {
 	struct dma_stm32_device *ddata = dev->driver_data;
@@ -380,11 +380,11 @@ static int dma_stm32_config(struct device *dev, uint32_t id,
 	stream->direction	= config->channel_direction;
 
 	if (stream->direction == MEMORY_TO_PERIPHERAL) {
-		regs->sm0ar = (uint32_t)config->head_block->source_address;
-		regs->spar = (uint32_t)config->head_block->dest_address;
+		regs->sm0ar = (u32_t)config->head_block->source_address;
+		regs->spar = (u32_t)config->head_block->dest_address;
 	} else {
-		regs->spar = (uint32_t)config->head_block->source_address;
-		regs->sm0ar = (uint32_t)config->head_block->dest_address;
+		regs->spar = (u32_t)config->head_block->source_address;
+		regs->sm0ar = (u32_t)config->head_block->dest_address;
 	}
 
 	if (stream->direction == MEMORY_TO_MEMORY) {
@@ -398,11 +398,11 @@ static int dma_stm32_config(struct device *dev, uint32_t id,
 	return ret;
 }
 
-static int dma_stm32_start(struct device *dev, uint32_t id)
+static int dma_stm32_start(struct device *dev, u32_t id)
 {
 	struct dma_stm32_device *ddata = dev->driver_data;
 	struct dma_stm32_stream_reg *regs = &ddata->stream[id].regs;
-	uint32_t irqstatus;
+	u32_t irqstatus;
 	int ret;
 
 	ret = dma_stm32_disable_stream(ddata, id);
@@ -432,11 +432,11 @@ static int dma_stm32_start(struct device *dev, uint32_t id)
 	return 0;
 }
 
-static int dma_stm32_stop(struct device *dev, uint32_t id)
+static int dma_stm32_stop(struct device *dev, u32_t id)
 {
 	struct dma_stm32_device *ddata = dev->driver_data;
 	struct dma_stm32_stream *stream = &ddata->stream[id];
-	uint32_t scr, sfcr, irqstatus;
+	u32_t scr, sfcr, irqstatus;
 	int ret;
 
 	/* Disable all IRQs */
diff --git a/drivers/flash/flash_stm32f3x.c b/drivers/flash/flash_stm32f3x.c
index 54b5fc38fc5..1cfe122ec9d 100644
--- a/drivers/flash/flash_stm32f3x.c
+++ b/drivers/flash/flash_stm32f3x.c
@@ -12,10 +12,10 @@
 
 static int flash_stm32_erase(struct device *dev, off_t offset, size_t size)
 {
-	uint32_t first_page_addr = 0;
-	uint32_t last_page_addr = 0;
-	uint16_t no_of_pages = size / CONFIG_FLASH_PAGE_SIZE;
-	uint16_t page_index = 0;
+	u32_t first_page_addr = 0;
+	u32_t last_page_addr = 0;
+	u16_t no_of_pages = size / CONFIG_FLASH_PAGE_SIZE;
+	u16_t page_index = 0;
 
 	/* Check offset and size alignment. */
 	if (((offset % CONFIG_FLASH_PAGE_SIZE) != 0) ||
@@ -55,7 +55,7 @@ static int flash_stm32_erase(struct device *dev, off_t offset, size_t size)
 static int flash_stm32_read(struct device *dev, off_t offset,
 			    void *data, size_t len)
 {
-	uint32_t address = CONFIG_FLASH_BASE_ADDRESS + offset;
+	u32_t address = CONFIG_FLASH_BASE_ADDRESS + offset;
 
 	__ASSERT_NO_MSG(IS_FLASH_PROGRAM_ADDRESS(address));
 
@@ -67,12 +67,12 @@ static int flash_stm32_read(struct device *dev, off_t offset,
 static int flash_stm32_write(struct device *dev, off_t offset,
 			     const void *data, size_t len)
 {
-	uint16_t halfword = 0;
+	u16_t halfword = 0;
 
-	uint32_t address =
+	u32_t address =
 		CONFIG_FLASH_BASE_ADDRESS + offset;
 
-	uint8_t remainder = 0;
+	u8_t remainder = 0;
 
 	if ((len % 2) != 0) {
 		remainder = 1;
@@ -81,8 +81,8 @@ static int flash_stm32_write(struct device *dev, off_t offset,
 	len = len / 2;
 
 	while (len--) {
-		halfword = *((uint8_t *)data++);
-		halfword |= *((uint8_t *)data++) << 8;
+		halfword = *((u8_t *)data++);
+		halfword |= *((u8_t *)data++) << 8;
 		if (flash_stm32_program_halfword(dev, address, halfword)
 				!= FLASH_COMPLETE) {
 			return -EINVAL;
@@ -91,7 +91,7 @@ static int flash_stm32_write(struct device *dev, off_t offset,
 	}
 
 	if (remainder) {
-		halfword = (*((uint16_t *)data)) & 0x00FF;
+		halfword = (*((u16_t *)data)) & 0x00FF;
 		if (flash_stm32_program_halfword(dev, address, halfword)
 				!= FLASH_COMPLETE) {
 			return -EINVAL;
@@ -132,7 +132,7 @@ static const struct flash_driver_api flash_stm32_api = {
 };
 
 static const struct flash_stm32_dev_config flash_device_config = {
-	.base = (uint32_t *)FLASH_R_BASE,
+	.base = (u32_t *)FLASH_R_BASE,
 	.pclken = { .bus = STM32_CLOCK_BUS_APB1,
 		    .enr =  LL_AHB1_GRP1_PERIPH_FLASH},
 };
diff --git a/drivers/flash/flash_stm32f3x.h b/drivers/flash/flash_stm32f3x.h
index c0257cc75ae..496773ce51a 100644
--- a/drivers/flash/flash_stm32f3x.h
+++ b/drivers/flash/flash_stm32f3x.h
@@ -13,7 +13,7 @@
 #include <flash_registers.h>
 
 struct flash_stm32_dev_config {
-	uint32_t *base;
+	u32_t *base;
 	struct stm32_pclken pclken;
 };
 
@@ -29,7 +29,7 @@ struct flash_stm32_dev_data {
 	(volatile struct stm32_flash *)(base)
 
 /* Flash programming timeout definition. */
-#define FLASH_ER_PRG_TIMEOUT	((uint32_t)0x000B0000)
+#define FLASH_ER_PRG_TIMEOUT	((u32_t)0x000B0000)
 
 enum flash_status {
 	FLASH_BUSY = 1,
@@ -43,24 +43,24 @@ void flash_stm32_lock(struct device *flash);
 
 void flash_stm32_unlock(struct device *flash);
 
-uint8_t flash_stm32_program_halfword(struct device *flash,
-				     uint32_t address,
-				     uint16_t data);
+u8_t flash_stm32_program_halfword(struct device *flash,
+				     u32_t address,
+				     u16_t data);
 
-uint8_t flash_stm32_program_word(struct device *flash,
-				 uint32_t address,
-				 uint32_t data);
+u8_t flash_stm32_program_word(struct device *flash,
+				 u32_t address,
+				 u32_t data);
 
-void flash_stm32_read_data(void *data, uint32_t address, size_t len);
+void flash_stm32_read_data(void *data, u32_t address, size_t len);
 
-uint8_t flash_stm32_wait_for_last_operation(struct device *flash,
-					    uint32_t timeout);
+u8_t flash_stm32_wait_for_last_operation(struct device *flash,
+					    u32_t timeout);
 
-uint8_t flash_stm32_get_status(struct device *flash);
+u8_t flash_stm32_get_status(struct device *flash);
 
-uint8_t flash_stm32_erase_page(struct device *flash,
-			       uint32_t page_address);
+u8_t flash_stm32_erase_page(struct device *flash,
+			       u32_t page_address);
 
-uint8_t flash_stm32_erase_all_pages(struct device *flash);
+u8_t flash_stm32_erase_all_pages(struct device *flash);
 
 #endif /* DRIVERS_FLASH_FLASH_STM32_H_ */
diff --git a/drivers/flash/flash_stm32f3x_priv.c b/drivers/flash/flash_stm32f3x_priv.c
index d34ffb56471..ee2a33a4fb6 100644
--- a/drivers/flash/flash_stm32f3x_priv.c
+++ b/drivers/flash/flash_stm32f3x_priv.c
@@ -32,11 +32,11 @@ void flash_stm32_lock(struct device *flash)
 	reg->cr |= FLASH_CR_LOCK;
 }
 
-uint8_t flash_stm32_program_halfword(struct device *flash,
-				     uint32_t address,
-				     uint16_t data)
+u8_t flash_stm32_program_halfword(struct device *flash,
+				     u32_t address,
+				     u16_t data)
 {
-	uint8_t status = FLASH_COMPLETE;
+	u8_t status = FLASH_COMPLETE;
 
 	const struct flash_stm32_dev_config *config = FLASH_CFG(flash);
 
@@ -50,7 +50,7 @@ uint8_t flash_stm32_program_halfword(struct device *flash,
 	if (status == FLASH_COMPLETE) {
 		reg->cr |= FLASH_CR_PG;
 
-		*(volatile uint16_t *)address = data;
+		*(volatile u16_t *)address = data;
 
 		status = flash_stm32_wait_for_last_operation(flash,
 				FLASH_ER_PRG_TIMEOUT);
@@ -61,11 +61,11 @@ uint8_t flash_stm32_program_halfword(struct device *flash,
 	return status;
 }
 
-uint8_t flash_stm32_program_word(struct device *flash,
-				 uint32_t address,
-				 uint32_t data)
+u8_t flash_stm32_program_word(struct device *flash,
+				 u32_t address,
+				 u32_t data)
 {
-	uint8_t status = FLASH_COMPLETE;
+	u8_t status = FLASH_COMPLETE;
 
 	const struct flash_stm32_dev_config *config = FLASH_CFG(flash);
 
@@ -79,7 +79,7 @@ uint8_t flash_stm32_program_word(struct device *flash,
 	if (status == FLASH_COMPLETE) {
 		reg->cr |= FLASH_CR_PG;
 
-		*(volatile uint16_t *)address = (uint16_t)data;
+		*(volatile u16_t *)address = (u16_t)data;
 
 		status = flash_stm32_wait_for_last_operation(flash,
 				FLASH_ER_PRG_TIMEOUT);
@@ -87,7 +87,7 @@ uint8_t flash_stm32_program_word(struct device *flash,
 		if (status == FLASH_COMPLETE) {
 			address += 2;
 
-			*(volatile uint16_t *)address = data >> 16;
+			*(volatile u16_t *)address = data >> 16;
 
 			status = flash_stm32_wait_for_last_operation(flash,
 					FLASH_ER_PRG_TIMEOUT);
@@ -99,10 +99,10 @@ uint8_t flash_stm32_program_word(struct device *flash,
 	return status;
 }
 
-uint8_t flash_stm32_wait_for_last_operation(struct device *flash,
-					    uint32_t timeout)
+u8_t flash_stm32_wait_for_last_operation(struct device *flash,
+					    u32_t timeout)
 {
-	uint8_t status = FLASH_COMPLETE;
+	u8_t status = FLASH_COMPLETE;
 
 	/* Check for the FLASH Status */
 	status = flash_stm32_get_status(flash);
@@ -120,9 +120,9 @@ uint8_t flash_stm32_wait_for_last_operation(struct device *flash,
 	return status;
 }
 
-uint8_t flash_stm32_get_status(struct device *flash)
+u8_t flash_stm32_get_status(struct device *flash)
 {
-	uint8_t status = FLASH_COMPLETE;
+	u8_t status = FLASH_COMPLETE;
 
 	const struct flash_stm32_dev_config *config = FLASH_CFG(flash);
 
@@ -134,12 +134,12 @@ uint8_t flash_stm32_get_status(struct device *flash)
 			break;
 		}
 
-		if ((reg->sr & FLASH_SR_WRPERR) != (uint32_t)0x00) {
+		if ((reg->sr & FLASH_SR_WRPERR) != (u32_t)0x00) {
 			status = FLASH_ERROR_WRITE_PROTECTION;
 			break;
 		}
 
-		if ((reg->sr & FLASH_SR_PGERR) != (uint32_t)0x00) {
+		if ((reg->sr & FLASH_SR_PGERR) != (u32_t)0x00) {
 			status = FLASH_ERROR_PROGRAM;
 			break;
 		}
@@ -148,10 +148,10 @@ uint8_t flash_stm32_get_status(struct device *flash)
 	return status;
 }
 
-uint8_t flash_stm32_erase_page(struct device *flash,
-			       uint32_t page_address)
+u8_t flash_stm32_erase_page(struct device *flash,
+			       u32_t page_address)
 {
-	uint8_t status = FLASH_COMPLETE;
+	u8_t status = FLASH_COMPLETE;
 
 	const struct flash_stm32_dev_config *config = FLASH_CFG(flash);
 
@@ -176,9 +176,9 @@ uint8_t flash_stm32_erase_page(struct device *flash,
 	return status;
 }
 
-uint8_t flash_stm32_erase_all_pages(struct device *flash)
+u8_t flash_stm32_erase_all_pages(struct device *flash)
 {
-	uint8_t status = FLASH_COMPLETE;
+	u8_t status = FLASH_COMPLETE;
 
 	const struct flash_stm32_dev_config *config = FLASH_CFG(flash);
 
@@ -200,9 +200,9 @@ uint8_t flash_stm32_erase_all_pages(struct device *flash)
 	return status;
 }
 
-void flash_stm32_read_data(void *data, uint32_t address, size_t len)
+void flash_stm32_read_data(void *data, u32_t address, size_t len)
 {
-	uint8_t *addr = INT_TO_POINTER(address);
+	u8_t *addr = INT_TO_POINTER(address);
 
 	memcpy(data, addr, len);
 }
diff --git a/drivers/flash/flash_stm32f4x.c b/drivers/flash/flash_stm32f4x.c
index d31fb210bbc..51f12ac7751 100644
--- a/drivers/flash/flash_stm32f4x.c
+++ b/drivers/flash/flash_stm32f4x.c
@@ -19,14 +19,14 @@ struct flash_priv {
 	struct k_sem sem;
 };
 
-static bool valid_range(off_t offset, uint32_t len)
+static bool valid_range(off_t offset, u32_t len)
 {
 	return offset >= 0 && (offset + len - 1 <= STM32F4X_FLASH_END);
 }
 
 static int check_status(struct stm32f4x_flash *regs)
 {
-	uint32_t const error =
+	u32_t const error =
 		FLASH_FLAG_WRPERR |
 		FLASH_FLAG_PGAERR |
 		FLASH_FLAG_RDERR  |
@@ -43,7 +43,7 @@ static int check_status(struct stm32f4x_flash *regs)
 
 static int wait_flash_idle(struct stm32f4x_flash *regs)
 {
-	uint32_t timeout = STM32F4X_FLASH_TIMEOUT;
+	u32_t timeout = STM32F4X_FLASH_TIMEOUT;
 	int rc;
 
 	rc = check_status(regs);
@@ -62,9 +62,9 @@ static int wait_flash_idle(struct stm32f4x_flash *regs)
 	return 0;
 }
 
-static int write_byte(off_t offset, uint8_t val, struct stm32f4x_flash *regs)
+static int write_byte(off_t offset, u8_t val, struct stm32f4x_flash *regs)
 {
-	uint32_t tmp;
+	u32_t tmp;
 	int rc;
 
 	/* if the control register is locked, do not fail silently */
@@ -84,7 +84,7 @@ static int write_byte(off_t offset, uint8_t val, struct stm32f4x_flash *regs)
 	/* flush the register write */
 	tmp = regs->ctrl;
 
-	*((uint8_t *) offset + CONFIG_FLASH_BASE_ADDRESS) = val;
+	*((u8_t *) offset + CONFIG_FLASH_BASE_ADDRESS) = val;
 
 	rc = wait_flash_idle(regs);
 	regs->ctrl &= (~FLASH_CR_PG);
@@ -92,9 +92,9 @@ static int write_byte(off_t offset, uint8_t val, struct stm32f4x_flash *regs)
 	return rc;
 }
 
-static int erase_sector(uint16_t sector, struct stm32f4x_flash *regs)
+static int erase_sector(u16_t sector, struct stm32f4x_flash *regs)
 {
-	uint32_t tmp;
+	u32_t tmp;
 	int rc;
 
 	/* if the control register is locked, do not fail silently */
@@ -199,7 +199,7 @@ static int flash_stm32f4x_write(struct device *dev, off_t offset,
 	k_sem_take(&p->sem, K_FOREVER);
 
 	for (i = 0; i < len; i++, offset++) {
-		rc = write_byte(offset, ((const uint8_t *) data)[i], p->regs);
+		rc = write_byte(offset, ((const u8_t *) data)[i], p->regs);
 		if (rc < 0) {
 			k_sem_give(&p->sem);
 			return rc;
diff --git a/drivers/flash/soc_flash_mcux.c b/drivers/flash/soc_flash_mcux.c
index d33af5f6115..73187e1aef5 100644
--- a/drivers/flash/soc_flash_mcux.c
+++ b/drivers/flash/soc_flash_mcux.c
@@ -32,7 +32,7 @@ struct flash_priv {
 static int flash_mcux_erase(struct device *dev, off_t offset, size_t len)
 {
 	struct flash_priv *priv = dev->driver_data;
-	uint32_t addr;
+	u32_t addr;
 	status_t rc;
 	int key;
 
@@ -49,7 +49,7 @@ static int flash_mcux_read(struct device *dev, off_t offset,
 				void *data, size_t len)
 {
 	struct flash_priv *priv = dev->driver_data;
-	uint32_t addr;
+	u32_t addr;
 
 	/*
 	 * The MCUX supports different flash chips whose valid ranges are
@@ -67,14 +67,14 @@ static int flash_mcux_write(struct device *dev, off_t offset,
 				const void *data, size_t len)
 {
 	struct flash_priv *priv = dev->driver_data;
-	uint32_t addr;
+	u32_t addr;
 	status_t rc;
 	int key;
 
 	addr = offset + priv->config.PFlashBlockBase;
 
 	key = irq_lock();
-	rc = FLASH_Program(&priv->config, addr, (uint32_t *) data, len);
+	rc = FLASH_Program(&priv->config, addr, (u32_t *) data, len);
 	irq_unlock(key);
 
 	return (rc == kStatus_Success) ? 0 : -EINVAL;
diff --git a/drivers/flash/soc_flash_nrf5.c b/drivers/flash/soc_flash_nrf5.c
index 442e9c98c24..07344af3182 100644
--- a/drivers/flash/soc_flash_nrf5.c
+++ b/drivers/flash/soc_flash_nrf5.c
@@ -14,7 +14,7 @@
 #include <flash.h>
 #include <string.h>
 
-static inline bool is_aligned_32(uint32_t data)
+static inline bool is_aligned_32(u32_t data)
 {
 	return (data & 0x3) ? false : true;
 }
@@ -55,11 +55,11 @@ static int flash_nrf5_read(struct device *dev, off_t addr,
 static int flash_nrf5_write(struct device *dev, off_t addr,
 			     const void *data, size_t len)
 {
-	uint32_t addr_word;
-	uint32_t tmp_word;
+	u32_t addr_word;
+	u32_t tmp_word;
 	void *data_word;
-	uint32_t remaining = len;
-	uint32_t count = 0;
+	u32_t remaining = len;
+	u32_t count = 0;
 
 	if (!is_addr_valid(addr, len)) {
 		return -EINVAL;
@@ -74,34 +74,34 @@ static int flash_nrf5_write(struct device *dev, off_t addr,
 
 	/* If not aligned, read first word, update and write it back */
 	if (!is_aligned_32(addr)) {
-		tmp_word = *(uint32_t *)(addr_word);
-		count = sizeof(uint32_t) - (addr & 0x3);
+		tmp_word = *(u32_t *)(addr_word);
+		count = sizeof(u32_t) - (addr & 0x3);
 		if (count > len) {
 			count = len;
 		}
-		memcpy((uint8_t *)&tmp_word + (addr & 0x3), data, count);
+		memcpy((u8_t *)&tmp_word + (addr & 0x3), data, count);
 		nvmc_wait_ready();
-		*(uint32_t *)addr_word = tmp_word;
+		*(u32_t *)addr_word = tmp_word;
 		addr_word = addr + count;
 		remaining -= count;
 	}
 
 	/* Write all the 4-byte aligned data */
 	data_word = (void *) data + count;
-	while (remaining >= sizeof(uint32_t)) {
+	while (remaining >= sizeof(u32_t)) {
 		nvmc_wait_ready();
-		*(uint32_t *)addr_word = *(uint32_t *)data_word;
-		addr_word += sizeof(uint32_t);
-		data_word += sizeof(uint32_t);
-		remaining -= sizeof(uint32_t);
+		*(u32_t *)addr_word = *(u32_t *)data_word;
+		addr_word += sizeof(u32_t);
+		data_word += sizeof(u32_t);
+		remaining -= sizeof(u32_t);
 	}
 
 	/* Write remaining data */
 	if (remaining) {
-		tmp_word = *(uint32_t *)(addr_word);
-		memcpy((uint8_t *)&tmp_word, data_word, remaining);
+		tmp_word = *(u32_t *)(addr_word);
+		memcpy((u8_t *)&tmp_word, data_word, remaining);
 		nvmc_wait_ready();
-		*(uint32_t *)addr_word = tmp_word;
+		*(u32_t *)addr_word = tmp_word;
 	}
 
 	nvmc_wait_ready();
@@ -111,8 +111,8 @@ static int flash_nrf5_write(struct device *dev, off_t addr,
 
 static int flash_nrf5_erase(struct device *dev, off_t addr, size_t size)
 {
-	uint32_t pg_size = NRF_FICR->CODEPAGESIZE;
-	uint32_t n_pages = size / pg_size;
+	u32_t pg_size = NRF_FICR->CODEPAGESIZE;
+	u32_t n_pages = size / pg_size;
 
 	/* Erase can only be done per page */
 	if (((addr % pg_size) != 0) || ((size % pg_size) != 0)) {
@@ -131,8 +131,8 @@ static int flash_nrf5_erase(struct device *dev, off_t addr, size_t size)
 	NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Een << NVMC_CONFIG_WEN_Pos;
 	nvmc_wait_ready();
 
-	for (uint32_t i = 0; i < n_pages; i++) {
-		NRF_NVMC->ERASEPAGE = (uint32_t)addr + (i * pg_size);
+	for (u32_t i = 0; i < n_pages; i++) {
+		NRF_NVMC->ERASEPAGE = (u32_t)addr + (i * pg_size);
 		nvmc_wait_ready();
 	}
 
diff --git a/drivers/flash/soc_flash_qmsi.c b/drivers/flash/soc_flash_qmsi.c
index b6b9463b06d..1609b321818 100644
--- a/drivers/flash/soc_flash_qmsi.c
+++ b/drivers/flash/soc_flash_qmsi.c
@@ -20,7 +20,7 @@ struct soc_flash_data {
 	struct k_sem sem;
 #endif
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
-	uint32_t device_power_state;
+	u32_t device_power_state;
 	qm_flash_context_t saved_ctx[QM_FLASH_NUM];
 #endif
 };
@@ -41,12 +41,12 @@ static struct soc_flash_data soc_flash_context;
 #define RP_GET(dev) (NULL)
 #endif
 
-static inline bool is_aligned_32(uint32_t data)
+static inline bool is_aligned_32(u32_t data)
 {
 	return (data & 0x3) ? false : true;
 }
 
-static qm_flash_region_t flash_region(uint32_t addr)
+static qm_flash_region_t flash_region(u32_t addr)
 {
 	if ((addr >= QM_FLASH_REGION_SYS_0_BASE) && (addr <
 	    (QM_FLASH_REGION_SYS_0_BASE + CONFIG_SOC_FLASH_QMSI_SYS_SIZE))) {
@@ -65,7 +65,7 @@ static qm_flash_region_t flash_region(uint32_t addr)
 	return QM_FLASH_REGION_NUM;
 }
 
-static uint32_t get_page_num(uint32_t addr)
+static u32_t get_page_num(u32_t addr)
 {
 	switch (flash_region(addr)) {
 	case QM_FLASH_REGION_SYS:
@@ -101,9 +101,9 @@ static int flash_qmsi_read(struct device *dev, off_t addr,
 		return -EIO;
 	}
 
-	for (uint32_t i = 0; i < (len >> 2); i++) {
+	for (u32_t i = 0; i < (len >> 2); i++) {
 		UNALIGNED_PUT(sys_read32(addr + (i << 2)),
-			      (uint32_t *)data + i);
+			      (u32_t *)data + i);
 	}
 
 	return 0;
@@ -114,7 +114,7 @@ static int flash_qmsi_write(struct device *dev, off_t addr,
 {
 	qm_flash_t flash = QM_FLASH_0;
 	qm_flash_region_t reg;
-	uint32_t data_word = 0, offset = 0, f_addr = 0;
+	u32_t data_word = 0, offset = 0, f_addr = 0;
 
 	if ((!is_aligned_32(len)) || (!is_aligned_32(addr))) {
 		return -EINVAL;
@@ -129,8 +129,8 @@ static int flash_qmsi_write(struct device *dev, off_t addr,
 		return -EIO;
 	}
 
-	for (uint32_t i = 0; i < (len >> 2); i++) {
-		data_word = UNALIGNED_GET((uint32_t *)data + i);
+	for (u32_t i = 0; i < (len >> 2); i++) {
+		data_word = UNALIGNED_GET((u32_t *)data + i);
 		reg = flash_region(addr + (i << 2));
 		f_addr = addr + (i << 2);
 
@@ -172,7 +172,7 @@ static int flash_qmsi_erase(struct device *dev, off_t addr, size_t size)
 {
 	qm_flash_t flash = QM_FLASH_0;
 	qm_flash_region_t reg;
-	uint32_t page = 0;
+	u32_t page = 0;
 
 	/* starting address needs to be a 2KB aligned address */
 	if (addr & QM_FLASH_ADDRESS_MASK) {
@@ -194,7 +194,7 @@ static int flash_qmsi_erase(struct device *dev, off_t addr, size_t size)
 		return -EIO;
 	}
 
-	for (uint32_t i = 0; i < (size >> QM_FLASH_PAGE_SIZE_BITS); i++) {
+	for (u32_t i = 0; i < (size >> QM_FLASH_PAGE_SIZE_BITS); i++) {
 		page = get_page_num(addr) + i;
 #if defined(CONFIG_SOC_QUARK_SE_C1000) || defined(CONFIG_SOC_QUARK_SE_C1000_SS)
 		if (page >= (CONFIG_SOC_FLASH_QMSI_SYS_SIZE >>
@@ -256,14 +256,14 @@ static const struct flash_driver_api flash_qmsi_api = {
 };
 
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
-static void flash_qmsi_set_power_state(struct device *dev, uint32_t power_state)
+static void flash_qmsi_set_power_state(struct device *dev, u32_t power_state)
 {
 	struct soc_flash_data *ctx = dev->driver_data;
 
 	ctx->device_power_state = power_state;
 }
 
-static uint32_t flash_qmsi_get_power_state(struct device *dev)
+static u32_t flash_qmsi_get_power_state(struct device *dev)
 {
 	struct soc_flash_data *ctx = dev->driver_data;
 
@@ -296,17 +296,17 @@ static int flash_qmsi_resume_device(struct device *dev)
 	return 0;
 }
 
-static int flash_qmsi_device_ctrl(struct device *dev, uint32_t ctrl_command,
+static int flash_qmsi_device_ctrl(struct device *dev, u32_t ctrl_command,
 				  void *context)
 {
 	if (ctrl_command == DEVICE_PM_SET_POWER_STATE) {
-		if (*((uint32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
+		if (*((u32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
 			return flash_qmsi_suspend_device(dev);
-		} else if (*((uint32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
+		} else if (*((u32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
 			return flash_qmsi_resume_device(dev);
 		}
 	} else if (ctrl_command == DEVICE_PM_GET_POWER_STATE) {
-		*((uint32_t *)context) = flash_qmsi_get_power_state(dev);
+		*((u32_t *)context) = flash_qmsi_get_power_state(dev);
 	}
 
 	return 0;
diff --git a/drivers/flash/spi_flash_w25qxxdv.c b/drivers/flash/spi_flash_w25qxxdv.c
index ec3882bc4fd..f172fc72a92 100644
--- a/drivers/flash/spi_flash_w25qxxdv.c
+++ b/drivers/flash/spi_flash_w25qxxdv.c
@@ -16,8 +16,8 @@
 static inline int spi_flash_wb_id(struct device *dev)
 {
 	struct spi_flash_data *const driver_data = dev->driver_data;
-	uint8_t buf[W25QXXDV_LEN_CMD_AND_ID];
-	uint32_t temp_data;
+	u8_t buf[W25QXXDV_LEN_CMD_AND_ID];
+	u32_t temp_data;
 
 	buf[0] = W25QXXDV_CMD_RDID;
 
@@ -26,9 +26,9 @@ static inline int spi_flash_wb_id(struct device *dev)
 		return -EIO;
 	}
 
-	temp_data = ((uint32_t) buf[1]) << 16;
-	temp_data |= ((uint32_t) buf[2]) << 8;
-	temp_data |= (uint32_t) buf[3];
+	temp_data = ((u32_t) buf[1]) << 16;
+	temp_data |= ((u32_t) buf[2]) << 8;
+	temp_data |= (u32_t) buf[3];
 
 	if (temp_data != W25QXXDV_RDID_VALUE) {
 		return -ENODEV;
@@ -59,10 +59,10 @@ static int spi_flash_wb_config(struct device *dev)
 	return spi_flash_wb_id(dev);
 }
 
-static int spi_flash_wb_reg_read(struct device *dev, uint8_t *data)
+static int spi_flash_wb_reg_read(struct device *dev, u8_t *data)
 {
 	struct spi_flash_data *const driver_data = dev->driver_data;
-	uint8_t buf[2];
+	u8_t buf[2];
 
 	if (spi_transceive(driver_data->spi, data, 2, buf, 2) != 0) {
 		return -EIO;
@@ -75,7 +75,7 @@ static int spi_flash_wb_reg_read(struct device *dev, uint8_t *data)
 
 static inline void wait_for_flash_idle(struct device *dev)
 {
-	uint8_t buf[2];
+	u8_t buf[2];
 
 	buf[0] = W25QXXDV_CMD_RDSR;
 	spi_flash_wb_reg_read(dev, buf);
@@ -86,10 +86,10 @@ static inline void wait_for_flash_idle(struct device *dev)
 	}
 }
 
-static int spi_flash_wb_reg_write(struct device *dev, uint8_t *data)
+static int spi_flash_wb_reg_write(struct device *dev, u8_t *data)
 {
 	struct spi_flash_data *const driver_data = dev->driver_data;
-	uint8_t buf;
+	u8_t buf;
 
 	wait_for_flash_idle(dev);
 
@@ -105,7 +105,7 @@ static int spi_flash_wb_read(struct device *dev, off_t offset, void *data,
 			     size_t len)
 {
 	struct spi_flash_data *const driver_data = dev->driver_data;
-	uint8_t *buf = driver_data->buf;
+	u8_t *buf = driver_data->buf;
 
 	if (len > CONFIG_SPI_FLASH_W25QXXDV_MAX_DATA_LEN || offset < 0) {
 		return -ENODEV;
@@ -121,9 +121,9 @@ static int spi_flash_wb_read(struct device *dev, off_t offset, void *data,
 	wait_for_flash_idle(dev);
 
 	buf[0] = W25QXXDV_CMD_READ;
-	buf[1] = (uint8_t) (offset >> 16);
-	buf[2] = (uint8_t) (offset >> 8);
-	buf[3] = (uint8_t) offset;
+	buf[1] = (u8_t) (offset >> 16);
+	buf[2] = (u8_t) (offset >> 8);
+	buf[3] = (u8_t) offset;
 
 	memset(buf + W25QXXDV_LEN_CMD_ADDRESS, 0, len);
 
@@ -144,7 +144,7 @@ static int spi_flash_wb_write(struct device *dev, off_t offset,
 			      const void *data, size_t len)
 {
 	struct spi_flash_data *const driver_data = dev->driver_data;
-	uint8_t *buf = driver_data->buf;
+	u8_t *buf = driver_data->buf;
 
 	if (len > CONFIG_SPI_FLASH_W25QXXDV_MAX_DATA_LEN || offset < 0) {
 		return -ENOTSUP;
@@ -170,9 +170,9 @@ static int spi_flash_wb_write(struct device *dev, off_t offset,
 	wait_for_flash_idle(dev);
 
 	buf[0] = W25QXXDV_CMD_PP;
-	buf[1] = (uint8_t) (offset >> 16);
-	buf[2] = (uint8_t) (offset >> 8);
-	buf[3] = (uint8_t) offset;
+	buf[1] = (u8_t) (offset >> 16);
+	buf[2] = (u8_t) (offset >> 8);
+	buf[3] = (u8_t) offset;
 
 	memcpy(buf + W25QXXDV_LEN_CMD_ADDRESS, data, len);
 
@@ -193,7 +193,7 @@ static int spi_flash_wb_write(struct device *dev, off_t offset,
 static int spi_flash_wb_write_protection_set(struct device *dev, bool enable)
 {
 	struct spi_flash_data *const driver_data = dev->driver_data;
-	uint8_t buf = 0;
+	u8_t buf = 0;
 
 	k_sem_take(&driver_data->sem, K_FOREVER);
 
@@ -224,9 +224,9 @@ static inline int spi_flash_wb_erase_internal(struct device *dev,
 					      off_t offset, size_t size)
 {
 	struct spi_flash_data *const driver_data = dev->driver_data;
-	uint8_t buf[W25QXXDV_LEN_CMD_ADDRESS];
-	uint8_t erase_opcode;
-	uint32_t len;
+	u8_t buf[W25QXXDV_LEN_CMD_ADDRESS];
+	u8_t erase_opcode;
+	u32_t len;
 
 	if (offset < 0) {
 		return -ENOTSUP;
@@ -263,9 +263,9 @@ static inline int spi_flash_wb_erase_internal(struct device *dev,
 	}
 
 	buf[0] = erase_opcode;
-	buf[1] = (uint8_t) (offset >> 16);
-	buf[2] = (uint8_t) (offset >> 8);
-	buf[3] = (uint8_t) offset;
+	buf[1] = (u8_t) (offset >> 16);
+	buf[2] = (u8_t) (offset >> 8);
+	buf[3] = (u8_t) offset;
 
 	/* Assume write protection has been disabled. Note that w25qxxdv
 	 * flash automatically turns on write protection at the completion
@@ -277,10 +277,10 @@ static inline int spi_flash_wb_erase_internal(struct device *dev,
 static int spi_flash_wb_erase(struct device *dev, off_t offset, size_t size)
 {
 	struct spi_flash_data *const driver_data = dev->driver_data;
-	uint8_t *buf = driver_data->buf;
+	u8_t *buf = driver_data->buf;
 	int ret = 0;
-	uint32_t new_offset = offset;
-	uint32_t size_remaining = size;
+	u32_t new_offset = offset;
+	u32_t size_remaining = size;
 
 	if ((offset < 0) || ((offset & W25QXXDV_SECTOR_MASK) != 0) ||
 	    ((size + offset) > CONFIG_SPI_FLASH_W25QXXDV_FLASH_SIZE) ||
diff --git a/drivers/flash/spi_flash_w25qxxdv.h b/drivers/flash/spi_flash_w25qxxdv.h
index d005a812d08..c7589ba05da 100644
--- a/drivers/flash/spi_flash_w25qxxdv.h
+++ b/drivers/flash/spi_flash_w25qxxdv.h
@@ -16,7 +16,7 @@
 
 struct spi_flash_data {
 	struct device *spi;
-	uint8_t buf[CONFIG_SPI_FLASH_W25QXXDV_MAX_DATA_LEN +
+	u8_t buf[CONFIG_SPI_FLASH_W25QXXDV_MAX_DATA_LEN +
 		    W25QXXDV_LEN_CMD_ADDRESS];
 	struct k_sem sem;
 };
diff --git a/drivers/gpio/gpio_atmel_sam3.c b/drivers/gpio/gpio_atmel_sam3.c
index a436b884309..73d0256bf73 100644
--- a/drivers/gpio/gpio_atmel_sam3.c
+++ b/drivers/gpio/gpio_atmel_sam3.c
@@ -34,7 +34,7 @@ struct gpio_sam3_runtime {
 	sys_slist_t		cb;
 };
 
-static void _config(struct device *dev, uint32_t mask, int flags)
+static void _config(struct device *dev, u32_t mask, int flags)
 {
 	const struct gpio_sam3_config *cfg = dev->config->config_info;
 
@@ -107,7 +107,7 @@ static void _config(struct device *dev, uint32_t mask, int flags)
  * @return 0 if successful, failed otherwise
  */
 static int gpio_sam3_config(struct device *dev, int access_op,
-			    uint32_t pin, int flags)
+			    u32_t pin, int flags)
 {
 	switch (access_op) {
 	case GPIO_ACCESS_BY_PIN:
@@ -134,7 +134,7 @@ static int gpio_sam3_config(struct device *dev, int access_op,
  * @return 0 if successful, failed otherwise
  */
 static int gpio_sam3_write(struct device *dev, int access_op,
-			   uint32_t pin, uint32_t value)
+			   u32_t pin, u32_t value)
 {
 	const struct gpio_sam3_config *cfg = dev->config->config_info;
 
@@ -175,7 +175,7 @@ static int gpio_sam3_write(struct device *dev, int access_op,
  * @return 0 if successful, failed otherwise
  */
 static int gpio_sam3_read(struct device *dev, int access_op,
-				       uint32_t pin, uint32_t *value)
+				       u32_t pin, u32_t *value)
 {
 	const struct gpio_sam3_config *cfg = dev->config->config_info;
 
@@ -199,7 +199,7 @@ static void gpio_sam3_isr(void *arg)
 	struct device *dev = (struct device *)arg;
 	const struct gpio_sam3_config *cfg = dev->config->config_info;
 	struct gpio_sam3_runtime *context = dev->driver_data;
-	uint32_t int_stat;
+	u32_t int_stat;
 
 	int_stat = cfg->port->isr;
 
@@ -218,10 +218,10 @@ static int gpio_sam3_manage_callback(struct device *dev,
 }
 
 static int gpio_sam3_enable_callback(struct device *dev,
-				     int access_op, uint32_t pin)
+				     int access_op, u32_t pin)
 {
 	const struct gpio_sam3_config *cfg = dev->config->config_info;
-	uint32_t mask;
+	u32_t mask;
 
 	switch (access_op) {
 	case GPIO_ACCESS_BY_PIN:
@@ -240,10 +240,10 @@ static int gpio_sam3_enable_callback(struct device *dev,
 }
 
 static int gpio_sam3_disable_callback(struct device *dev,
-				      int access_op, uint32_t pin)
+				      int access_op, u32_t pin)
 {
 	const struct gpio_sam3_config *cfg = dev->config->config_info;
-	uint32_t mask;
+	u32_t mask;
 
 	switch (access_op) {
 	case GPIO_ACCESS_BY_PIN:
diff --git a/drivers/gpio/gpio_cc32xx.c b/drivers/gpio/gpio_cc32xx.c
index 7687e82b24d..51fb910bcdd 100644
--- a/drivers/gpio/gpio_cc32xx.c
+++ b/drivers/gpio/gpio_cc32xx.c
@@ -42,7 +42,7 @@ struct gpio_cc32xx_data {
 	/* list of registered callbacks */
 	sys_slist_t callbacks;
 	/* callback enable pin bitmask */
-	uint32_t pin_callback_enables;
+	u32_t pin_callback_enables;
 };
 
 #define DEV_CFG(dev) \
@@ -51,7 +51,7 @@ struct gpio_cc32xx_data {
 	((struct gpio_cc32xx_data *)(dev)->driver_data)
 
 static inline int gpio_cc32xx_config(struct device *port,
-				   int access_op, uint32_t pin, int flags)
+				   int access_op, u32_t pin, int flags)
 {
 	const struct gpio_cc32xx_config *gpio_config = DEV_CFG(port);
 	unsigned long port_base = gpio_config->port_base;
@@ -92,7 +92,7 @@ static inline int gpio_cc32xx_config(struct device *port,
 }
 
 static inline int gpio_cc32xx_write(struct device *port,
-				    int access_op, uint32_t pin, uint32_t value)
+				    int access_op, u32_t pin, u32_t value)
 {
 	const struct gpio_cc32xx_config *gpio_config = DEV_CFG(port);
 	unsigned long port_base = gpio_config->port_base;
@@ -111,7 +111,7 @@ static inline int gpio_cc32xx_write(struct device *port,
 }
 
 static inline int gpio_cc32xx_read(struct device *port,
-				   int access_op, uint32_t pin, uint32_t *value)
+				   int access_op, u32_t pin, u32_t *value)
 {
 	const struct gpio_cc32xx_config *gpio_config = DEV_CFG(port);
 	unsigned long port_base = gpio_config->port_base;
@@ -142,7 +142,7 @@ static int gpio_cc32xx_manage_callback(struct device *dev,
 
 
 static int gpio_cc32xx_enable_callback(struct device *dev,
-				    int access_op, uint32_t pin)
+				    int access_op, u32_t pin)
 {
 	struct gpio_cc32xx_data *data = DEV_DATA(dev);
 
@@ -157,7 +157,7 @@ static int gpio_cc32xx_enable_callback(struct device *dev,
 
 
 static int gpio_cc32xx_disable_callback(struct device *dev,
-				     int access_op, uint32_t pin)
+				     int access_op, u32_t pin)
 {
 	struct gpio_cc32xx_data *data = DEV_DATA(dev);
 
@@ -175,10 +175,10 @@ static void gpio_cc32xx_port_isr(void *arg)
 	struct device *dev = arg;
 	const struct gpio_cc32xx_config *config = DEV_CFG(dev);
 	struct gpio_cc32xx_data *data = DEV_DATA(dev);
-	uint32_t enabled_int, int_status;
+	u32_t enabled_int, int_status;
 
 	/* See which interrupts triggered: */
-	int_status  = (uint32_t)MAP_GPIOIntStatus(config->port_base, 1);
+	int_status  = (u32_t)MAP_GPIOIntStatus(config->port_base, 1);
 
 	enabled_int = int_status & data->pin_callback_enables;
 
diff --git a/drivers/gpio/gpio_cmsdk_ahb.c b/drivers/gpio/gpio_cmsdk_ahb.c
index 8f890028788..dbb31fddbb6 100644
--- a/drivers/gpio/gpio_cmsdk_ahb.c
+++ b/drivers/gpio/gpio_cmsdk_ahb.c
@@ -38,7 +38,7 @@ struct gpio_cmsdk_ahb_dev_data {
 	sys_slist_t gpio_cb;
 };
 
-static void cmsdk_ahb_gpio_config(struct device *dev, uint32_t mask, int flags)
+static void cmsdk_ahb_gpio_config(struct device *dev, u32_t mask, int flags)
 {
 	const struct gpio_cmsdk_ahb_cfg * const cfg = dev->config->config_info;
 
@@ -105,7 +105,7 @@ static void cmsdk_ahb_gpio_config(struct device *dev, uint32_t mask, int flags)
  * @return 0 if successful, failed otherwise
  */
 static int gpio_cmsdk_ahb_config(struct device *dev, int access_op,
-				 uint32_t pin, int flags)
+				 u32_t pin, int flags)
 {
 	switch (access_op) {
 	case GPIO_ACCESS_BY_PIN:
@@ -132,10 +132,10 @@ static int gpio_cmsdk_ahb_config(struct device *dev, int access_op,
  * @return 0 if successful, failed otherwise
  */
 static int gpio_cmsdk_ahb_write(struct device *dev, int access_op,
-				uint32_t pin, uint32_t value)
+				u32_t pin, u32_t value)
 {
 	const struct gpio_cmsdk_ahb_cfg * const cfg = dev->config->config_info;
-	uint32_t key;
+	u32_t key;
 
 	switch (access_op) {
 	case GPIO_ACCESS_BY_PIN:
@@ -186,7 +186,7 @@ static int gpio_cmsdk_ahb_write(struct device *dev, int access_op,
  * @return 0 if successful, failed otherwise
  */
 static int gpio_cmsdk_ahb_read(struct device *dev, int access_op,
-			       uint32_t pin, uint32_t *value)
+			       u32_t pin, u32_t *value)
 {
 	const struct gpio_cmsdk_ahb_cfg * const cfg = dev->config->config_info;
 
@@ -210,7 +210,7 @@ static void gpio_cmsdk_ahb_isr(void *arg)
 	struct device *dev = (struct device *)arg;
 	const struct gpio_cmsdk_ahb_cfg * const cfg = dev->config->config_info;
 	struct gpio_cmsdk_ahb_dev_data *data = dev->driver_data;
-	uint32_t int_stat;
+	u32_t int_stat;
 
 	int_stat = cfg->port->intstatus;
 
@@ -232,10 +232,10 @@ static int gpio_cmsdk_ahb_manage_callback(struct device *dev,
 }
 
 static int gpio_cmsdk_ahb_enable_callback(struct device *dev,
-					  int access_op, uint32_t pin)
+					  int access_op, u32_t pin)
 {
 	const struct gpio_cmsdk_ahb_cfg * const cfg = dev->config->config_info;
-	uint32_t mask;
+	u32_t mask;
 
 	switch (access_op) {
 	case GPIO_ACCESS_BY_PIN:
@@ -254,10 +254,10 @@ static int gpio_cmsdk_ahb_enable_callback(struct device *dev,
 }
 
 static int gpio_cmsdk_ahb_disable_callback(struct device *dev,
-					   int access_op, uint32_t pin)
+					   int access_op, u32_t pin)
 {
 	const struct gpio_cmsdk_ahb_cfg * const cfg = dev->config->config_info;
-	uint32_t mask;
+	u32_t mask;
 
 	switch (access_op) {
 	case GPIO_ACCESS_BY_PIN:
diff --git a/drivers/gpio/gpio_cmsdk_ahb.h b/drivers/gpio/gpio_cmsdk_ahb.h
index 4aa35948bc6..be0fb1fa874 100644
--- a/drivers/gpio/gpio_cmsdk_ahb.h
+++ b/drivers/gpio/gpio_cmsdk_ahb.h
@@ -15,41 +15,41 @@ extern "C" {
 /* ARM LTD CMSDK AHB General Purpose Input/Output (GPIO) */
 struct gpio_cmsdk_ahb {
 	/* Offset: 0x000 (r/w) data register */
-	volatile uint32_t data;
+	volatile u32_t data;
 	/* Offset: 0x004 (r/w) data output latch register */
-	volatile uint32_t dataout;
-	volatile uint32_t reserved0[2];
+	volatile u32_t dataout;
+	volatile u32_t reserved0[2];
 	/* Offset: 0x010 (r/w) output enable set register */
-	volatile uint32_t outenableset;
+	volatile u32_t outenableset;
 	/* Offset: 0x014 (r/w) output enable clear register */
-	volatile uint32_t outenableclr;
+	volatile u32_t outenableclr;
 	/* Offset: 0x018 (r/w) alternate function set register */
-	volatile uint32_t altfuncset;
+	volatile u32_t altfuncset;
 	/* Offset: 0x01c (r/w) alternate function clear register */
-	volatile uint32_t altfuncclr;
+	volatile u32_t altfuncclr;
 	/* Offset: 0x020 (r/w) interrupt enable set register */
-	volatile uint32_t intenset;
+	volatile u32_t intenset;
 	/* Offset: 0x024 (r/w) interrupt enable clear register */
-	volatile uint32_t intenclr;
+	volatile u32_t intenclr;
 	/* Offset: 0x028 (r/w) interrupt type set register */
-	volatile uint32_t inttypeset;
+	volatile u32_t inttypeset;
 	/* Offset: 0x02c (r/w) interrupt type clear register */
-	volatile uint32_t inttypeclr;
+	volatile u32_t inttypeclr;
 	/* Offset: 0x030 (r/w) interrupt polarity set register */
-	volatile uint32_t intpolset;
+	volatile u32_t intpolset;
 	/* Offset: 0x034 (r/w) interrupt polarity clear register */
-	volatile uint32_t intpolclr;
+	volatile u32_t intpolclr;
 	union {
 		/* Offset: 0x038 (r/ ) interrupt status register */
-		volatile uint32_t intstatus;
+		volatile u32_t intstatus;
 		/* Offset: 0x038 ( /w) interrupt clear register */
-		volatile uint32_t  intclear;
+		volatile u32_t  intclear;
 	};
-	volatile uint32_t reserved1[241];
+	volatile u32_t reserved1[241];
 	/* Offset: 0x400 - 0x7fc lower byte masked access register (r/w) */
-	volatile uint32_t lb_masked[256];
+	volatile u32_t lb_masked[256];
 	/* Offset: 0x800 - 0xbfc upper byte masked access register (r/w) */
-	volatile uint32_t ub_masked[256];
+	volatile u32_t ub_masked[256];
 };
 
 #ifdef __cplusplus
diff --git a/drivers/gpio/gpio_dw.c b/drivers/gpio/gpio_dw.c
index 739cee37a57..aed35eda5ba 100644
--- a/drivers/gpio/gpio_dw.c
+++ b/drivers/gpio/gpio_dw.c
@@ -35,19 +35,19 @@
  * Other architectures as ARM and x86 configure IP through MMIO registers
  */
 #ifdef GPIO_DW_IO_ACCESS
-static inline uint32_t dw_read(uint32_t base_addr, uint32_t offset)
+static inline u32_t dw_read(u32_t base_addr, u32_t offset)
 {
 	return sys_in32(base_addr + offset);
 }
 
-static inline void dw_write(uint32_t base_addr, uint32_t offset,
-			    uint32_t val)
+static inline void dw_write(u32_t base_addr, u32_t offset,
+			    u32_t val)
 {
 	sys_out32(val, base_addr + offset);
 }
 
-static void dw_set_bit(uint32_t base_addr, uint32_t offset,
-		       uint32_t bit, uint8_t value)
+static void dw_set_bit(u32_t base_addr, u32_t offset,
+		       u32_t bit, u8_t value)
 {
 	if (!value) {
 		sys_io_clear_bit(base_addr + offset, bit);
@@ -56,19 +56,19 @@ static void dw_set_bit(uint32_t base_addr, uint32_t offset,
 	}
 }
 #else
-static inline uint32_t dw_read(uint32_t base_addr, uint32_t offset)
+static inline u32_t dw_read(u32_t base_addr, u32_t offset)
 {
 	return sys_read32(base_addr + offset);
 }
 
-static inline void dw_write(uint32_t base_addr, uint32_t offset,
-			    uint32_t val)
+static inline void dw_write(u32_t base_addr, u32_t offset,
+			    u32_t val)
 {
 	sys_write32(val, base_addr + offset);
 }
 
-static void dw_set_bit(uint32_t base_addr, uint32_t offset,
-		       uint32_t bit, uint8_t value)
+static void dw_set_bit(u32_t base_addr, u32_t offset,
+		       u32_t bit, u8_t value)
 {
 	if (!value) {
 		sys_clear_bit(base_addr + offset, bit);
@@ -114,12 +114,12 @@ static inline void _gpio_dw_clock_off(struct device *port)
 #endif
 
 #ifdef CONFIG_SOC_QUARK_SE_C1000_SS
-static inline void dw_set_both_edges(uint32_t base_addr, uint32_t pin)
+static inline void dw_set_both_edges(u32_t base_addr, u32_t pin)
 {
 	ARG_UNUSED(base_addr);
 	ARG_UNUSED(pin);
 }
-static inline int dw_base_to_block_base(uint32_t base_addr)
+static inline int dw_base_to_block_base(u32_t base_addr)
 {
 	return base_addr;
 }
@@ -129,17 +129,17 @@ static inline int dw_interrupt_support(const struct gpio_dw_config *config)
 	return 1;
 }
 #else
-static inline void dw_set_both_edges(uint32_t base_addr, uint32_t pin)
+static inline void dw_set_both_edges(u32_t base_addr, u32_t pin)
 {
 	dw_set_bit(base_addr, INT_BOTHEDGE, pin, 1);
 }
-static inline int dw_base_to_block_base(uint32_t base_addr)
+static inline int dw_base_to_block_base(u32_t base_addr)
 {
 	return (base_addr & 0xFFFFFFC0);
 }
-static inline int dw_derive_port_from_base(uint32_t base_addr)
+static inline int dw_derive_port_from_base(u32_t base_addr)
 {
-	uint32_t port = (base_addr & 0x3f) / 12;
+	u32_t port = (base_addr & 0x3f) / 12;
 	return port;
 }
 static inline int dw_interrupt_support(const struct gpio_dw_config *config)
@@ -149,12 +149,12 @@ static inline int dw_interrupt_support(const struct gpio_dw_config *config)
 #endif
 
 static inline void dw_interrupt_config(struct device *port, int access_op,
-				       uint32_t pin, int flags)
+				       u32_t pin, int flags)
 {
 	struct gpio_dw_runtime *context = port->driver_data;
 	const struct gpio_dw_config *config = port->config->config_info;
-	uint32_t base_addr = dw_base_to_block_base(context->base_addr);
-	uint8_t flag_is_set;
+	u32_t base_addr = dw_base_to_block_base(context->base_addr);
+	u8_t flag_is_set;
 
 	ARG_UNUSED(access_op);
 
@@ -188,12 +188,12 @@ static inline void dw_interrupt_config(struct device *port, int access_op,
 }
 
 static inline void dw_pin_config(struct device *port,
-				 uint32_t pin, int flags)
+				 u32_t pin, int flags)
 {
 	struct gpio_dw_runtime *context = port->driver_data;
 	const struct gpio_dw_config *config = port->config->config_info;
-	uint32_t base_addr = dw_base_to_block_base(context->base_addr);
-	uint32_t port_base_addr = context->base_addr;
+	u32_t base_addr = dw_base_to_block_base(context->base_addr);
+	u32_t port_base_addr = context->base_addr;
 	int interrupt_support = dw_interrupt_support(config);
 
 	if (interrupt_support) {
@@ -220,7 +220,7 @@ static inline void dw_port_config(struct device *port, int flags)
 }
 
 static inline int gpio_dw_config(struct device *port, int access_op,
-				 uint32_t pin, int flags)
+				 u32_t pin, int flags)
 {
 	if ((flags & GPIO_INT) && (flags & GPIO_DIR_OUT)) {
 		return -EINVAL;
@@ -235,10 +235,10 @@ static inline int gpio_dw_config(struct device *port, int access_op,
 }
 
 static inline int gpio_dw_write(struct device *port, int access_op,
-				uint32_t pin, uint32_t value)
+				u32_t pin, u32_t value)
 {
 	struct gpio_dw_runtime *context = port->driver_data;
-	uint32_t base_addr = context->base_addr;
+	u32_t base_addr = context->base_addr;
 
 	if (GPIO_ACCESS_BY_PIN == access_op) {
 		dw_set_bit(base_addr, SWPORTA_DR, pin, value);
@@ -250,12 +250,12 @@ static inline int gpio_dw_write(struct device *port, int access_op,
 }
 
 static inline int gpio_dw_read(struct device *port, int access_op,
-			       uint32_t pin, uint32_t *value)
+			       u32_t pin, u32_t *value)
 {
 	struct gpio_dw_runtime *context = port->driver_data;
-	uint32_t base_addr = context->base_addr;
+	u32_t base_addr = context->base_addr;
 #ifndef CONFIG_SOC_QUARK_SE_C1000_SS
-	uint32_t ext_port = EXT_PORTA;
+	u32_t ext_port = EXT_PORTA;
 #endif
 
 #ifdef CONFIG_SOC_QUARK_SE_C1000_SS
@@ -297,11 +297,11 @@ static inline int gpio_dw_manage_callback(struct device *port,
 }
 
 static inline int gpio_dw_enable_callback(struct device *port, int access_op,
-					  uint32_t pin)
+					  u32_t pin)
 {
 	const struct gpio_dw_config *config = port->config->config_info;
 	struct gpio_dw_runtime *context = port->driver_data;
-	uint32_t base_addr = dw_base_to_block_base(context->base_addr);
+	u32_t base_addr = dw_base_to_block_base(context->base_addr);
 
 	if (GPIO_ACCESS_BY_PIN == access_op) {
 		dw_write(base_addr, PORTA_EOI, BIT(pin));
@@ -315,11 +315,11 @@ static inline int gpio_dw_enable_callback(struct device *port, int access_op,
 }
 
 static inline int gpio_dw_disable_callback(struct device *port, int access_op,
-					   uint32_t pin)
+					   u32_t pin)
 {
 	const struct gpio_dw_config *config = port->config->config_info;
 	struct gpio_dw_runtime *context = port->driver_data;
-	uint32_t base_addr = dw_base_to_block_base(context->base_addr);
+	u32_t base_addr = dw_base_to_block_base(context->base_addr);
 
 	if (GPIO_ACCESS_BY_PIN == access_op) {
 		dw_set_bit(base_addr, INTMASK, pin, 1);
@@ -331,14 +331,14 @@ static inline int gpio_dw_disable_callback(struct device *port, int access_op,
 }
 
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
-static void gpio_dw_set_power_state(struct device *port, uint32_t power_state)
+static void gpio_dw_set_power_state(struct device *port, u32_t power_state)
 {
 	struct gpio_dw_runtime *context = port->driver_data;
 
 	context->device_power_state = power_state;
 }
 
-static uint32_t gpio_dw_get_power_state(struct device *port)
+static u32_t gpio_dw_get_power_state(struct device *port)
 {
 	struct gpio_dw_runtime *context = port->driver_data;
 
@@ -364,17 +364,17 @@ static inline int gpio_dw_resume_from_suspend_port(struct device *port)
 * Implements the driver control management functionality
 * the *context may include IN data or/and OUT data
 */
-static int gpio_dw_device_ctrl(struct device *port, uint32_t ctrl_command,
+static int gpio_dw_device_ctrl(struct device *port, u32_t ctrl_command,
 							void *context)
 {
 	if (ctrl_command == DEVICE_PM_SET_POWER_STATE) {
-		if (*((uint32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
+		if (*((u32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
 			return gpio_dw_suspend_port(port);
-		} else if (*((uint32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
+		} else if (*((u32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
 			return gpio_dw_resume_from_suspend_port(port);
 		}
 	} else if (ctrl_command == DEVICE_PM_GET_POWER_STATE) {
-		*((uint32_t *)context) = gpio_dw_get_power_state(port);
+		*((u32_t *)context) = gpio_dw_get_power_state(port);
 		return 0;
 	}
 	return 0;
@@ -385,12 +385,12 @@ static int gpio_dw_device_ctrl(struct device *port, uint32_t ctrl_command,
 #endif
 
 #if defined(CONFIG_SOC_QUARK_SE_C1000) || defined(CONFIG_SOC_QUARK_D2000)
-static inline void gpio_dw_unmask_int(uint32_t mask_addr)
+static inline void gpio_dw_unmask_int(u32_t mask_addr)
 {
 	sys_write32(sys_read32(mask_addr) & INT_UNMASK_IA, mask_addr);
 }
 #elif CONFIG_SOC_QUARK_SE_C1000_SS
-static inline void gpio_dw_unmask_int(uint32_t mask_addr)
+static inline void gpio_dw_unmask_int(u32_t mask_addr)
 {
 	sys_write32(sys_read32(mask_addr) & INT_ENABLE_ARC, mask_addr);
 }
@@ -402,8 +402,8 @@ static void gpio_dw_isr(void *arg)
 {
 	struct device *port = (struct device *)arg;
 	struct gpio_dw_runtime *context = port->driver_data;
-	uint32_t base_addr = dw_base_to_block_base(context->base_addr);
-	uint32_t int_status;
+	u32_t base_addr = dw_base_to_block_base(context->base_addr);
+	u32_t int_status;
 
 	int_status = dw_read(base_addr, INTSTATUS);
 
@@ -460,7 +460,7 @@ static int gpio_dw_initialize(struct device *port)
 {
 	struct gpio_dw_runtime *context = port->driver_data;
 	const struct gpio_dw_config *config = port->config->config_info;
-	uint32_t base_addr;
+	u32_t base_addr;
 
 	if (!gpio_dw_setup(port)) {
 		port->driver_api = NULL;
diff --git a/drivers/gpio/gpio_dw.h b/drivers/gpio/gpio_dw.h
index fecc7905f95..51c004bd49f 100644
--- a/drivers/gpio/gpio_dw.h
+++ b/drivers/gpio/gpio_dw.h
@@ -23,8 +23,8 @@ extern "C" {
 typedef void (*gpio_config_irq_t)(struct device *port);
 
 struct gpio_dw_config {
-	uint32_t bits;
-	uint32_t irq_num; /* set to 0 if GPIO port cannot interrupt */
+	u32_t bits;
+	u32_t irq_num; /* set to 0 if GPIO port cannot interrupt */
 	gpio_config_irq_t config_func;
 
 #ifdef CONFIG_GPIO_DW_SHARED_IRQ
@@ -37,7 +37,7 @@ struct gpio_dw_config {
 };
 
 struct gpio_dw_runtime {
-	uint32_t base_addr;
+	u32_t base_addr;
 #ifdef CONFIG_PCI
 	struct pci_dev_info  pci_dev;
 #endif /* CONFIG_PCI */
@@ -47,7 +47,7 @@ struct gpio_dw_runtime {
 #endif
 	sys_slist_t callbacks;
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
-	uint32_t device_power_state;
+	u32_t device_power_state;
 #endif
 };
 
diff --git a/drivers/gpio/gpio_fe310.c b/drivers/gpio/gpio_fe310.c
index 78cb40c2bd0..4dbbb503a90 100644
--- a/drivers/gpio/gpio_fe310.c
+++ b/drivers/gpio/gpio_fe310.c
@@ -41,8 +41,8 @@ struct gpio_fe310_t {
 };
 
 struct gpio_fe310_config {
-	uint32_t            gpio_base_addr;
-	uint32_t            gpio_irq_base;
+	u32_t            gpio_base_addr;
+	u32_t            gpio_irq_base;
 	fe310_cfg_func_t    gpio_cfg_func;
 };
 
@@ -101,7 +101,7 @@ static void gpio_fe310_irq_handler(void *arg)
  */
 static int gpio_fe310_config(struct device *dev,
 			     int access_op,
-			     uint32_t pin,
+			     u32_t pin,
 			     int flags)
 {
 	volatile struct gpio_fe310_t *gpio = DEV_GPIO(dev);
@@ -209,8 +209,8 @@ static int gpio_fe310_config(struct device *dev,
  */
 static int gpio_fe310_write(struct device *dev,
 			    int access_op,
-			    uint32_t pin,
-			    uint32_t value)
+			    u32_t pin,
+			    u32_t value)
 {
 	volatile struct gpio_fe310_t *gpio = DEV_GPIO(dev);
 
@@ -244,8 +244,8 @@ static int gpio_fe310_write(struct device *dev,
  */
 static int gpio_fe310_read(struct device *dev,
 			   int access_op,
-			   uint32_t pin,
-			   uint32_t *value)
+			   u32_t pin,
+			   u32_t *value)
 {
 	volatile struct gpio_fe310_t *gpio = DEV_GPIO(dev);
 
@@ -281,7 +281,7 @@ static int gpio_fe310_manage_callback(struct device *dev,
 
 static int gpio_fe310_enable_callback(struct device *dev,
 				      int access_op,
-				      uint32_t pin)
+				      u32_t pin)
 {
 	const struct gpio_fe310_config *cfg = DEV_GPIO_CFG(dev);
 
@@ -299,7 +299,7 @@ static int gpio_fe310_enable_callback(struct device *dev,
 
 static int gpio_fe310_disable_callback(struct device *dev,
 				       int access_op,
-				       uint32_t pin)
+				       u32_t pin)
 {
 	const struct gpio_fe310_config *cfg = DEV_GPIO_CFG(dev);
 
diff --git a/drivers/gpio/gpio_mcux.c b/drivers/gpio/gpio_mcux.c
index 62a512c44e2..ebd54dd97a8 100644
--- a/drivers/gpio/gpio_mcux.c
+++ b/drivers/gpio/gpio_mcux.c
@@ -24,19 +24,19 @@ struct gpio_mcux_data {
 	/* port ISR callback routine address */
 	sys_slist_t callbacks;
 	/* pin callback routine enable flags, by pin number */
-	uint32_t pin_callback_enables;
+	u32_t pin_callback_enables;
 };
 
 static int gpio_mcux_configure(struct device *dev,
-			       int access_op, uint32_t pin, int flags)
+			       int access_op, u32_t pin, int flags)
 {
 	const struct gpio_mcux_config *config = dev->config->config_info;
 	GPIO_Type *gpio_base = config->gpio_base;
 	PORT_Type *port_base = config->port_base;
 	port_interrupt_t port_interrupt = 0;
-	uint32_t mask = 0;
-	uint32_t pcr = 0;
-	uint8_t i;
+	u32_t mask = 0;
+	u32_t pcr = 0;
+	u8_t i;
 
 	/* Check for an invalid pin configuration */
 	if ((flags & GPIO_INT) && (flags & GPIO_DIR_OUT)) {
@@ -125,7 +125,7 @@ static int gpio_mcux_configure(struct device *dev,
 }
 
 static int gpio_mcux_write(struct device *dev,
-			   int access_op, uint32_t pin, uint32_t value)
+			   int access_op, u32_t pin, u32_t value)
 {
 	const struct gpio_mcux_config *config = dev->config->config_info;
 	GPIO_Type *gpio_base = config->gpio_base;
@@ -153,7 +153,7 @@ static int gpio_mcux_write(struct device *dev,
 }
 
 static int gpio_mcux_read(struct device *dev,
-			  int access_op, uint32_t pin, uint32_t *value)
+			  int access_op, u32_t pin, u32_t *value)
 {
 	const struct gpio_mcux_config *config = dev->config->config_info;
 	GPIO_Type *gpio_base = config->gpio_base;
@@ -180,7 +180,7 @@ static int gpio_mcux_manage_callback(struct device *dev,
 }
 
 static int gpio_mcux_enable_callback(struct device *dev,
-				     int access_op, uint32_t pin)
+				     int access_op, u32_t pin)
 {
 	struct gpio_mcux_data *data = dev->driver_data;
 
@@ -194,7 +194,7 @@ static int gpio_mcux_enable_callback(struct device *dev,
 }
 
 static int gpio_mcux_disable_callback(struct device *dev,
-				      int access_op, uint32_t pin)
+				      int access_op, u32_t pin)
 {
 	struct gpio_mcux_data *data = dev->driver_data;
 
@@ -212,7 +212,7 @@ static void gpio_mcux_port_isr(void *arg)
 	struct device *dev = (struct device *)arg;
 	const struct gpio_mcux_config *config = dev->config->config_info;
 	struct gpio_mcux_data *data = dev->driver_data;
-	uint32_t enabled_int, int_status;
+	u32_t enabled_int, int_status;
 
 	int_status = config->port_base->ISFR;
 	enabled_int = int_status & data->pin_callback_enables;
diff --git a/drivers/gpio/gpio_mmio32.c b/drivers/gpio/gpio_mmio32.c
index d706c2c55f9..1170bd78eff 100644
--- a/drivers/gpio/gpio_mmio32.c
+++ b/drivers/gpio/gpio_mmio32.c
@@ -30,7 +30,7 @@
 #include <errno.h>
 
 static int gpio_mmio32_config(struct device *dev, int access_op,
-					uint32_t pin, int flags)
+					u32_t pin, int flags)
 {
 	struct gpio_mmio32_context *context = dev->driver_data;
 	const struct gpio_mmio32_config *config = context->config;
@@ -58,13 +58,13 @@ static int gpio_mmio32_config(struct device *dev, int access_op,
 }
 
 static int gpio_mmio32_write(struct device *dev, int access_op,
-					uint32_t pin, uint32_t value)
+					u32_t pin, u32_t value)
 {
 	struct gpio_mmio32_context *context = dev->driver_data;
 	const struct gpio_mmio32_config *config = context->config;
-	volatile uint32_t *reg = config->reg;
-	uint32_t mask = config->mask;
-	uint32_t invert = context->invert;
+	volatile u32_t *reg = config->reg;
+	u32_t mask = config->mask;
+	u32_t invert = context->invert;
 	unsigned int key;
 
 	if (access_op == GPIO_ACCESS_BY_PIN) {
@@ -86,11 +86,11 @@ static int gpio_mmio32_write(struct device *dev, int access_op,
 }
 
 static int gpio_mmio32_read(struct device *dev, int access_op,
-					uint32_t pin, uint32_t *value)
+					u32_t pin, u32_t *value)
 {
 	struct gpio_mmio32_context *context = dev->driver_data;
 	const struct gpio_mmio32_config *config = context->config;
-	uint32_t bits;
+	u32_t bits;
 
 	bits = (*config->reg ^ context->invert) & config->mask;
 	if (access_op == GPIO_ACCESS_BY_PIN) {
diff --git a/drivers/gpio/gpio_nrf5.c b/drivers/gpio/gpio_nrf5.c
index c1240f16c72..33b728430f4 100644
--- a/drivers/gpio/gpio_nrf5.c
+++ b/drivers/gpio/gpio_nrf5.c
@@ -30,59 +30,59 @@
 
 /* GPIO structure for nRF5X. More detailed description of each register can be found in nrf5X.h */
 struct _gpio {
-	__I  uint32_t RESERVED0[321];
-	__IO uint32_t OUT;
-	__IO uint32_t OUTSET;
-	__IO uint32_t OUTCLR;
+	__I  u32_t RESERVED0[321];
+	__IO u32_t OUT;
+	__IO u32_t OUTSET;
+	__IO u32_t OUTCLR;
 
-	__I uint32_t  IN;
-	__IO uint32_t DIR;
-	__IO uint32_t DIRSET;
-	__IO uint32_t DIRCLR;
-	__IO uint32_t LATCH;
-	__IO uint32_t DETECTMODE;
-	__I uint32_t  RESERVED1[118];
-	__IO uint32_t PIN_CNF[32];
+	__I u32_t  IN;
+	__IO u32_t DIR;
+	__IO u32_t DIRSET;
+	__IO u32_t DIRCLR;
+	__IO u32_t LATCH;
+	__IO u32_t DETECTMODE;
+	__I u32_t  RESERVED1[118];
+	__IO u32_t PIN_CNF[32];
 };
 
 /* GPIOTE structure for nRF5X. More detailed description of each register can be found in nrf5X.h */
 struct _gpiote {
-	__O uint32_t  TASKS_OUT[8];
-	__I uint32_t  RESERVED0[4];
+	__O u32_t  TASKS_OUT[8];
+	__I u32_t  RESERVED0[4];
 
-	__O uint32_t  TASKS_SET[8];
-	__I uint32_t  RESERVED1[4];
+	__O u32_t  TASKS_SET[8];
+	__I u32_t  RESERVED1[4];
 
-	__O uint32_t  TASKS_CLR[8];
-	__I uint32_t  RESERVED2[32];
-	__IO uint32_t EVENTS_IN[8];
-	__I uint32_t  RESERVED3[23];
-	__IO uint32_t EVENTS_PORT;
-	__I uint32_t  RESERVED4[97];
-	__IO uint32_t INTENSET;
-	__IO uint32_t INTENCLR;
-	__I uint32_t  RESERVED5[129];
-	__IO uint32_t CONFIG[8];
+	__O u32_t  TASKS_CLR[8];
+	__I u32_t  RESERVED2[32];
+	__IO u32_t EVENTS_IN[8];
+	__I u32_t  RESERVED3[23];
+	__IO u32_t EVENTS_PORT;
+	__I u32_t  RESERVED4[97];
+	__IO u32_t INTENSET;
+	__IO u32_t INTENCLR;
+	__I u32_t  RESERVED5[129];
+	__IO u32_t CONFIG[8];
 };
 
 /** Configuration data */
 struct gpio_nrf5_config {
 	/* GPIO module base address */
-	uint32_t gpio_base_addr;
+	u32_t gpio_base_addr;
 	/* Port Control module base address */
-	uint32_t port_base_addr;
+	u32_t port_base_addr;
 	/* GPIO Task Event base address */
-	uint32_t gpiote_base_addr;
+	u32_t gpiote_base_addr;
 };
 
 struct gpio_nrf5_data {
 	/* list of registered callbacks */
 	sys_slist_t callbacks;
 	/* pin callback routine enable flags, by pin number */
-	uint32_t pin_callback_enables;
+	u32_t pin_callback_enables;
 
 	/*@todo: move GPIOTE channel management to a separate module */
-	uint32_t gpiote_chan_mask;
+	u32_t gpiote_chan_mask;
 };
 
 /* convenience defines for GPIO */
@@ -126,7 +126,7 @@ struct gpio_nrf5_data {
 #define GPIOTE_CFG_PIN_GET(config) ((config & GPIOTE_CONFIG_PSEL_Msk) >> \
 				GPIOTE_CONFIG_PSEL_Pos)
 
-static int gpiote_find_channel(struct device *dev, uint32_t pin)
+static int gpiote_find_channel(struct device *dev, u32_t pin)
 {
 	volatile struct _gpiote *gpiote = GPIOTE_STRUCT(dev);
 	struct gpio_nrf5_data *data = DEV_GPIO_DATA(dev);
@@ -146,10 +146,10 @@ static int gpiote_find_channel(struct device *dev, uint32_t pin)
  * @brief Configure pin or port
  */
 static int gpio_nrf5_config(struct device *dev,
-			    int access_op, uint32_t pin, int flags)
+			    int access_op, u32_t pin, int flags)
 {
 	/* Note D0D1 is not supported so we switch to S0S1.  */
-	static const uint32_t drive_strength[4][4] = {
+	static const u32_t drive_strength[4][4] = {
 		{GPIO_DRIVE_S0S1, GPIO_DRIVE_S0H1, 0, GPIO_DRIVE_S0D1},
 		{GPIO_DRIVE_H0S1, GPIO_DRIVE_H0H1, 0, GPIO_DRIVE_H0D1},
 		{0, 0, 0, 0},
@@ -162,7 +162,7 @@ static int gpio_nrf5_config(struct device *dev,
 	if (access_op == GPIO_ACCESS_BY_PIN) {
 
 		/* Check pull */
-		uint8_t pull = GPIO_PULL_DISABLE;
+		u8_t pull = GPIO_PULL_DISABLE;
 		int ds_low = (flags & GPIO_DS_LOW_MASK) >> GPIO_DS_LOW_POS;
 		int ds_high = (flags & GPIO_DS_HIGH_MASK) >> GPIO_DS_HIGH_POS;
 
@@ -201,7 +201,7 @@ static int gpio_nrf5_config(struct device *dev,
 	}
 
 	if (flags & GPIO_INT) {
-		uint32_t config = 0;
+		u32_t config = 0;
 
 		if (flags & GPIO_INT_EDGE) {
 			if (flags & GPIO_INT_DOUBLE_EDGE) {
@@ -242,7 +242,7 @@ static int gpio_nrf5_config(struct device *dev,
 }
 
 static int gpio_nrf5_read(struct device *dev,
-			  int access_op, uint32_t pin, uint32_t *value)
+			  int access_op, u32_t pin, u32_t *value)
 {
 	volatile struct _gpio *gpio = GPIO_STRUCT(dev);
 
@@ -255,7 +255,7 @@ static int gpio_nrf5_read(struct device *dev,
 }
 
 static int gpio_nrf5_write(struct device *dev,
-			   int access_op, uint32_t pin, uint32_t value)
+			   int access_op, u32_t pin, u32_t value)
 {
 	volatile struct _gpio *gpio = GPIO_STRUCT(dev);
 
@@ -283,7 +283,7 @@ static int gpio_nrf5_manage_callback(struct device *dev,
 
 
 static int gpio_nrf5_enable_callback(struct device *dev,
-				    int access_op, uint32_t pin)
+				    int access_op, u32_t pin)
 {
 	volatile struct _gpiote *gpiote = GPIOTE_STRUCT(dev);
 	struct gpio_nrf5_data *data = DEV_GPIO_DATA(dev);
@@ -310,7 +310,7 @@ static int gpio_nrf5_enable_callback(struct device *dev,
 
 
 static int gpio_nrf5_disable_callback(struct device *dev,
-				     int access_op, uint32_t pin)
+				     int access_op, u32_t pin)
 {
 	volatile struct _gpiote *gpiote = GPIOTE_STRUCT(dev);
 	struct gpio_nrf5_data *data = DEV_GPIO_DATA(dev);
@@ -345,7 +345,7 @@ static void gpio_nrf5_port_isr(void *arg)
 	struct device *dev = arg;
 	volatile struct _gpiote *gpiote = GPIOTE_STRUCT(dev);
 	struct gpio_nrf5_data *data = DEV_GPIO_DATA(dev);
-	uint32_t enabled_int, int_status = 0;
+	u32_t enabled_int, int_status = 0;
 	int i;
 
 	for (i = 0; i < GPIOTE_CHAN_COUNT; i++) {
diff --git a/drivers/gpio/gpio_pcal9535a.c b/drivers/gpio/gpio_pcal9535a.c
index 19149d6fce5..676300353b1 100644
--- a/drivers/gpio/gpio_pcal9535a.c
+++ b/drivers/gpio/gpio_pcal9535a.c
@@ -75,7 +75,7 @@ static inline int _has_i2c_master(struct device *dev)
  *
  * @return 0 if successful, failed otherwise.
  */
-static int _read_port_regs(struct device *dev, uint8_t reg,
+static int _read_port_regs(struct device *dev, u8_t reg,
 			   union gpio_pcal9535a_port_data *buf)
 {
 	const struct gpio_pcal9535a_config * const config =
@@ -83,7 +83,7 @@ static int _read_port_regs(struct device *dev, uint8_t reg,
 	struct gpio_pcal9535a_drv_data * const drv_data =
 		(struct gpio_pcal9535a_drv_data * const)dev->driver_data;
 	struct device * const i2c_master = drv_data->i2c_master;
-	uint16_t i2c_addr = config->i2c_slave_addr;
+	u16_t i2c_addr = config->i2c_slave_addr;
 	int ret;
 
 	ret = i2c_burst_read(i2c_master, i2c_addr, reg, buf->byte, 2);
@@ -111,7 +111,7 @@ error:
  *
  * @return 0 if successful, failed otherwise.
  */
-static int _write_port_regs(struct device *dev, uint8_t reg,
+static int _write_port_regs(struct device *dev, u8_t reg,
 			    union gpio_pcal9535a_port_data *buf)
 {
 	const struct gpio_pcal9535a_config * const config =
@@ -119,7 +119,7 @@ static int _write_port_regs(struct device *dev, uint8_t reg,
 	struct gpio_pcal9535a_drv_data * const drv_data =
 		(struct gpio_pcal9535a_drv_data * const)dev->driver_data;
 	struct device * const i2c_master = drv_data->i2c_master;
-	uint16_t i2c_addr = config->i2c_slave_addr;
+	u16_t i2c_addr = config->i2c_slave_addr;
 	int ret;
 
 	SYS_LOG_DBG("PCAL9535A[0x%X]: Write: REG[0x%X] = 0x%X, REG[0x%X] = "
@@ -146,13 +146,13 @@ static int _write_port_regs(struct device *dev, uint8_t reg,
  * @return 0 if successful, failed otherwise
  */
 static int _setup_pin_dir(struct device *dev, int access_op,
-			  uint32_t pin, int flags)
+			  u32_t pin, int flags)
 {
 	struct gpio_pcal9535a_drv_data * const drv_data =
 		(struct gpio_pcal9535a_drv_data * const)dev->driver_data;
 	union gpio_pcal9535a_port_data *port = &drv_data->reg_cache.dir;
-	uint16_t bit_mask;
-	uint16_t new_value = 0;
+	u16_t bit_mask;
+	u16_t new_value = 0;
 	int ret;
 
 	switch (access_op) {
@@ -198,13 +198,13 @@ done:
  * @return 0 if successful, failed otherwise
  */
 static int _setup_pin_pullupdown(struct device *dev, int access_op,
-				 uint32_t pin, int flags)
+				 u32_t pin, int flags)
 {
 	struct gpio_pcal9535a_drv_data * const drv_data =
 		(struct gpio_pcal9535a_drv_data * const)dev->driver_data;
 	union gpio_pcal9535a_port_data *port;
-	uint16_t bit_mask;
-	uint16_t new_value = 0;
+	u16_t bit_mask;
+	u16_t new_value = 0;
 	int ret;
 
 	/* If disabling pull up/down, there is no need to set the selection
@@ -291,13 +291,13 @@ done:
  * @return 0 if successful, failed otherwise
  */
 static int _setup_pin_polarity(struct device *dev, int access_op,
-			       uint32_t pin, int flags)
+			       u32_t pin, int flags)
 {
 	struct gpio_pcal9535a_drv_data * const drv_data =
 		(struct gpio_pcal9535a_drv_data * const)dev->driver_data;
 	union gpio_pcal9535a_port_data *port = &drv_data->reg_cache.pol_inv;
-	uint16_t bit_mask;
-	uint16_t new_value = 0;
+	u16_t bit_mask;
+	u16_t new_value = 0;
 	int ret;
 
 	switch (access_op) {
@@ -346,14 +346,14 @@ done:
  * @return 0 if successful, failed otherwise
  */
 static int gpio_pcal9535a_config(struct device *dev, int access_op,
-				 uint32_t pin, int flags)
+				 u32_t pin, int flags)
 {
 	int ret;
 
 #if (CONFIG_SYS_LOG_GPIO_PCAL9535A_LEVEL >= SYS_LOG_LEVEL_DEBUG)
 	const struct gpio_pcal9535a_config * const config =
 		dev->config->config_info;
-	uint16_t i2c_addr = config->i2c_slave_addr;
+	u16_t i2c_addr = config->i2c_slave_addr;
 #endif
 
 	if (!_has_i2c_master(dev)) {
@@ -396,13 +396,13 @@ done:
  * @return 0 if successful, failed otherwise
  */
 static int gpio_pcal9535a_write(struct device *dev, int access_op,
-				uint32_t pin, uint32_t value)
+				u32_t pin, u32_t value)
 {
 	struct gpio_pcal9535a_drv_data * const drv_data =
 		(struct gpio_pcal9535a_drv_data * const)dev->driver_data;
 	union gpio_pcal9535a_port_data *port = &drv_data->reg_cache.output;
-	uint16_t bit_mask;
-	uint16_t new_value;
+	u16_t bit_mask;
+	u16_t new_value;
 	int ret;
 
 	if (!_has_i2c_master(dev)) {
@@ -456,7 +456,7 @@ done:
  * @return 0 if successful, failed otherwise
  */
 static int gpio_pcal9535a_read(struct device *dev, int access_op,
-			       uint32_t pin, uint32_t *value)
+			       u32_t pin, u32_t *value)
 {
 	union gpio_pcal9535a_port_data buf;
 	int ret;
@@ -498,7 +498,7 @@ static int gpio_pcal9535a_manage_callback(struct device *dev,
 }
 
 static int gpio_pcal9535a_enable_callback(struct device *dev,
-					  int access_op, uint32_t pin)
+					  int access_op, u32_t pin)
 {
 	ARG_UNUSED(dev);
 	ARG_UNUSED(access_op);
@@ -508,7 +508,7 @@ static int gpio_pcal9535a_enable_callback(struct device *dev,
 }
 
 static int gpio_pcal9535a_disable_callback(struct device *dev,
-					   int access_op, uint32_t pin)
+					   int access_op, u32_t pin)
 {
 	ARG_UNUSED(dev);
 	ARG_UNUSED(access_op);
diff --git a/drivers/gpio/gpio_pcal9535a.h b/drivers/gpio/gpio_pcal9535a.h
index 413b1e33841..30c36a0d5fd 100644
--- a/drivers/gpio/gpio_pcal9535a.h
+++ b/drivers/gpio/gpio_pcal9535a.h
@@ -26,16 +26,16 @@ struct gpio_pcal9535a_config {
 	const char * const i2c_master_dev_name;
 
 	/** The slave address of the chip */
-	uint16_t i2c_slave_addr;
+	u16_t i2c_slave_addr;
 
-	uint8_t stride[2];
+	u8_t stride[2];
 };
 
 /** Store the port 0/1 data for each register pair. */
 union gpio_pcal9535a_port_data {
-	uint16_t all;
-	uint8_t port[2];
-	uint8_t byte[2];
+	u16_t all;
+	u8_t port[2];
+	u8_t byte[2];
 };
 
 /** Runtime driver data */
@@ -47,7 +47,7 @@ struct gpio_pcal9535a_drv_data {
 	 * Specify polarity inversion of pin. This is used for ouput as
 	 * the polarity inversion registers on chip affects inputs only.
 	 */
-	uint32_t out_pol_inv;
+	u32_t out_pol_inv;
 
 	struct {
 		union gpio_pcal9535a_port_data output;
@@ -57,7 +57,7 @@ struct gpio_pcal9535a_drv_data {
 		union gpio_pcal9535a_port_data pud_sel;
 	} reg_cache;
 
-	uint8_t stride[2];
+	u8_t stride[2];
 };
 
 #ifdef __cplusplus
diff --git a/drivers/gpio/gpio_pulpino.c b/drivers/gpio/gpio_pulpino.c
index 14de053c905..3b9935aba7b 100644
--- a/drivers/gpio/gpio_pulpino.c
+++ b/drivers/gpio/gpio_pulpino.c
@@ -21,17 +21,17 @@ typedef void (*pulpino_cfg_func_t)(void);
 
 /* pulpino GPIO register-set structure */
 struct gpio_pulpino_t {
-	uint32_t paddir;
-	uint32_t padin;
-	uint32_t padout;
-	uint32_t inten;
-	uint32_t inttype0;
-	uint32_t inttype1;
-	uint32_t intstatus;
+	u32_t paddir;
+	u32_t padin;
+	u32_t padout;
+	u32_t inten;
+	u32_t inttype0;
+	u32_t inttype1;
+	u32_t intstatus;
 };
 
 struct gpio_pulpino_config {
-	uint32_t              gpio_base_addr;
+	u32_t              gpio_base_addr;
 	pulpino_cfg_func_t    gpio_cfg_func;
 };
 
@@ -69,7 +69,7 @@ static void gpio_pulpino_irq_handler(void *arg)
  */
 static int gpio_pulpino_config(struct device *dev,
 			       int access_op,
-			       uint32_t pin,
+			       u32_t pin,
 			       int flags)
 {
 	volatile struct gpio_pulpino_t *gpio = DEV_GPIO(dev);
@@ -138,8 +138,8 @@ static int gpio_pulpino_config(struct device *dev,
  */
 static int gpio_pulpino_write(struct device *dev,
 			      int access_op,
-			      uint32_t pin,
-			      uint32_t value)
+			      u32_t pin,
+			      u32_t value)
 {
 	volatile struct gpio_pulpino_t *gpio = DEV_GPIO(dev);
 
@@ -166,8 +166,8 @@ static int gpio_pulpino_write(struct device *dev,
  */
 static int gpio_pulpino_read(struct device *dev,
 			     int access_op,
-			     uint32_t pin,
-			     uint32_t *value)
+			     u32_t pin,
+			     u32_t *value)
 {
 	volatile struct gpio_pulpino_t *gpio = DEV_GPIO(dev);
 
@@ -200,7 +200,7 @@ static int gpio_pulpino_manage_callback(struct device *dev,
 
 static int gpio_pulpino_enable_callback(struct device *dev,
 					int access_op,
-					uint32_t pin)
+					u32_t pin)
 {
 	volatile struct gpio_pulpino_t *gpio = DEV_GPIO(dev);
 
@@ -215,7 +215,7 @@ static int gpio_pulpino_enable_callback(struct device *dev,
 
 static int gpio_pulpino_disable_callback(struct device *dev,
 					 int access_op,
-					 uint32_t pin)
+					 u32_t pin)
 {
 	volatile struct gpio_pulpino_t *gpio = DEV_GPIO(dev);
 
diff --git a/drivers/gpio/gpio_qmsi.c b/drivers/gpio/gpio_qmsi.c
index 012dc68a249..25e40e40f74 100644
--- a/drivers/gpio/gpio_qmsi.c
+++ b/drivers/gpio/gpio_qmsi.c
@@ -22,17 +22,17 @@
 
 struct gpio_qmsi_config {
 	qm_gpio_t gpio;
-	uint8_t num_pins;
+	u8_t num_pins;
 };
 
 struct gpio_qmsi_runtime {
 	sys_slist_t callbacks;
-	uint32_t pin_callbacks;
+	u32_t pin_callbacks;
 #ifdef CONFIG_GPIO_QMSI_API_REENTRANCY
 	struct k_sem sem;
 #endif /* CONFIG_GPIO_QMSI_API_REENTRANCY */
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
-	uint32_t device_power_state;
+	u32_t device_power_state;
 #endif
 };
 
@@ -45,14 +45,14 @@ struct gpio_qmsi_runtime {
 static int gpio_qmsi_init(struct device *dev);
 
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
-static void gpio_qmsi_set_power_state(struct device *dev, uint32_t power_state)
+static void gpio_qmsi_set_power_state(struct device *dev, u32_t power_state)
 {
 	struct gpio_qmsi_runtime *context = dev->driver_data;
 
 	context->device_power_state = power_state;
 }
 
-static uint32_t gpio_qmsi_get_power_state(struct device *dev)
+static u32_t gpio_qmsi_get_power_state(struct device *dev)
 {
 	struct gpio_qmsi_runtime *context = dev->driver_data;
 
@@ -100,17 +100,17 @@ static int gpio_resume_device_from_suspend(struct device *dev)
 * Implements the driver control management functionality
 * the *context may include IN data or/and OUT data
 */
-static int gpio_qmsi_device_ctrl(struct device *port, uint32_t ctrl_command,
+static int gpio_qmsi_device_ctrl(struct device *port, u32_t ctrl_command,
 				 void *context)
 {
 	if (ctrl_command == DEVICE_PM_SET_POWER_STATE) {
-		if (*((uint32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
+		if (*((u32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
 			return gpio_suspend_device(port);
-		} else if (*((uint32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
+		} else if (*((u32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
 			return gpio_resume_device_from_suspend(port);
 		}
 	} else if (ctrl_command == DEVICE_PM_GET_POWER_STATE) {
-		*((uint32_t *)context) = gpio_qmsi_get_power_state(port);
+		*((u32_t *)context) = gpio_qmsi_get_power_state(port);
 		return 0;
 	}
 	return 0;
@@ -137,18 +137,18 @@ static struct gpio_qmsi_runtime gpio_aon_runtime;
 * Implements the driver control management functionality
 * the *context may include IN data or/and OUT data
 */
-static int gpio_aon_device_ctrl(struct device *port, uint32_t ctrl_command,
+static int gpio_aon_device_ctrl(struct device *port, u32_t ctrl_command,
 				void *context)
 {
 	if (ctrl_command == DEVICE_PM_SET_POWER_STATE) {
-		uint32_t device_pm_state = *(uint32_t *)context;
+		u32_t device_pm_state = *(u32_t *)context;
 
 		if (device_pm_state == DEVICE_PM_SUSPEND_STATE ||
 		    device_pm_state == DEVICE_PM_ACTIVE_STATE) {
 			gpio_qmsi_set_power_state(port, device_pm_state);
 		}
 	} else if (ctrl_command == DEVICE_PM_GET_POWER_STATE) {
-		*((uint32_t *)context) = gpio_qmsi_get_power_state(port);
+		*((u32_t *)context) = gpio_qmsi_get_power_state(port);
 	}
 	return 0;
 }
@@ -160,18 +160,18 @@ DEVICE_DEFINE(gpio_aon, CONFIG_GPIO_QMSI_1_NAME, &gpio_qmsi_init,
 
 #endif /* CONFIG_GPIO_QMSI_1 */
 
-static void gpio_qmsi_callback(void *data, uint32_t status)
+static void gpio_qmsi_callback(void *data, u32_t status)
 {
 	struct device *port = data;
 	struct gpio_qmsi_runtime *context = port->driver_data;
-	const uint32_t enabled_mask = context->pin_callbacks & status;
+	const u32_t enabled_mask = context->pin_callbacks & status;
 
 	if (enabled_mask) {
 		_gpio_fire_callbacks(&context->callbacks, port, enabled_mask);
 	}
 }
 
-static void qmsi_write_bit(uint32_t *target, uint8_t bit, uint8_t value)
+static void qmsi_write_bit(u32_t *target, u8_t bit, u8_t value)
 {
 	if (value) {
 		sys_set_bit((uintptr_t) target, bit);
@@ -180,7 +180,7 @@ static void qmsi_write_bit(uint32_t *target, uint8_t bit, uint8_t value)
 	}
 }
 
-static inline void qmsi_pin_config(struct device *port, uint32_t pin, int flags)
+static inline void qmsi_pin_config(struct device *port, u32_t pin, int flags)
 {
 	const struct gpio_qmsi_config *gpio_config = port->config->config_info;
 	qm_gpio_t gpio = gpio_config->gpio;
@@ -224,7 +224,7 @@ static inline void qmsi_pin_config(struct device *port, uint32_t pin, int flags)
 static inline void qmsi_port_config(struct device *port, int flags)
 {
 	const struct gpio_qmsi_config *gpio_config = port->config->config_info;
-	uint8_t num_pins = gpio_config->num_pins;
+	u8_t num_pins = gpio_config->num_pins;
 	int i;
 
 	for (i = 0; i < num_pins; i++) {
@@ -233,7 +233,7 @@ static inline void qmsi_port_config(struct device *port, int flags)
 }
 
 static inline int gpio_qmsi_config(struct device *port,
-				   int access_op, uint32_t pin, int flags)
+				   int access_op, u32_t pin, int flags)
 {
 	/* If the pin/port is set to receive interrupts, make sure the pin
 	   is an input */
@@ -250,7 +250,7 @@ static inline int gpio_qmsi_config(struct device *port,
 }
 
 static inline int gpio_qmsi_write(struct device *port,
-				  int access_op, uint32_t pin, uint32_t value)
+				  int access_op, u32_t pin, u32_t value)
 {
 	const struct gpio_qmsi_config *gpio_config = port->config->config_info;
 	qm_gpio_t gpio = gpio_config->gpio;
@@ -276,7 +276,7 @@ static inline int gpio_qmsi_write(struct device *port,
 }
 
 static inline int gpio_qmsi_read(struct device *port,
-				 int access_op, uint32_t pin, uint32_t *value)
+				 int access_op, u32_t pin, u32_t *value)
 {
 	const struct gpio_qmsi_config *gpio_config = port->config->config_info;
 	qm_gpio_t gpio = gpio_config->gpio;
@@ -286,7 +286,7 @@ static inline int gpio_qmsi_read(struct device *port,
 		qm_gpio_read_pin(gpio, pin, &state);
 		*value = state;
 	} else {
-		qm_gpio_read_port(gpio, (uint32_t *const) value);
+		qm_gpio_read_port(gpio, (u32_t *const) value);
 	}
 
 	return 0;
@@ -304,7 +304,7 @@ static inline int gpio_qmsi_manage_callback(struct device *port,
 }
 
 static inline int gpio_qmsi_enable_callback(struct device *port,
-					    int access_op, uint32_t pin)
+					    int access_op, u32_t pin)
 {
 	struct gpio_qmsi_runtime *context = port->driver_data;
 
@@ -325,7 +325,7 @@ static inline int gpio_qmsi_enable_callback(struct device *port,
 }
 
 static inline int gpio_qmsi_disable_callback(struct device *port,
-					     int access_op, uint32_t pin)
+					     int access_op, u32_t pin)
 {
 	struct gpio_qmsi_runtime *context = port->driver_data;
 
@@ -346,7 +346,7 @@ static inline int gpio_qmsi_disable_callback(struct device *port,
 	return 0;
 }
 
-static uint32_t gpio_qmsi_get_pending_int(struct device *dev)
+static u32_t gpio_qmsi_get_pending_int(struct device *dev)
 {
 	const struct gpio_qmsi_config *gpio_config = dev->config->config_info;
 	qm_gpio_t gpio = gpio_config->gpio;
diff --git a/drivers/gpio/gpio_qmsi_ss.c b/drivers/gpio/gpio_qmsi_ss.c
index 2bc056df509..3f2a5def853 100644
--- a/drivers/gpio/gpio_qmsi_ss.c
+++ b/drivers/gpio/gpio_qmsi_ss.c
@@ -17,17 +17,17 @@
 
 struct ss_gpio_qmsi_config {
 	qm_ss_gpio_t gpio;
-	uint8_t num_pins;
+	u8_t num_pins;
 };
 
 struct ss_gpio_qmsi_runtime {
 	sys_slist_t callbacks;
-	uint32_t pin_callbacks;
+	u32_t pin_callbacks;
 #ifdef CONFIG_GPIO_QMSI_API_REENTRANCY
 	struct k_sem sem;
 #endif /* CONFIG_GPIO_QMSI_API_REENTRANCY */
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
-	uint32_t device_power_state;
+	u32_t device_power_state;
 	qm_ss_gpio_context_t gpio_ctx;
 #endif
 };
@@ -40,14 +40,14 @@ struct ss_gpio_qmsi_runtime {
 
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
 static void ss_gpio_qmsi_set_power_state(struct device *dev,
-					 uint32_t power_state)
+					 u32_t power_state)
 {
 	struct ss_gpio_qmsi_runtime *context = dev->driver_data;
 
 	context->device_power_state = power_state;
 }
 
-static uint32_t ss_gpio_qmsi_get_power_state(struct device *dev)
+static u32_t ss_gpio_qmsi_get_power_state(struct device *dev)
 {
 	struct ss_gpio_qmsi_runtime *context = dev->driver_data;
 
@@ -84,17 +84,17 @@ static int ss_gpio_resume_device_from_suspend(struct device *dev)
 * Implements the driver control management functionality
 * the *context may include IN data or/and OUT data
 */
-static int ss_gpio_qmsi_device_ctrl(struct device *port, uint32_t ctrl_command,
+static int ss_gpio_qmsi_device_ctrl(struct device *port, u32_t ctrl_command,
 				    void *context)
 {
 	if (ctrl_command == DEVICE_PM_SET_POWER_STATE) {
-		if (*((uint32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
+		if (*((u32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
 			return ss_gpio_suspend_device(port);
-		} else if (*((uint32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
+		} else if (*((u32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
 			return ss_gpio_resume_device_from_suspend(port);
 		}
 	} else if (ctrl_command == DEVICE_PM_GET_POWER_STATE) {
-		*((uint32_t *)context) = ss_gpio_qmsi_get_power_state(port);
+		*((u32_t *)context) = ss_gpio_qmsi_get_power_state(port);
 	}
 	return 0;
 }
@@ -132,18 +132,18 @@ DEVICE_DEFINE(ss_gpio_1, CONFIG_GPIO_QMSI_SS_1_NAME, &ss_gpio_qmsi_init,
 
 #endif /* CONFIG_GPIO_QMSI_SS_1 */
 
-static void ss_gpio_qmsi_callback(void *data, uint32_t status)
+static void ss_gpio_qmsi_callback(void *data, u32_t status)
 {
 	struct device *port = data;
 	struct ss_gpio_qmsi_runtime *context = port->driver_data;
-	const uint32_t enabled_mask = context->pin_callbacks & status;
+	const u32_t enabled_mask = context->pin_callbacks & status;
 
 	if (enabled_mask) {
 		_gpio_fire_callbacks(&context->callbacks, port, enabled_mask);
 	}
 }
 
-static void ss_qmsi_write_bit(uint32_t *target, uint8_t bit, uint8_t value)
+static void ss_qmsi_write_bit(u32_t *target, u8_t bit, u8_t value)
 {
 	if (value) {
 		sys_set_bit((uintptr_t) target, bit);
@@ -152,13 +152,13 @@ static void ss_qmsi_write_bit(uint32_t *target, uint8_t bit, uint8_t value)
 	}
 }
 
-static inline void ss_qmsi_pin_config(struct device *port, uint32_t pin,
+static inline void ss_qmsi_pin_config(struct device *port, u32_t pin,
 				      int flags)
 {
 	const struct ss_gpio_qmsi_config *gpio_config =
 		port->config->config_info;
 	qm_ss_gpio_t gpio = gpio_config->gpio;
-	uint32_t controller;
+	u32_t controller;
 
 	qm_ss_gpio_port_config_t cfg = { 0 };
 
@@ -214,7 +214,7 @@ static inline void ss_qmsi_port_config(struct device *port, int flags)
 {
 	const struct ss_gpio_qmsi_config *gpio_config =
 		port->config->config_info;
-	uint8_t num_pins = gpio_config->num_pins;
+	u8_t num_pins = gpio_config->num_pins;
 	int i;
 
 	for (i = 0; i < num_pins; i++) {
@@ -223,7 +223,7 @@ static inline void ss_qmsi_port_config(struct device *port, int flags)
 }
 
 static inline int ss_gpio_qmsi_config(struct device *port, int access_op,
-				      uint32_t pin, int flags)
+				      u32_t pin, int flags)
 {
 	/* check for an invalid pin configuration */
 	if ((flags & GPIO_INT) && (flags & GPIO_DIR_OUT)) {
@@ -239,7 +239,7 @@ static inline int ss_gpio_qmsi_config(struct device *port, int access_op,
 }
 
 static inline int ss_gpio_qmsi_write(struct device *port, int access_op,
-				     uint32_t pin, uint32_t value)
+				     u32_t pin, u32_t value)
 {
 	const struct ss_gpio_qmsi_config *gpio_config =
 		port->config->config_info;
@@ -267,7 +267,7 @@ static inline int ss_gpio_qmsi_write(struct device *port, int access_op,
 }
 
 static inline int ss_gpio_qmsi_read(struct device *port, int access_op,
-				    uint32_t pin, uint32_t *value)
+				    u32_t pin, u32_t *value)
 {
 	const struct ss_gpio_qmsi_config *gpio_config =
 		port->config->config_info;
@@ -296,7 +296,7 @@ static inline int ss_gpio_qmsi_manage_callback(struct device *port,
 }
 
 static inline int ss_gpio_qmsi_enable_callback(struct device *port,
-					       int access_op, uint32_t pin)
+					       int access_op, u32_t pin)
 {
 	struct ss_gpio_qmsi_runtime *context = port->driver_data;
 
@@ -318,7 +318,7 @@ static inline int ss_gpio_qmsi_enable_callback(struct device *port,
 }
 
 static inline int ss_gpio_qmsi_disable_callback(struct device *port,
-						int access_op, uint32_t pin)
+						int access_op, u32_t pin)
 {
 	struct ss_gpio_qmsi_runtime *context = port->driver_data;
 
@@ -365,7 +365,7 @@ static int ss_gpio_qmsi_init(struct device *port)
 {
 	const struct ss_gpio_qmsi_config *gpio_config =
 		port->config->config_info;
-	uint32_t *scss_intmask = NULL;
+	u32_t *scss_intmask = NULL;
 
 	if (IS_ENABLED(CONFIG_GPIO_QMSI_API_REENTRANCY)) {
 		k_sem_init(RP_GET(port), 0, UINT_MAX);
@@ -383,7 +383,7 @@ static int ss_gpio_qmsi_init(struct device *port)
 		ss_clk_gpio_enable(QM_SS_GPIO_0);
 
 		scss_intmask =
-			(uint32_t *)&QM_INTERRUPT_ROUTER->ss_gpio_0_int_mask;
+			(u32_t *)&QM_INTERRUPT_ROUTER->ss_gpio_0_int_mask;
 		*scss_intmask &= ~BIT(8);
 		break;
 #endif /* CONFIG_GPIO_QMSI_SS_0 */
@@ -397,7 +397,7 @@ static int ss_gpio_qmsi_init(struct device *port)
 		ss_clk_gpio_enable(QM_SS_GPIO_1);
 
 		scss_intmask =
-			(uint32_t *)&QM_INTERRUPT_ROUTER->ss_gpio_1_int_mask;
+			(u32_t *)&QM_INTERRUPT_ROUTER->ss_gpio_1_int_mask;
 		*scss_intmask &= ~BIT(8);
 		break;
 #endif /* CONFIG_GPIO_QMSI_SS_1 */
diff --git a/drivers/gpio/gpio_sch.c b/drivers/gpio/gpio_sch.c
index 34fb07d646a..07cbd175984 100644
--- a/drivers/gpio/gpio_sch.c
+++ b/drivers/gpio/gpio_sch.c
@@ -38,12 +38,12 @@
 #endif /* GPIO_SCH_LEGACY_IO_PORTS_ACCESS */
 
 #define DEFINE_MM_REG_READ(__reg, __off)                                \
-	static inline uint32_t _read_##__reg(uint32_t addr)             \
+	static inline u32_t _read_##__reg(u32_t addr)             \
 	{                                                               \
 		return _REG_READ(addr + __off);                         \
 	}
 #define DEFINE_MM_REG_WRITE(__reg, __off)                               \
-	static inline void _write_##__reg(uint32_t data, uint32_t addr) \
+	static inline void _write_##__reg(u32_t data, u32_t addr) \
 	{                                                               \
 		_REG_WRITE(data, addr + __off);                         \
 	}
@@ -55,8 +55,8 @@ DEFINE_MM_REG_WRITE(gtne, GPIO_SCH_REG_GTNE)
 DEFINE_MM_REG_READ(gts, GPIO_SCH_REG_GTS)
 DEFINE_MM_REG_WRITE(gts, GPIO_SCH_REG_GTS)
 
-static void _set_bit(uint32_t base_addr,
-		     uint32_t bit, uint8_t set)
+static void _set_bit(u32_t base_addr,
+		     u32_t bit, u8_t set)
 {
 	if (!set) {
 		_REG_CLEAR_BIT(base_addr, bit);
@@ -66,8 +66,8 @@ static void _set_bit(uint32_t base_addr,
 }
 
 #define DEFINE_MM_REG_SET_BIT(__reg, __off)                             \
-	static inline void _set_bit_##__reg(uint32_t addr,              \
-					    uint32_t bit, uint8_t set)  \
+	static inline void _set_bit_##__reg(u32_t addr,              \
+					    u32_t bit, u8_t set)  \
 	{                                                               \
 		_set_bit(addr + __off, bit, set);                       \
 	}
@@ -78,18 +78,18 @@ DEFINE_MM_REG_SET_BIT(glvl, GPIO_SCH_REG_GLVL)
 DEFINE_MM_REG_SET_BIT(gtpe, GPIO_SCH_REG_GTPE)
 DEFINE_MM_REG_SET_BIT(gtne, GPIO_SCH_REG_GTNE)
 
-static inline void _set_data_reg(uint32_t *reg, uint8_t pin, uint8_t set)
+static inline void _set_data_reg(u32_t *reg, u8_t pin, u8_t set)
 {
 	*reg &= ~(BIT(pin));
 	*reg |= (set << pin) & BIT(pin);
 }
 
-static void _gpio_pin_config(struct device *dev, uint32_t pin, int flags)
+static void _gpio_pin_config(struct device *dev, u32_t pin, int flags)
 {
 	const struct gpio_sch_config *info = dev->config->config_info;
 	struct gpio_sch_data *gpio = dev->driver_data;
-	uint8_t active_high = 0;
-	uint8_t active_low = 0;
+	u8_t active_high = 0;
+	u8_t active_low = 0;
 
 	_set_bit_gen(info->regs, pin, 1);
 	_set_bit_gio(info->regs, pin, !(flags & GPIO_DIR_MASK));
@@ -123,7 +123,7 @@ static inline void _gpio_port_config(struct device *dev, int flags)
 }
 
 static int gpio_sch_config(struct device *dev,
-			   int access_op, uint32_t pin, int flags)
+			   int access_op, u32_t pin, int flags)
 {
 	const struct gpio_sch_config *info = dev->config->config_info;
 
@@ -141,7 +141,7 @@ static int gpio_sch_config(struct device *dev,
 }
 
 static int gpio_sch_write(struct device *dev,
-			  int access_op, uint32_t pin, uint32_t value)
+			  int access_op, u32_t pin, u32_t value)
 {
 	const struct gpio_sch_config *info = dev->config->config_info;
 
@@ -159,7 +159,7 @@ static int gpio_sch_write(struct device *dev,
 }
 
 static int gpio_sch_read(struct device *dev,
-			 int access_op, uint32_t pin, uint32_t *value)
+			 int access_op, u32_t pin, u32_t *value)
 {
 	const struct gpio_sch_config *info = dev->config->config_info;
 
@@ -189,7 +189,7 @@ static void _gpio_sch_poll_status(void *arg1, void *unused1, void *unused2)
 	_write_gts(_read_gts(info->regs), info->regs);
 
 	while (gpio->poll) {
-		uint32_t status;
+		u32_t status;
 
 		status = _read_gts(info->regs);
 		if (!status) {
@@ -241,13 +241,13 @@ static int gpio_sch_manage_callback(struct device *dev,
 }
 
 static int gpio_sch_enable_callback(struct device *dev,
-				    int access_op, uint32_t pin)
+				    int access_op, u32_t pin)
 {
 	const struct gpio_sch_config *info = dev->config->config_info;
 	struct gpio_sch_data *gpio = dev->driver_data;
 
 	if (access_op == GPIO_ACCESS_BY_PIN) {
-		uint32_t bits = BIT(pin);
+		u32_t bits = BIT(pin);
 
 		if (pin >= info->bits) {
 			return -ENOTSUP;
@@ -270,7 +270,7 @@ static int gpio_sch_enable_callback(struct device *dev,
 }
 
 static int gpio_sch_disable_callback(struct device *dev,
-				     int access_op, uint32_t pin)
+				     int access_op, u32_t pin)
 {
 	const struct gpio_sch_config *info = dev->config->config_info;
 	struct gpio_sch_data *gpio = dev->driver_data;
diff --git a/drivers/gpio/gpio_sch.h b/drivers/gpio/gpio_sch.h
index 853aeff8ff9..a59c21a637a 100644
--- a/drivers/gpio/gpio_sch.h
+++ b/drivers/gpio/gpio_sch.h
@@ -24,9 +24,9 @@
 #define GPIO_SCH_REG_GTS		(0x1C)
 
 struct gpio_sch_config {
-	uint32_t regs;
-	uint8_t bits;
-	uint8_t stride[3];
+	u32_t regs;
+	u8_t bits;
+	u8_t stride[3];
 };
 
 #define GPIO_SCH_POLLING_STACK_SIZE 	1024
@@ -38,13 +38,13 @@ struct gpio_sch_data {
 	struct k_timer poll_timer;
 
 	struct {
-		uint32_t gtpe;
-		uint32_t gtne;
+		u32_t gtpe;
+		u32_t gtne;
 	} int_regs;
 
-	uint32_t cb_enabled;
-	uint8_t poll;
-	uint8_t stride[3];
+	u32_t cb_enabled;
+	u8_t poll;
+	u8_t stride[3];
 };
 
 #endif /* __GPIO_SCH_H__ */
diff --git a/drivers/gpio/gpio_stm32.c b/drivers/gpio/gpio_stm32.c
index ea63e604620..a08ff1b2895 100644
--- a/drivers/gpio/gpio_stm32.c
+++ b/drivers/gpio/gpio_stm32.c
@@ -41,7 +41,7 @@ static void gpio_stm32_isr(int line, void *arg)
  * @brief Configure pin or port
  */
 static int gpio_stm32_config(struct device *dev, int access_op,
-			     uint32_t pin, int flags)
+			     u32_t pin, int flags)
 {
 	const struct gpio_stm32_config *cfg = dev->config->config_info;
 	int pincfg;
@@ -93,7 +93,7 @@ static int gpio_stm32_config(struct device *dev, int access_op,
  * @brief Set the pin or port output
  */
 static int gpio_stm32_write(struct device *dev, int access_op,
-			    uint32_t pin, uint32_t value)
+			    u32_t pin, u32_t value)
 {
 	const struct gpio_stm32_config *cfg = dev->config->config_info;
 
@@ -108,7 +108,7 @@ static int gpio_stm32_write(struct device *dev, int access_op,
  * @brief Read the pin or port status
  */
 static int gpio_stm32_read(struct device *dev, int access_op,
-			   uint32_t pin, uint32_t *value)
+			   u32_t pin, u32_t *value)
 {
 	const struct gpio_stm32_config *cfg = dev->config->config_info;
 
@@ -133,7 +133,7 @@ static int gpio_stm32_manage_callback(struct device *dev,
 }
 
 static int gpio_stm32_enable_callback(struct device *dev,
-				      int access_op, uint32_t pin)
+				      int access_op, u32_t pin)
 {
 	struct gpio_stm32_data *data = dev->driver_data;
 
@@ -147,7 +147,7 @@ static int gpio_stm32_enable_callback(struct device *dev,
 }
 
 static int gpio_stm32_disable_callback(struct device *dev,
-				       int access_op, uint32_t pin)
+				       int access_op, u32_t pin)
 {
 	struct gpio_stm32_data *data = dev->driver_data;
 
@@ -203,7 +203,7 @@ static int gpio_stm32_init(struct device *device)
 
 #define GPIO_DEVICE_INIT(__name, __suffix, __base_addr, __port, __cenr, __bus) \
 static const struct gpio_stm32_config gpio_stm32_cfg_## __suffix = {	\
-	.base = (uint32_t *)__base_addr,				\
+	.base = (u32_t *)__base_addr,				\
 	.port = __port,							\
 	.pclken = { .bus = __bus, .enr = __cenr }			\
 };									\
@@ -224,7 +224,7 @@ DEVICE_AND_API_INIT(gpio_stm32_## __suffix,				\
 /* TODO: Change F1 to work similarly to F4 */
 #define GPIO_DEVICE_INIT(__name, __suffix, __base_addr, __port, __clock) \
 static const struct gpio_stm32_config gpio_stm32_cfg_## __suffix = {	\
-	.base = (uint32_t *)__base_addr,				\
+	.base = (u32_t *)__base_addr,				\
 	.port = __port,							\
 	.clock_subsys = UINT_TO_POINTER(__clock)			\
 };									\
@@ -242,7 +242,7 @@ DEVICE_AND_API_INIT(gpio_stm32_## __suffix,				\
 
 #define GPIO_DEVICE_INIT(__name, __suffix, __base_addr, __port, __cenr)	\
 static const struct gpio_stm32_config gpio_stm32_cfg_## __suffix = {	\
-	.base = (uint32_t *)__base_addr,				\
+	.base = (u32_t *)__base_addr,				\
 	.port = __port,							\
 	.pclken = { .bus = STM32F4X_CLOCK_BUS_AHB1, .enr = __cenr },	\
 };									\
diff --git a/drivers/gpio/gpio_stm32.h b/drivers/gpio/gpio_stm32.h
index 99f335d2781..d89fb7cc76e 100644
--- a/drivers/gpio/gpio_stm32.h
+++ b/drivers/gpio/gpio_stm32.h
@@ -48,7 +48,7 @@
  */
 struct gpio_stm32_config {
 	/* port base address */
-	uint32_t *base;
+	u32_t *base;
 	/* IO port */
 	enum stm32_pin_port port;
 #ifdef CONFIG_CLOCK_CONTROL_STM32_CUBE
@@ -66,7 +66,7 @@ struct gpio_stm32_config {
  */
 struct gpio_stm32_data {
 	/* Enabled INT pins generating a cb */
-	uint32_t cb_pins;
+	u32_t cb_pins;
 	/* user ISR cb */
 	sys_slist_t cb;
 };
@@ -89,7 +89,7 @@ int stm32_gpio_flags_to_conf(int flags, int *conf);
  * @param func GPIO mode
  * @param altf Alternate function
  */
-int stm32_gpio_configure(uint32_t *base_addr, int pin, int func, int altf);
+int stm32_gpio_configure(u32_t *base_addr, int pin, int func, int altf);
 
 /**
  * @brief helper for setting of GPIO pin output
@@ -98,7 +98,7 @@ int stm32_gpio_configure(uint32_t *base_addr, int pin, int func, int altf);
  * @param pin IO pin
  * @param value 1, 0
  */
-int stm32_gpio_set(uint32_t *base, int pin, int value);
+int stm32_gpio_set(u32_t *base, int pin, int value);
 
 /**
  * @brief helper for reading of GPIO pin value
@@ -107,7 +107,7 @@ int stm32_gpio_set(uint32_t *base, int pin, int value);
  * @param pin IO pin
  * @return pin value
  */
-int stm32_gpio_get(uint32_t *base, int pin);
+int stm32_gpio_get(u32_t *base, int pin);
 
 /**
  * @brief enable interrupt source for GPIO pin
diff --git a/drivers/gpio/gpio_utils.h b/drivers/gpio/gpio_utils.h
index b7d432de50f..a2521471a47 100644
--- a/drivers/gpio/gpio_utils.h
+++ b/drivers/gpio/gpio_utils.h
@@ -42,7 +42,7 @@ static inline void _gpio_manage_callback(sys_slist_t *callbacks,
  */
 static inline void _gpio_fire_callbacks(sys_slist_t *list,
 					struct device *port,
-					uint32_t pins)
+					u32_t pins)
 {
 	struct gpio_callback *cb;
 
diff --git a/drivers/grove/lcd_rgb.c b/drivers/grove/lcd_rgb.c
index f81e9667719..65bfb9564e9 100644
--- a/drivers/grove/lcd_rgb.c
+++ b/drivers/grove/lcd_rgb.c
@@ -23,20 +23,20 @@
 #define GROVE_RGB_BACKLIGHT_ADDR	(0x62)
 
 struct command {
-	uint8_t control;
-	uint8_t data;
+	u8_t control;
+	u8_t data;
 };
 
 struct glcd_data {
 	struct device *i2c;
-	uint8_t input_set;
-	uint8_t display_switch;
-	uint8_t function;
+	u8_t input_set;
+	u8_t display_switch;
+	u8_t function;
 };
 
 struct glcd_driver {
-	uint16_t	lcd_addr;
-	uint16_t	rgb_addr;
+	u16_t	lcd_addr;
+	u16_t	rgb_addr;
 };
 
 
@@ -74,7 +74,7 @@ struct glcd_driver {
 #define REGISTER_G	0x03
 #define REGISTER_B	0x02
 
-static uint8_t color_define[][3] = {
+static u8_t color_define[][3] = {
 	{ 255, 255, 255 },	/* white */
 	{ 255, 0,   0   },      /* red */
 	{ 0,   255, 0   },      /* green */
@@ -85,15 +85,15 @@ static uint8_t color_define[][3] = {
 /********************************************
  *  PRIVATE FUNCTIONS
  *******************************************/
-static void _rgb_reg_set(struct device * const i2c, uint8_t addr, uint8_t dta)
+static void _rgb_reg_set(struct device * const i2c, u8_t addr, u8_t dta)
 {
-	uint8_t data[2] = { addr, dta };
+	u8_t data[2] = { addr, dta };
 
 	i2c_write(i2c, data, sizeof(data), GROVE_RGB_BACKLIGHT_ADDR);
 }
 
 
-static inline void _sleep(uint32_t sleep_in_ms)
+static inline void _sleep(u32_t sleep_in_ms)
 {
 	k_busy_wait(SLEEP_IN_US(sleep_in_ms));
 }
@@ -107,7 +107,7 @@ void glcd_print(struct device *port, char *data, uint32_t size)
 	const struct glcd_driver * const rom = (struct glcd_driver *)
 						port->config->config_info;
 	struct glcd_data *dev = port->driver_data;
-	uint8_t buf[] = { GLCD_CMD_SET_CGRAM_ADDR, 0 };
+	u8_t buf[] = { GLCD_CMD_SET_CGRAM_ADDR, 0 };
 	int i;
 
 	for (i = 0; i < size; i++) {
@@ -117,7 +117,7 @@ void glcd_print(struct device *port, char *data, uint32_t size)
 }
 
 
-void glcd_cursor_pos_set(struct device *port, uint8_t col, uint8_t row)
+void glcd_cursor_pos_set(struct device *port, u8_t col, u8_t row)
 {
 	const struct glcd_driver * const rom = (struct glcd_driver *)
 						port->config->config_info;
@@ -143,7 +143,7 @@ void glcd_clear(struct device *port)
 	const struct glcd_driver * const rom = (struct glcd_driver *)
 						port->config->config_info;
 	struct glcd_data *dev = port->driver_data;
-	uint8_t clear[] = { 0, GLCD_CMD_SCREEN_CLEAR };
+	u8_t clear[] = { 0, GLCD_CMD_SCREEN_CLEAR };
 
 	i2c_write(dev->i2c, clear, sizeof(clear), rom->lcd_addr);
 	SYS_LOG_DBG("clear, delay 20 ms");
@@ -151,12 +151,12 @@ void glcd_clear(struct device *port)
 }
 
 
-void glcd_display_state_set(struct device *port, uint8_t opt)
+void glcd_display_state_set(struct device *port, u8_t opt)
 {
 	const struct glcd_driver * const rom = (struct glcd_driver *)
 						port->config->config_info;
 	struct glcd_data *dev = port->driver_data;
-	uint8_t data[] = { 0, 0 };
+	u8_t data[] = { 0, 0 };
 
 	dev->display_switch = opt;
 	data[1] = (opt | GLCD_CMD_DISPLAY_SWITCH);
@@ -168,7 +168,7 @@ void glcd_display_state_set(struct device *port, uint8_t opt)
 }
 
 
-uint8_t glcd_display_state_get(struct device *port)
+u8_t glcd_display_state_get(struct device *port)
 {
 	struct glcd_data *dev = port->driver_data;
 
@@ -176,11 +176,11 @@ uint8_t glcd_display_state_get(struct device *port)
 }
 
 
-void glcd_input_state_set(struct device *port, uint8_t opt)
+void glcd_input_state_set(struct device *port, u8_t opt)
 {
 	const struct glcd_driver * const rom = port->config->config_info;
 	struct glcd_data *dev = port->driver_data;
-	uint8_t data[] = { 0, 0 };
+	u8_t data[] = { 0, 0 };
 
 	dev->input_set = opt;
 	data[1] = (opt | GLCD_CMD_INPUT_SET);
@@ -191,7 +191,7 @@ void glcd_input_state_set(struct device *port, uint8_t opt)
 }
 
 
-uint8_t glcd_input_state_get(struct device *port)
+u8_t glcd_input_state_get(struct device *port)
 {
 	struct glcd_data *dev = port->driver_data;
 
@@ -199,7 +199,7 @@ uint8_t glcd_input_state_get(struct device *port)
 }
 
 
-void glcd_color_select(struct device *port, uint8_t color)
+void glcd_color_select(struct device *port, u8_t color)
 {
 	if (color > 3) {
 		SYS_LOG_WRN("selected color is too high a value");
@@ -211,7 +211,7 @@ void glcd_color_select(struct device *port, uint8_t color)
 }
 
 
-void glcd_color_set(struct device *port, uint8_t r, uint8_t g, uint8_t b)
+void glcd_color_set(struct device *port, u8_t r, u8_t g, u8_t b)
 {
 	struct glcd_data * const dev = port->driver_data;
 
@@ -221,11 +221,11 @@ void glcd_color_set(struct device *port, uint8_t r, uint8_t g, uint8_t b)
 }
 
 
-void glcd_function_set(struct device *port, uint8_t opt)
+void glcd_function_set(struct device *port, u8_t opt)
 {
 	const struct glcd_driver * const rom = port->config->config_info;
 	struct glcd_data *dev = port->driver_data;
-	uint8_t data[] = { 0, 0 };
+	u8_t data[] = { 0, 0 };
 
 	dev->function = opt;
 	data[1] = (opt | GLCD_CMD_FUNCTION_SET);
@@ -237,7 +237,7 @@ void glcd_function_set(struct device *port, uint8_t opt)
 }
 
 
-uint8_t glcd_function_get(struct device *port)
+u8_t glcd_function_get(struct device *port)
 {
 	struct glcd_data *dev = port->driver_data;
 
@@ -248,7 +248,7 @@ uint8_t glcd_function_get(struct device *port)
 int glcd_initialize(struct device *port)
 {
 	struct glcd_data *dev = port->driver_data;
-	uint8_t cmd;
+	u8_t cmd;
 
 	SYS_LOG_DBG("initialize called");
 
diff --git a/drivers/grove/light_sensor.c b/drivers/grove/light_sensor.c
index 6c3b3344bdc..1c176aaead7 100644
--- a/drivers/grove/light_sensor.c
+++ b/drivers/grove/light_sensor.c
@@ -18,7 +18,7 @@ struct gls_data {
 	struct device *adc;
 	struct adc_seq_entry sample;
 	struct adc_seq_table adc_table;
-	uint8_t adc_buffer[4];
+	u8_t adc_buffer[4];
 };
 
 static int gls_sample_fetch(struct device *dev, enum sensor_channel chan)
@@ -33,11 +33,11 @@ static int gls_channel_get(struct device *dev,
 			   struct sensor_value *val)
 {
 	struct gls_data *drv_data = dev->driver_data;
-	uint16_t analog_val;
+	u16_t analog_val;
 	double ldr_val, dval;
 
 	/* rescale sample from 12bit (Zephyr) to 10bit (Grove) */
-	analog_val = ((uint16_t)drv_data->adc_buffer[1] << 8) |
+	analog_val = ((u16_t)drv_data->adc_buffer[1] << 8) |
 		     drv_data->adc_buffer[0];
 	analog_val = analog_val >> 2;
 
@@ -49,8 +49,8 @@ static int gls_channel_get(struct device *dev,
 	ldr_val = (1023.0 - analog_val) * 10.0 / analog_val;
 	dval = 10000.0 / pow(ldr_val * 15.0, 4.0/3.0);
 
-	val->val1 = (int32_t)dval;
-	val->val2 = ((int32_t)(dval * 1000000)) % 1000000;
+	val->val1 = (s32_t)dval;
+	val->val2 = ((s32_t)(dval * 1000000)) % 1000000;
 
 	return 0;
 }
diff --git a/drivers/grove/temperature_sensor.c b/drivers/grove/temperature_sensor.c
index eb2986e0f75..919bd6a9872 100644
--- a/drivers/grove/temperature_sensor.c
+++ b/drivers/grove/temperature_sensor.c
@@ -25,7 +25,7 @@ struct gts_data {
 	struct device *adc;
 	struct adc_seq_entry sample;
 	struct adc_seq_table adc_table;
-	uint8_t adc_buffer[4];
+	u8_t adc_buffer[4];
 };
 
 static int gts_sample_fetch(struct device *dev, enum sensor_channel chan)
@@ -40,11 +40,11 @@ static int gts_channel_get(struct device *dev,
 			   struct sensor_value *val)
 {
 	struct gts_data *drv_data = dev->driver_data;
-	uint16_t analog_val;
+	u16_t analog_val;
 	double dval;
 
 	/* rescale sample from 12bit (Zephyr) to 10bit (Grove) */
-	analog_val = ((uint16_t)drv_data->adc_buffer[1] << 8) |
+	analog_val = ((u16_t)drv_data->adc_buffer[1] << 8) |
 		     drv_data->adc_buffer[0];
 	analog_val = analog_val >> 2;
 
@@ -56,8 +56,8 @@ static int gts_channel_get(struct device *dev,
 	dval = 1 / (log(1023.0 / analog_val - 1.0) / B_CONST +
 		    1 / 298.15) - 273.15;
 
-	val->val1 = (int32_t)dval;
-	val->val2 = ((int32_t)(dval * 1000000)) % 1000000;
+	val->val1 = (s32_t)dval;
+	val->val2 = ((s32_t)(dval * 1000000)) % 1000000;
 
 	return 0;
 }
diff --git a/drivers/i2c/i2c_atmel_sam3.c b/drivers/i2c/i2c_atmel_sam3.c
index 4ef34410f5e..9de11cf6695 100644
--- a/drivers/i2c/i2c_atmel_sam3.c
+++ b/drivers/i2c/i2c_atmel_sam3.c
@@ -62,11 +62,11 @@ struct i2c_sam3_dev_data {
 	struct k_sem		device_sync_sem;
 	union dev_config	dev_config;
 
-	volatile uint32_t	state;
+	volatile u32_t	state;
 
-	uint8_t			*xfr_buf;
-	uint32_t		xfr_len;
-	uint32_t		xfr_flags;
+	u8_t			*xfr_buf;
+	u32_t		xfr_len;
+	u32_t		xfr_flags;
 };
 
 
@@ -76,7 +76,7 @@ struct i2c_sam3_dev_data {
  * @param dev Device struct
  * @return Value used for TWI_CWGR register.
  */
-static uint32_t clk_div_calc(struct device *dev)
+static u32_t clk_div_calc(struct device *dev)
 {
 #if (CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC == 84000000)
 
@@ -109,11 +109,11 @@ static uint32_t clk_div_calc(struct device *dev)
 	 */
 
 	struct i2c_sam3_dev_data * const dev_data = dev->driver_data;
-	uint32_t i2c_clk;
-	uint32_t cldiv, chdiv, ckdiv;
-	uint32_t i2c_h_min_time, i2c_l_min_time;
-	uint32_t cldiv_min, chdiv_min;
-	uint32_t mck;
+	u32_t i2c_clk;
+	u32_t cldiv, chdiv, ckdiv;
+	u32_t i2c_h_min_time, i2c_l_min_time;
+	u32_t cldiv_min, chdiv_min;
+	u32_t mck;
 
 	/* The T(low) and T(high) are used to calculate CLDIV and CHDIV.
 	 * Since we treat both clock low and clock high to have same period,
@@ -188,8 +188,8 @@ static int i2c_sam3_runtime_configure(struct device *dev, uint32_t config)
 {
 	const struct i2c_sam3_dev_config * const cfg = dev->config->config_info;
 	struct i2c_sam3_dev_data * const dev_data = dev->driver_data;
-	uint32_t reg;
-	uint32_t clk;
+	u32_t reg;
+	u32_t clk;
 
 	dev_data->dev_config.raw = config;
 	reg = 0;
@@ -232,7 +232,7 @@ static void i2c_sam3_isr(void *arg)
  * This is because reading from status register will clear certain
  * bits, and thus status might be ignored afterwards.
  */
-static inline void sr_bits_set_wait(struct device *dev, uint32_t bits)
+static inline void sr_bits_set_wait(struct device *dev, u32_t bits)
 {
 	const struct i2c_sam3_dev_config *const cfg = dev->config->config_info;
 
@@ -245,7 +245,7 @@ static inline void sr_bits_set_wait(struct device *dev, uint32_t bits)
 static inline void status_reg_clear(struct device *dev)
 {
 	const struct i2c_sam3_dev_config *const cfg = dev->config->config_info;
-	uint32_t stat_reg;
+	u32_t stat_reg;
 
 	do {
 		stat_reg = cfg->port->sr;
@@ -268,12 +268,12 @@ static inline void status_reg_clear(struct device *dev)
 	} while (stat_reg);
 }
 
-static inline void transfer_setup(struct device *dev, uint16_t slave_address)
+static inline void transfer_setup(struct device *dev, u16_t slave_address)
 {
 	const struct i2c_sam3_dev_config *const cfg = dev->config->config_info;
 	struct i2c_sam3_dev_data * const dev_data = dev->driver_data;
-	uint32_t mmr;
-	uint32_t iadr;
+	u32_t mmr;
+	u32_t iadr;
 
 	/* Set slave address */
 	if (dev_data->dev_config.bits.use_10_bit_addr) {
@@ -308,7 +308,7 @@ static inline int msg_write(struct device *dev)
 
 	/* Setup PDC to do DMA transfer */
 	cfg->port->pdc.ptcr = PDC_PTCR_TXTDIS | PDC_PTCR_RXTDIS;
-	cfg->port->pdc.tpr = (uint32_t)dev_data->xfr_buf;
+	cfg->port->pdc.tpr = (u32_t)dev_data->xfr_buf;
 	cfg->port->pdc.tcr = dev_data->xfr_len;
 
 	/* Enable TX related interrupts.
@@ -353,9 +353,9 @@ static inline int msg_read(struct device *dev)
 {
 	const struct i2c_sam3_dev_config *const cfg = dev->config->config_info;
 	struct i2c_sam3_dev_data * const dev_data = dev->driver_data;
-	uint32_t stat_reg;
-	uint32_t ctrl_reg;
-	uint32_t last_len;
+	u32_t stat_reg;
+	u32_t ctrl_reg;
+	u32_t last_len;
 
 	/* To read from slave */
 	cfg->port->mmr |= TWI_MMR_MREAD;
@@ -384,7 +384,7 @@ static inline int msg_read(struct device *dev)
 	while (dev_data->xfr_len > 0) {
 		/* Setup PDC to do DMA transfer. */
 		cfg->port->pdc.ptcr = PDC_PTCR_TXTDIS | PDC_PTCR_RXTDIS;
-		cfg->port->pdc.rpr = (uint32_t)dev_data->xfr_buf;
+		cfg->port->pdc.rpr = (u32_t)dev_data->xfr_buf;
 
 		/* Note that we need to set the STOP bit before reading
 		 * last byte from RHR. So we need to process the last byte
@@ -449,14 +449,14 @@ static inline int msg_read(struct device *dev)
 }
 
 static int i2c_sam3_transfer(struct device *dev,
-			     struct i2c_msg *msgs, uint8_t num_msgs,
-			     uint16_t slave_address)
+			     struct i2c_msg *msgs, u8_t num_msgs,
+			     u16_t slave_address)
 {
 	const struct i2c_sam3_dev_config *const cfg = dev->config->config_info;
 	struct i2c_sam3_dev_data * const dev_data = dev->driver_data;
 	struct i2c_msg *cur_msg = msgs;
-	uint8_t msg_left = num_msgs;
-	uint32_t pflags = 0;
+	u8_t msg_left = num_msgs;
+	u32_t pflags = 0;
 	int ret = 0;
 	int xfr_ret;
 
diff --git a/drivers/i2c/i2c_dw.c b/drivers/i2c/i2c_dw.c
index 68350eda33c..33690fe7ac1 100644
--- a/drivers/i2c/i2c_dw.c
+++ b/drivers/i2c/i2c_dw.c
@@ -39,10 +39,10 @@
 static inline void _i2c_dw_data_ask(struct device *dev)
 {
 	struct i2c_dw_dev_config * const dw = dev->driver_data;
-	uint32_t data;
-	uint8_t tx_empty;
-	int8_t rx_empty;
-	uint8_t cnt;
+	u32_t data;
+	u8_t tx_empty;
+	s8_t rx_empty;
+	u8_t cnt;
 
 	volatile struct i2c_dw_registers * const regs =
 		(struct i2c_dw_registers *)dw->base_address;
@@ -124,7 +124,7 @@ static void _i2c_dw_data_read(struct device *dev)
 static int _i2c_dw_data_send(struct device *dev)
 {
 	struct i2c_dw_dev_config * const dw = dev->driver_data;
-	uint32_t data = 0;
+	u32_t data = 0;
 
 	volatile struct i2c_dw_registers * const regs =
 		(struct i2c_dw_registers *)dw->base_address;
@@ -169,7 +169,7 @@ static int _i2c_dw_data_send(struct device *dev)
 static inline void _i2c_dw_transfer_complete(struct device *dev)
 {
 	struct i2c_dw_dev_config * const dw = dev->driver_data;
-	uint32_t value;
+	u32_t value;
 
 	volatile struct i2c_dw_registers * const regs =
 		(struct i2c_dw_registers *)dw->base_address;
@@ -185,7 +185,7 @@ static void i2c_dw_isr(void *arg)
 	struct device *port = (struct device *)arg;
 	struct i2c_dw_dev_config * const dw = port->driver_data;
 	union ic_interrupt_register intr_stat;
-	uint32_t value;
+	u32_t value;
 	int ret = 0;
 
 	volatile struct i2c_dw_registers * const regs =
@@ -293,10 +293,10 @@ done:
 }
 
 
-static int _i2c_dw_setup(struct device *dev, uint16_t slave_address)
+static int _i2c_dw_setup(struct device *dev, u16_t slave_address)
 {
 	struct i2c_dw_dev_config * const dw = dev->driver_data;
-	uint32_t value;
+	u32_t value;
 	union ic_con_register ic_con;
 	volatile struct i2c_dw_registers * const regs =
 		(struct i2c_dw_registers *)dw->base_address;
@@ -402,13 +402,13 @@ static int _i2c_dw_setup(struct device *dev, uint16_t slave_address)
 }
 
 static int i2c_dw_transfer(struct device *dev,
-			   struct i2c_msg *msgs, uint8_t num_msgs,
-			   uint16_t slave_address)
+			   struct i2c_msg *msgs, u8_t num_msgs,
+			   u16_t slave_address)
 {
 	struct i2c_dw_dev_config * const dw = dev->driver_data;
 	struct i2c_msg *cur_msg = msgs;
-	uint8_t msg_left = num_msgs;
-	uint8_t pflags;
+	u8_t msg_left = num_msgs;
+	u8_t pflags;
 	int ret;
 
 	volatile struct i2c_dw_registers * const regs =
@@ -514,11 +514,11 @@ static int i2c_dw_transfer(struct device *dev,
 	return ret;
 }
 
-static int i2c_dw_runtime_configure(struct device *dev, uint32_t config)
+static int i2c_dw_runtime_configure(struct device *dev, u32_t config)
 {
 	struct i2c_dw_dev_config * const dw = dev->driver_data;
-	uint32_t	value = 0;
-	uint32_t	rc = 0;
+	u32_t	value = 0;
+	u32_t	rc = 0;
 
 	volatile struct i2c_dw_registers * const regs =
 		(struct i2c_dw_registers *)dw->base_address;
diff --git a/drivers/i2c/i2c_dw.h b/drivers/i2c/i2c_dw.h
index df4f6c64df8..d387b7ca1df 100644
--- a/drivers/i2c/i2c_dw.h
+++ b/drivers/i2c/i2c_dw.h
@@ -85,8 +85,8 @@ typedef void (*i2c_isr_cb_t)(struct device *port);
 
 
 struct i2c_dw_rom_config {
-	uint32_t	irq_num;
-	uint32_t        interrupt_mask;
+	u32_t	irq_num;
+	u32_t        interrupt_mask;
 	i2c_isr_cb_t	config_func;
 
 #ifdef CONFIG_I2C_DW_SHARED_IRQ
@@ -96,21 +96,21 @@ struct i2c_dw_rom_config {
 
 
 struct i2c_dw_dev_config {
-	uint32_t base_address;
+	u32_t base_address;
 	struct k_sem		device_sync_sem;
 	union dev_config	app_config;
 
 
-	uint8_t			*xfr_buf;
-	uint32_t		xfr_len;
-	uint32_t		rx_pending;
+	u8_t			*xfr_buf;
+	u32_t		xfr_len;
+	u32_t		rx_pending;
 
-	uint16_t		hcnt;
-	uint16_t		lcnt;
+	u16_t		hcnt;
+	u16_t		lcnt;
 
-	volatile uint8_t	state;  /* last direction of transfer */
-	uint8_t			request_bytes;
-	uint8_t			xfr_flags;
+	volatile u8_t	state;  /* last direction of transfer */
+	u8_t			request_bytes;
+	u8_t			xfr_flags;
 	bool			support_hs_mode;
 #ifdef CONFIG_PCI
 	struct pci_dev_info pci_dev;
diff --git a/drivers/i2c/i2c_dw_registers.h b/drivers/i2c/i2c_dw_registers.h
index c694353e394..57f9bf67f0d 100644
--- a/drivers/i2c/i2c_dw_registers.h
+++ b/drivers/i2c/i2c_dw_registers.h
@@ -23,17 +23,17 @@ extern "C" {
 #define IC_CON_MASTER_MODE			(1 << 0)
 
 union ic_con_register {
-	uint16_t                raw;
+	u16_t                raw;
 	struct {
-		uint16_t         master_mode : 1 __packed;
-		uint16_t         speed : 2 __packed;
-		uint16_t         addr_slave_10bit : 1 __packed;
-		uint16_t         addr_master_10bit : 1 __packed;
-		uint16_t         restart_en : 1 __packed;
-		uint16_t         slave_disable : 1 __packed;
-		uint16_t         stop_det : 1 __packed;
-		uint16_t         tx_empty_ctl : 1 __packed;
-		uint16_t         rx_fifo_full : 1 __packed;
+		u16_t         master_mode : 1 __packed;
+		u16_t         speed : 2 __packed;
+		u16_t         addr_slave_10bit : 1 __packed;
+		u16_t         addr_master_10bit : 1 __packed;
+		u16_t         restart_en : 1 __packed;
+		u16_t         slave_disable : 1 __packed;
+		u16_t         stop_det : 1 __packed;
+		u16_t         tx_empty_ctl : 1 __packed;
+		u16_t         rx_fifo_full : 1 __packed;
 	} bits;
 };
 
@@ -45,13 +45,13 @@ union ic_con_register {
 #define IC_DATA_CMD_RESTART		(1 << 10)
 
 union ic_data_cmd_register {
-	uint16_t                raw;
+	u16_t                raw;
 	struct {
-	       uint16_t         dat : 8 __packed;
-	       uint16_t         cmd : 1 __packed;
-	       uint16_t         stop : 1 __packed;
-	       uint16_t         restart : 1 __packed;
-	       uint16_t         reserved : 4 __packed;
+	       u16_t         dat : 8 __packed;
+	       u16_t         cmd : 1 __packed;
+	       u16_t         stop : 1 __packed;
+	       u16_t         restart : 1 __packed;
+	       u16_t         reserved : 4 __packed;
 	} bits;
 };
 
@@ -60,11 +60,11 @@ union ic_data_cmd_register {
 #define IC_ENABLE_ABORT			(1 << 1)
 
 union ic_enable_register {
-	uint16_t		raw;
+	u16_t		raw;
 	struct {
-		uint16_t	enable : 1 __packed;
-		uint16_t	abort : 1 __packed;
-		uint16_t	reserved : 13 __packed;
+		u16_t	enable : 1 __packed;
+		u16_t	abort : 1 __packed;
+		u16_t	reserved : 13 __packed;
 	} bits;
 };
 
@@ -87,78 +87,78 @@ union ic_enable_register {
 
 
 union ic_interrupt_register {
-	uint16_t			raw;
+	u16_t			raw;
 	struct {
-		uint16_t	rx_under : 1 __packed;
-		uint16_t	rx_over : 1 __packed;
-		uint16_t	rx_full : 1 __packed;
-		uint16_t	tx_over : 1 __packed;
-		uint16_t	tx_empty : 1 __packed;
-		uint16_t	rd_req : 1 __packed;
-		uint16_t	tx_abrt : 1 __packed;
-		uint16_t	rx_done : 1 __packed;
-		uint16_t	activity : 1 __packed;
-		uint16_t	stop_det : 1 __packed;
-		uint16_t	start_det : 1 __packed;
-		uint16_t	gen_call : 1 __packed;
-		uint16_t	restart_det : 1 __packed;
-		uint16_t	mst_on_hold : 1 __packed;
-		uint16_t	reserved : 2 __packed;
+		u16_t	rx_under : 1 __packed;
+		u16_t	rx_over : 1 __packed;
+		u16_t	rx_full : 1 __packed;
+		u16_t	tx_over : 1 __packed;
+		u16_t	tx_empty : 1 __packed;
+		u16_t	rd_req : 1 __packed;
+		u16_t	tx_abrt : 1 __packed;
+		u16_t	rx_done : 1 __packed;
+		u16_t	activity : 1 __packed;
+		u16_t	stop_det : 1 __packed;
+		u16_t	start_det : 1 __packed;
+		u16_t	gen_call : 1 __packed;
+		u16_t	restart_det : 1 __packed;
+		u16_t	mst_on_hold : 1 __packed;
+		u16_t	reserved : 2 __packed;
 	} bits;
 };
 
 
 /* IC_TAR */
 union ic_tar_register {
-	uint16_t		raw;
+	u16_t		raw;
 	struct {
-		uint16_t	ic_tar : 9 __packed;
-		uint16_t	gc_or_start : 1 __packed;
-		uint16_t	special : 1 __packed;
-		uint16_t	ic_10bitaddr_master : 1 __packed;
-		uint16_t	reserved : 3 __packed;
+		u16_t	ic_tar : 9 __packed;
+		u16_t	gc_or_start : 1 __packed;
+		u16_t	special : 1 __packed;
+		u16_t	ic_10bitaddr_master : 1 __packed;
+		u16_t	reserved : 3 __packed;
 	} bits;
 };
 
 
 /* IC_SAR */
 union ic_sar_register {
-	uint16_t		raw;
+	u16_t		raw;
 	struct {
-		uint16_t	ic_sar : 9 __packed;
-		uint16_t	reserved : 6 __packed;
+		u16_t	ic_sar : 9 __packed;
+		u16_t	reserved : 6 __packed;
 	} bits;
 };
 
 
 /* IC_STATUS */
 union ic_status_register {
-	uint32_t		raw;
+	u32_t		raw;
 	struct {
-		uint32_t	activity : 1 __packed;
-		uint32_t	tfnf : 1 __packed;
-		uint32_t	tfe : 1 __packed;
-		uint32_t	rfne : 1 __packed;
-		uint32_t	rff : 1 __packed;
-		uint32_t	mst_activity : 1 __packed;
-		uint32_t	slv_activity : 1 __packed;
-		uint32_t	reserved : 24 __packed;
+		u32_t	activity : 1 __packed;
+		u32_t	tfnf : 1 __packed;
+		u32_t	tfe : 1 __packed;
+		u32_t	rfne : 1 __packed;
+		u32_t	rff : 1 __packed;
+		u32_t	mst_activity : 1 __packed;
+		u32_t	slv_activity : 1 __packed;
+		u32_t	reserved : 24 __packed;
 	} bits;
 };
 
 
 union ic_comp_param_1_register {
-	uint32_t			raw;
+	u32_t			raw;
 	struct {
-		uint32_t		apb_data_width : 2 __packed;
-		uint32_t		max_speed_mode : 2 __packed;
-		uint32_t		hc_count_values : 1 __packed;
-		uint32_t		intr_io : 1 __packed;
-		uint32_t		has_dma : 1 __packed;
-		uint32_t		add_encoded_params : 1 __packed;
-		uint32_t		rx_buffer_depth : 8 __packed;
-		uint32_t		tx_buffer_depth : 8 __packed;
-		uint32_t		reserved : 7 __packed;
+		u32_t		apb_data_width : 2 __packed;
+		u32_t		max_speed_mode : 2 __packed;
+		u32_t		hc_count_values : 1 __packed;
+		u32_t		intr_io : 1 __packed;
+		u32_t		has_dma : 1 __packed;
+		u32_t		add_encoded_params : 1 __packed;
+		u32_t		rx_buffer_depth : 8 __packed;
+		u32_t		tx_buffer_depth : 8 __packed;
+		u32_t		reserved : 7 __packed;
 	} bits;
 };
 
@@ -177,80 +177,80 @@ union ic_comp_param_1_register {
  */
 struct i2c_dw_registers {
 	union ic_con_register ic_con;	/* offset 0x00 */
-	uint16_t dummy1;
+	u16_t dummy1;
 	union ic_tar_register ic_tar;	/* offset 0x04 */
-	uint16_t dummy2;
+	u16_t dummy2;
 	union ic_sar_register ic_sar;	/* offset 0x08 */
-	uint16_t dummy3;
-	uint16_t ic_hs_maddr;		/* offset 0x0C */
-	uint16_t dummy4;
+	u16_t dummy3;
+	u16_t ic_hs_maddr;		/* offset 0x0C */
+	u16_t dummy4;
 	union ic_data_cmd_register ic_data_cmd;		/* offset 0x10 */
-	uint16_t dummy5;
-	uint16_t ic_ss_scl_hcnt;	/* offset 0x14 */
-	uint16_t dummy6;
-	uint16_t ic_ss_scl_lcnt;	/* offset 0x18 */
-	uint16_t dummy7;
-	uint16_t ic_fs_scl_hcnt;	/* offset 0x1C */
-	uint16_t dummy8;
-	uint16_t ic_fs_scl_lcnt;	/* offset 0x20 */
-	uint16_t dummy9;
-	uint16_t ic_hs_scl_hcnt;	/* offset 0x24 */
-	uint16_t dummy10;
-	uint16_t ic_hs_scl_lcnt;	/* offset 0x28 */
-	uint16_t dummy11;
+	u16_t dummy5;
+	u16_t ic_ss_scl_hcnt;	/* offset 0x14 */
+	u16_t dummy6;
+	u16_t ic_ss_scl_lcnt;	/* offset 0x18 */
+	u16_t dummy7;
+	u16_t ic_fs_scl_hcnt;	/* offset 0x1C */
+	u16_t dummy8;
+	u16_t ic_fs_scl_lcnt;	/* offset 0x20 */
+	u16_t dummy9;
+	u16_t ic_hs_scl_hcnt;	/* offset 0x24 */
+	u16_t dummy10;
+	u16_t ic_hs_scl_lcnt;	/* offset 0x28 */
+	u16_t dummy11;
 	union ic_interrupt_register ic_intr_stat;	/* offset 0x2C */
-	uint16_t dummy12;
+	u16_t dummy12;
 	union ic_interrupt_register ic_intr_mask;	/* offset 0x30 */
-	uint16_t dummy13;
+	u16_t dummy13;
 	union ic_interrupt_register ic_raw_intr_stat;	/* offset 0x34 */
-	uint16_t dummy14;
-	uint16_t ic_rx_tl;		/* offset 0x38 */
-	uint16_t dummy15;
-	uint16_t ic_tx_tl;		/* offset 0x3C */
-	uint16_t dummy16;
-	uint16_t ic_clr_intr;		/* offset 0x40 */
-	uint16_t dummy17;
-	uint16_t ic_clr_rx_under;	/* offset 0x44 */
-	uint16_t dummy18;
-	uint16_t ic_clr_rx_over;	/* offset 0x48 */
-	uint16_t dummy19;
-	uint16_t ic_clr_tx_over;	/* offset 0x4C */
-	uint16_t dummy20;
-	uint16_t ic_clr_rd_req;		/* offset 0x50 */
-	uint16_t dummy21;
-	uint16_t ic_clr_tx_abrt;	/* offset 0x54 */
-	uint16_t dummy22;
-	uint16_t ic_clr_rx_done;	/* offset 0x58 */
-	uint16_t dummy23;
-	uint16_t ic_clr_activity;	/* offset 0x5C */
-	uint16_t dummy24;
-	uint16_t ic_clr_stop_det;	/* offset 0x60 */
-	uint16_t dummy25;
-	uint16_t ic_clr_start_det;	/* offset 0x64 */
-	uint16_t dummy26;
-	uint16_t ic_clr_gen_call;	/* offset 0x68 */
-	uint16_t dummy27;
+	u16_t dummy14;
+	u16_t ic_rx_tl;		/* offset 0x38 */
+	u16_t dummy15;
+	u16_t ic_tx_tl;		/* offset 0x3C */
+	u16_t dummy16;
+	u16_t ic_clr_intr;		/* offset 0x40 */
+	u16_t dummy17;
+	u16_t ic_clr_rx_under;	/* offset 0x44 */
+	u16_t dummy18;
+	u16_t ic_clr_rx_over;	/* offset 0x48 */
+	u16_t dummy19;
+	u16_t ic_clr_tx_over;	/* offset 0x4C */
+	u16_t dummy20;
+	u16_t ic_clr_rd_req;		/* offset 0x50 */
+	u16_t dummy21;
+	u16_t ic_clr_tx_abrt;	/* offset 0x54 */
+	u16_t dummy22;
+	u16_t ic_clr_rx_done;	/* offset 0x58 */
+	u16_t dummy23;
+	u16_t ic_clr_activity;	/* offset 0x5C */
+	u16_t dummy24;
+	u16_t ic_clr_stop_det;	/* offset 0x60 */
+	u16_t dummy25;
+	u16_t ic_clr_start_det;	/* offset 0x64 */
+	u16_t dummy26;
+	u16_t ic_clr_gen_call;	/* offset 0x68 */
+	u16_t dummy27;
 	union ic_enable_register ic_enable;	/* offset 0x6c */
-	uint16_t dummy28;
+	u16_t dummy28;
 	union ic_status_register ic_status;	/* offset 0x70 */
-	uint32_t ic_txflr;		/* offset 0x74 */
-	uint32_t ic_rxflr;		/* offset 0x78 */
-	uint32_t ic_sda_hold;		/* offset 0x7C */
-	uint32_t ic_tx_abrt_source;	/* offset 0x80 */
-	uint32_t ic_slv_data_nack_only; /* offset 0x84 */
-	uint32_t ic_dma_cr;		/* offset 0x88 */
-	uint32_t ic_dma_tdlr;		/* offset 0x8C */
-	uint32_t ic_dma_rdlr;		/* offset 0x90 */
-	uint32_t ic_sda_setup;		/* offset 0x94 */
-	uint32_t ic_ack_general_call;	/* offset 0x98 */
-	uint32_t ic_enable_status;	/* offset 0x9C */
-	uint32_t ic_fs_spklen;		/* offset 0xA0 */
-	uint32_t ic_hs_spklen;		/* offset 0xA4 */
-	uint16_t ic_clr_restart_det;	/* offset 0xA8 */
-	uint8_t	 filler[74];
+	u32_t ic_txflr;		/* offset 0x74 */
+	u32_t ic_rxflr;		/* offset 0x78 */
+	u32_t ic_sda_hold;		/* offset 0x7C */
+	u32_t ic_tx_abrt_source;	/* offset 0x80 */
+	u32_t ic_slv_data_nack_only; /* offset 0x84 */
+	u32_t ic_dma_cr;		/* offset 0x88 */
+	u32_t ic_dma_tdlr;		/* offset 0x8C */
+	u32_t ic_dma_rdlr;		/* offset 0x90 */
+	u32_t ic_sda_setup;		/* offset 0x94 */
+	u32_t ic_ack_general_call;	/* offset 0x98 */
+	u32_t ic_enable_status;	/* offset 0x9C */
+	u32_t ic_fs_spklen;		/* offset 0xA0 */
+	u32_t ic_hs_spklen;		/* offset 0xA4 */
+	u16_t ic_clr_restart_det;	/* offset 0xA8 */
+	u8_t	 filler[74];
 	union ic_comp_param_1_register ic_comp_param_1;	/* offset 0xF4 */
-	uint32_t ic_comp_version;	/* offset 0xF8 */
-	uint32_t ic_comp_type;		/* offset 0xFC */
+	u32_t ic_comp_version;	/* offset 0xF8 */
+	u32_t ic_comp_type;		/* offset 0xFC */
 };
 
 #ifdef __cplusplus
diff --git a/drivers/i2c/i2c_mcux.c b/drivers/i2c/i2c_mcux.c
index 1d9a71d796e..15ec3d9cd72 100644
--- a/drivers/i2c/i2c_mcux.c
+++ b/drivers/i2c/i2c_mcux.c
@@ -31,13 +31,13 @@ struct i2c_mcux_data {
 	status_t callback_status;
 };
 
-static int i2c_mcux_configure(struct device *dev, uint32_t dev_config_raw)
+static int i2c_mcux_configure(struct device *dev, u32_t dev_config_raw)
 {
 	I2C_Type *base = DEV_BASE(dev);
 	const struct i2c_mcux_config *config = DEV_CFG(dev);
 	union dev_config dev_config = (union dev_config)dev_config_raw;
-	uint32_t clock_freq;
-	uint32_t baudrate;
+	u32_t clock_freq;
+	u32_t baudrate;
 
 	if (!dev_config.bits.is_master_device) {
 		return -EINVAL;
@@ -81,9 +81,9 @@ static void i2c_mcux_master_transfer_callback(I2C_Type *base,
 	k_sem_give(&data->device_sync_sem);
 }
 
-static uint32_t i2c_mcux_convert_flags(int msg_flags)
+static u32_t i2c_mcux_convert_flags(int msg_flags)
 {
-	uint32_t flags = 0;
+	u32_t flags = 0;
 
 	if (!(msg_flags & I2C_MSG_STOP)) {
 		flags |= kI2C_TransferNoStopFlag;
@@ -97,7 +97,7 @@ static uint32_t i2c_mcux_convert_flags(int msg_flags)
 }
 
 static int i2c_mcux_transfer(struct device *dev, struct i2c_msg *msgs,
-		uint8_t num_msgs, uint16_t addr)
+		u8_t num_msgs, u16_t addr)
 {
 	I2C_Type *base = DEV_BASE(dev);
 	struct i2c_mcux_data *data = DEV_DATA(dev);
@@ -159,7 +159,7 @@ static int i2c_mcux_init(struct device *dev)
 	I2C_Type *base = DEV_BASE(dev);
 	const struct i2c_mcux_config *config = DEV_CFG(dev);
 	struct i2c_mcux_data *data = DEV_DATA(dev);
-	uint32_t clock_freq;
+	u32_t clock_freq;
 	i2c_master_config_t master_config;
 	int error;
 
diff --git a/drivers/i2c/i2c_nrf5.c b/drivers/i2c/i2c_nrf5.c
index 5568aa3e3b8..06050ede996 100644
--- a/drivers/i2c/i2c_nrf5.c
+++ b/drivers/i2c/i2c_nrf5.c
@@ -39,15 +39,15 @@ struct i2c_nrf5_config {
 
 struct i2c_nrf5_data {
 	struct k_sem sem;
-	uint32_t rxd:1;
-	uint32_t txd:1;
-	uint32_t err:1;
-	uint32_t stopped:1;
+	u32_t rxd:1;
+	u32_t txd:1;
+	u32_t err:1;
+	u32_t stopped:1;
 	struct device *gpio;
 };
 
 
-static int i2c_nrf5_configure(struct device *dev, uint32_t dev_config_raw)
+static int i2c_nrf5_configure(struct device *dev, u32_t dev_config_raw)
 {
 	const struct i2c_nrf5_config *config = dev->config->config_info;
 	union dev_config dev_config = (union dev_config)dev_config_raw;
@@ -199,7 +199,7 @@ static int i2c_nrf5_write(struct device *dev,
 }
 
 static int i2c_nrf5_transfer(struct device *dev, struct i2c_msg *msgs,
-			     uint8_t num_msgs, uint16_t addr)
+			     u8_t num_msgs, u16_t addr)
 {
 	const struct i2c_nrf5_config *config = dev->config->config_info;
 	volatile NRF_TWI_Type *twi = config->base;
diff --git a/drivers/i2c/i2c_qmsi.c b/drivers/i2c/i2c_qmsi.c
index 9b20d54119c..80389171440 100644
--- a/drivers/i2c/i2c_qmsi.c
+++ b/drivers/i2c/i2c_qmsi.c
@@ -36,20 +36,20 @@ struct i2c_qmsi_driver_data {
 	int transfer_status;
 	struct k_sem sem;
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
-	uint32_t device_power_state;
+	u32_t device_power_state;
 	qm_i2c_context_t i2c_ctx;
 #endif
 };
 
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
-static void i2c_qmsi_set_power_state(struct device *dev, uint32_t power_state)
+static void i2c_qmsi_set_power_state(struct device *dev, u32_t power_state)
 {
 	struct i2c_qmsi_driver_data *drv_data = dev->driver_data;
 
 	drv_data->device_power_state = power_state;
 }
 
-static uint32_t i2c_qmsi_get_power_state(struct device *dev)
+static u32_t i2c_qmsi_get_power_state(struct device *dev)
 {
 	struct i2c_qmsi_driver_data *drv_data = dev->driver_data;
 
@@ -87,17 +87,17 @@ static int i2c_resume_device_from_suspend(struct device *dev)
 * Implements the driver control management functionality
 * the *context may include IN data or/and OUT data
 */
-static int i2c_device_ctrl(struct device *dev, uint32_t ctrl_command,
+static int i2c_device_ctrl(struct device *dev, u32_t ctrl_command,
 			   void *context)
 {
 	if (ctrl_command == DEVICE_PM_SET_POWER_STATE) {
-		if (*((uint32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
+		if (*((u32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
 			return i2c_suspend_device(dev);
-		} else if (*((uint32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
+		} else if (*((u32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
 			return i2c_resume_device_from_suspend(dev);
 		}
 	} else if (ctrl_command == DEVICE_PM_GET_POWER_STATE) {
-		*((uint32_t *)context) = i2c_qmsi_get_power_state(dev);
+		*((u32_t *)context) = i2c_qmsi_get_power_state(dev);
 		return 0;
 	}
 
@@ -139,7 +139,7 @@ DEVICE_DEFINE(i2c_1, CONFIG_I2C_1_NAME, &i2c_qmsi_init,
 
 #endif /* CONFIG_I2C_1 */
 
-static int i2c_qmsi_configure(struct device *dev, uint32_t config)
+static int i2c_qmsi_configure(struct device *dev, u32_t config)
 {
 	qm_i2c_t instance = GET_CONTROLLER_INSTANCE(dev);
 	struct i2c_qmsi_driver_data *driver_data = GET_DRIVER_DATA(dev);
@@ -185,7 +185,7 @@ static int i2c_qmsi_configure(struct device *dev, uint32_t config)
 }
 
 static void transfer_complete(void *data, int rc, qm_i2c_status_t status,
-			 uint32_t len)
+			 u32_t len)
 {
 	struct device *dev = (struct device *) data;
 	struct i2c_qmsi_driver_data *driver_data;
@@ -196,7 +196,7 @@ static void transfer_complete(void *data, int rc, qm_i2c_status_t status,
 }
 
 static int i2c_qmsi_transfer(struct device *dev, struct i2c_msg *msgs,
-			     uint8_t num_msgs, uint16_t addr)
+			     u8_t num_msgs, u16_t addr)
 {
 	struct i2c_qmsi_driver_data *driver_data = GET_DRIVER_DATA(dev);
 	qm_i2c_t instance = GET_CONTROLLER_INSTANCE(dev);
@@ -210,7 +210,7 @@ static int i2c_qmsi_transfer(struct device *dev, struct i2c_msg *msgs,
 	device_busy_set(dev);
 
 	for (int i = 0; i < num_msgs; i++) {
-		uint8_t op =  msgs[i].flags & I2C_MSG_RW_MASK;
+		u8_t op =  msgs[i].flags & I2C_MSG_RW_MASK;
 		bool stop = (msgs[i].flags & I2C_MSG_STOP) == I2C_MSG_STOP;
 		qm_i2c_transfer_t xfer = { 0 };
 		if (op == I2C_MSG_WRITE) {
diff --git a/drivers/i2c/i2c_qmsi_ss.c b/drivers/i2c/i2c_qmsi_ss.c
index 5c750d3f09c..8f85a75b3af 100644
--- a/drivers/i2c/i2c_qmsi_ss.c
+++ b/drivers/i2c/i2c_qmsi_ss.c
@@ -31,21 +31,21 @@ struct i2c_qmsi_ss_driver_data {
 	int transfer_status;
 	struct k_sem sem;
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
-	uint32_t device_power_state;
+	u32_t device_power_state;
 	qm_ss_i2c_context_t i2c_ctx;
 #endif
 };
 
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
 static void ss_i2c_qmsi_set_power_state(struct device *dev,
-					uint32_t power_state)
+					u32_t power_state)
 {
 	struct i2c_qmsi_ss_driver_data *drv_data = GET_DRIVER_DATA(dev);
 
 	drv_data->device_power_state = power_state;
 }
 
-static uint32_t ss_i2c_qmsi_get_power_state(struct device *dev)
+static u32_t ss_i2c_qmsi_get_power_state(struct device *dev)
 {
 	struct i2c_qmsi_ss_driver_data *drv_data = GET_DRIVER_DATA(dev);
 
@@ -84,17 +84,17 @@ static int ss_i2c_resume_device_from_suspend(struct device *dev)
 * Implements the driver control management functionality
 * the *context may include IN data or/and OUT data
 */
-static int ss_i2c_device_ctrl(struct device *dev, uint32_t ctrl_command,
+static int ss_i2c_device_ctrl(struct device *dev, u32_t ctrl_command,
 			      void *context)
 {
 	if (ctrl_command == DEVICE_PM_SET_POWER_STATE) {
-		if (*((uint32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
+		if (*((u32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
 			return ss_i2c_suspend_device(dev);
-		} else if (*((uint32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
+		} else if (*((u32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
 			return ss_i2c_resume_device_from_suspend(dev);
 		}
 	} else if (ctrl_command == DEVICE_PM_GET_POWER_STATE) {
-		*((uint32_t *)context) = ss_i2c_qmsi_get_power_state(dev);
+		*((u32_t *)context) = ss_i2c_qmsi_get_power_state(dev);
 	}
 
 	return 0;
@@ -123,7 +123,7 @@ DEVICE_DEFINE(i2c_ss_0, CONFIG_I2C_SS_0_NAME, i2c_qmsi_ss_init,
 
 static void i2c_qmsi_ss_config_irq_0(void)
 {
-	uint32_t mask = 0;
+	u32_t mask = 0;
 
 	/* Need to unmask the interrupts in System Control Subsystem (SCSS)
 	 * so the interrupt controller can route these interrupts to
@@ -180,7 +180,7 @@ DEVICE_DEFINE(i2c_ss_1, CONFIG_I2C_SS_1_NAME, i2c_qmsi_ss_init,
 
 static void i2c_qmsi_ss_config_irq_1(void)
 {
-	uint32_t mask = 0;
+	u32_t mask = 0;
 
 	/* Need to unmask the interrupts in System Control Subsystem (SCSS)
 	 * so the interrupt controller can route these interrupts to
@@ -225,7 +225,7 @@ static int i2c_qmsi_ss_configure(struct device *dev, uint32_t config)
 	struct i2c_qmsi_ss_driver_data *driver_data = GET_DRIVER_DATA(dev);
 	union dev_config cfg;
 	qm_ss_i2c_config_t qm_cfg;
-	uint32_t i2c_base = QM_SS_I2C_0_BASE;
+	u32_t i2c_base = QM_SS_I2C_0_BASE;
 
 	cfg.raw = config;
 
@@ -281,7 +281,7 @@ static void transfer_complete(void *data, int rc, qm_ss_i2c_status_t status,
 }
 
 static int i2c_qmsi_ss_transfer(struct device *dev, struct i2c_msg *msgs,
-			     uint8_t num_msgs, uint16_t addr)
+			     u8_t num_msgs, u16_t addr)
 {
 	struct i2c_qmsi_ss_driver_data *driver_data = GET_DRIVER_DATA(dev);
 	qm_ss_i2c_t instance = GET_CONTROLLER_INSTANCE(dev);
@@ -295,9 +295,9 @@ static int i2c_qmsi_ss_transfer(struct device *dev, struct i2c_msg *msgs,
 	device_busy_set(dev);
 
 	for (int i = 0; i < num_msgs; i++) {
-		uint8_t *buf = msgs[i].buf;
-		uint32_t len = msgs[i].len;
-		uint8_t op =  msgs[i].flags & I2C_MSG_RW_MASK;
+		u8_t *buf = msgs[i].buf;
+		u32_t len = msgs[i].len;
+		u8_t op =  msgs[i].flags & I2C_MSG_RW_MASK;
 		bool stop = (msgs[i].flags & I2C_MSG_STOP) == I2C_MSG_STOP;
 		qm_ss_i2c_transfer_t xfer = { 0 };
 
diff --git a/drivers/i2c/i2c_stm32lx.c b/drivers/i2c/i2c_stm32lx.c
index a1283f1c545..0dd4eb4f9fe 100644
--- a/drivers/i2c/i2c_stm32lx.c
+++ b/drivers/i2c/i2c_stm32lx.c
@@ -28,15 +28,15 @@
 #define I2C_STRUCT(dev)							\
 	((volatile struct i2c_stm32lx *)(DEV_CFG(dev))->base)
 
-static int i2c_stm32lx_runtime_configure(struct device *dev, uint32_t config)
+static int i2c_stm32lx_runtime_configure(struct device *dev, u32_t config)
 {
 	volatile struct i2c_stm32lx *i2c = I2C_STRUCT(dev);
 	struct i2c_stm32lx_data *data = DEV_DATA(dev);
 	const struct i2c_stm32lx_config *cfg = DEV_CFG(dev);
-	uint32_t clock;
-	uint32_t i2c_h_min_time, i2c_l_min_time;
-	uint32_t i2c_hold_time_min, i2c_setup_time_min;
-	uint32_t presc = 1;
+	u32_t clock;
+	u32_t i2c_h_min_time, i2c_l_min_time;
+	u32_t i2c_hold_time_min, i2c_setup_time_min;
+	u32_t presc = 1;
 
 	data->dev_config.raw = config;
 
@@ -70,12 +70,12 @@ static int i2c_stm32lx_runtime_configure(struct device *dev, uint32_t config)
 
 	/* Calculate period until prescaler matches */
 	do {
-		uint32_t t_presc = clock / presc;
-		uint32_t ns_presc = NSEC_PER_SEC / t_presc;
-		uint32_t sclh = i2c_h_min_time / ns_presc;
-		uint32_t scll = i2c_l_min_time / ns_presc;
-		uint32_t sdadel = i2c_hold_time_min / ns_presc;
-		uint32_t scldel = i2c_setup_time_min / ns_presc;
+		u32_t t_presc = clock / presc;
+		u32_t ns_presc = NSEC_PER_SEC / t_presc;
+		u32_t sclh = i2c_h_min_time / ns_presc;
+		u32_t scll = i2c_l_min_time / ns_presc;
+		u32_t sdadel = i2c_hold_time_min / ns_presc;
+		u32_t scldel = i2c_setup_time_min / ns_presc;
 
 		if ((sclh - 1) > 255 ||
 		    (scll - 1) > 255 ||
@@ -163,7 +163,7 @@ static void i2c_stm32lx_er_isr(void *arg)
 }
 #endif
 
-static inline void transfer_setup(struct device *dev, uint16_t slave_address,
+static inline void transfer_setup(struct device *dev, u16_t slave_address,
 				  unsigned int read_transfer)
 {
 	volatile struct i2c_stm32lx *i2c = I2C_STRUCT(dev);
@@ -186,7 +186,7 @@ static inline int msg_write(struct device *dev, struct i2c_msg *msg,
 	struct i2c_stm32lx_data *data = DEV_DATA(dev);
 #endif
 	unsigned int len = msg->len;
-	uint8_t *buf = msg->buf;
+	u8_t *buf = msg->buf;
 
 	if (len > 255)
 		return -EINVAL;
@@ -272,7 +272,7 @@ static inline int msg_read(struct device *dev, struct i2c_msg *msg,
 	struct i2c_stm32lx_data *data = DEV_DATA(dev);
 #endif
 	unsigned int len = msg->len;
-	uint8_t *buf = msg->buf;
+	u8_t *buf = msg->buf;
 
 	if (len > 255)
 		return -EINVAL;
@@ -336,12 +336,12 @@ static inline int msg_read(struct device *dev, struct i2c_msg *msg,
 }
 
 static int i2c_stm32lx_transfer(struct device *dev,
-				struct i2c_msg *msgs, uint8_t num_msgs,
-				uint16_t slave_address)
+				struct i2c_msg *msgs, u8_t num_msgs,
+				u16_t slave_address)
 {
 	volatile struct i2c_stm32lx *i2c = I2C_STRUCT(dev);
 	struct i2c_msg *cur_msg = msgs;
-	uint8_t msg_left = num_msgs;
+	u8_t msg_left = num_msgs;
 	int ret = 0;
 
 	/* Enable Peripheral */
@@ -439,7 +439,7 @@ static void i2c_stm32lx_irq_config_func_1(struct device *port);
 #endif
 
 static const struct i2c_stm32lx_config i2c_stm32lx_cfg_1 = {
-	.base = (uint8_t *)I2C1_BASE,
+	.base = (u8_t *)I2C1_BASE,
 	.pclken = { .bus = STM32_CLOCK_BUS_APB1,
 		    .enr = LL_APB1_GRP1_PERIPH_I2C1 },
 #ifdef CONFIG_I2C_STM32LX_INTERRUPT
@@ -483,7 +483,7 @@ static void i2c_stm32lx_irq_config_func_2(struct device *port);
 #endif
 
 static const struct i2c_stm32lx_config i2c_stm32lx_cfg_2 = {
-	.base = (uint8_t *)I2C2_BASE,
+	.base = (u8_t *)I2C2_BASE,
 	.pclken = { .bus = STM32_CLOCK_BUS_APB1,
 		    .enr = LL_APB1_GRP1_PERIPH_I2C2 },
 #ifdef CONFIG_I2C_STM32LX_INTERRUPT
diff --git a/drivers/i2c/i2c_stm32lx.h b/drivers/i2c/i2c_stm32lx.h
index daeb773a4ef..5744187bc0d 100644
--- a/drivers/i2c/i2c_stm32lx.h
+++ b/drivers/i2c/i2c_stm32lx.h
@@ -9,156 +9,156 @@
 
 /* 35.6.1 Control register 1 (I2C_CR1) */
 union __cr1 {
-	uint32_t val;
+	u32_t val;
 	struct {
-		uint32_t pe :1 __packed;
-		uint32_t txie :1 __packed;
-		uint32_t rxie :1 __packed;
-		uint32_t addrie :1 __packed;
-		uint32_t nackie :1 __packed;
-		uint32_t stopie :1 __packed;
-		uint32_t tcie :1 __packed;
-		uint32_t errie :1 __packed;
-		uint32_t dnf :4 __packed;
-		uint32_t anfoff :1 __packed;
-		uint32_t rsvd__13 :1 __packed;
-		uint32_t txdmaen :1 __packed;
-		uint32_t rxdmaen :1 __packed;
-		uint32_t sbc :1 __packed;
-		uint32_t nostretch :1 __packed;
-		uint32_t wupen :1 __packed;
-		uint32_t gcen :1 __packed;
-		uint32_t smbhen :1 __packed;
-		uint32_t smbden :1 __packed;
-		uint32_t alerten :1 __packed;
-		uint32_t pecen :1 __packed;
-		uint32_t rsvd__24_31 :8 __packed;
+		u32_t pe :1 __packed;
+		u32_t txie :1 __packed;
+		u32_t rxie :1 __packed;
+		u32_t addrie :1 __packed;
+		u32_t nackie :1 __packed;
+		u32_t stopie :1 __packed;
+		u32_t tcie :1 __packed;
+		u32_t errie :1 __packed;
+		u32_t dnf :4 __packed;
+		u32_t anfoff :1 __packed;
+		u32_t rsvd__13 :1 __packed;
+		u32_t txdmaen :1 __packed;
+		u32_t rxdmaen :1 __packed;
+		u32_t sbc :1 __packed;
+		u32_t nostretch :1 __packed;
+		u32_t wupen :1 __packed;
+		u32_t gcen :1 __packed;
+		u32_t smbhen :1 __packed;
+		u32_t smbden :1 __packed;
+		u32_t alerten :1 __packed;
+		u32_t pecen :1 __packed;
+		u32_t rsvd__24_31 :8 __packed;
 	} bit;
 };
 
 /* 35.6.2 Control register 2 (I2C_CR2) */
 union __cr2 {
-	uint32_t val;
+	u32_t val;
 	struct {
-		uint32_t sadd :10 __packed;
-		uint32_t rd_wrn :1 __packed;
-		uint32_t add10 :1 __packed;
-		uint32_t head10r :1 __packed;
-		uint32_t start :1 __packed;
-		uint32_t stop :1 __packed;
-		uint32_t nack :1 __packed;
-		uint32_t nbytes :8 __packed;
-		uint32_t reload :1 __packed;
-		uint32_t autoend :1 __packed;
-		uint32_t pecbyte :1 __packed;
-		uint32_t rsvd__27_31 :5 __packed;
+		u32_t sadd :10 __packed;
+		u32_t rd_wrn :1 __packed;
+		u32_t add10 :1 __packed;
+		u32_t head10r :1 __packed;
+		u32_t start :1 __packed;
+		u32_t stop :1 __packed;
+		u32_t nack :1 __packed;
+		u32_t nbytes :8 __packed;
+		u32_t reload :1 __packed;
+		u32_t autoend :1 __packed;
+		u32_t pecbyte :1 __packed;
+		u32_t rsvd__27_31 :5 __packed;
 	} bit;
 };
 
 union __oar1 {
-	uint32_t val;
+	u32_t val;
 	struct {
-		uint32_t oa1 :10 __packed;
-		uint32_t oa1mode :1 __packed;
-		uint32_t rsvd__11_14 :4 __packed;
-		uint32_t oa1en :1 __packed;
-		uint32_t rsvd__16_31 :16 __packed;
+		u32_t oa1 :10 __packed;
+		u32_t oa1mode :1 __packed;
+		u32_t rsvd__11_14 :4 __packed;
+		u32_t oa1en :1 __packed;
+		u32_t rsvd__16_31 :16 __packed;
 	} bit;
 };
 
 union __oar2 {
-	uint32_t val;
+	u32_t val;
 	struct {
-		uint32_t rsvd__0 :1 __packed;
-		uint32_t oa2 :7 __packed;
-		uint32_t oa2msk :3 __packed;
-		uint32_t rsvd__11_14 :4 __packed;
-		uint32_t oa2en :1 __packed;
-		uint32_t rsvd__16_31 :16 __packed;
+		u32_t rsvd__0 :1 __packed;
+		u32_t oa2 :7 __packed;
+		u32_t oa2msk :3 __packed;
+		u32_t rsvd__11_14 :4 __packed;
+		u32_t oa2en :1 __packed;
+		u32_t rsvd__16_31 :16 __packed;
 	} bit;
 };
 
 union __timingr {
-	uint32_t val;
+	u32_t val;
 	struct {
-		uint32_t scll :8 __packed;
-		uint32_t sclh :8 __packed;
-		uint32_t sdadel :4 __packed;
-		uint32_t scldel :4 __packed;
-		uint32_t rsvd__24_27 :4 __packed;
-		uint32_t presc :4 __packed;
+		u32_t scll :8 __packed;
+		u32_t sclh :8 __packed;
+		u32_t sdadel :4 __packed;
+		u32_t scldel :4 __packed;
+		u32_t rsvd__24_27 :4 __packed;
+		u32_t presc :4 __packed;
 	} bit;
 };
 
 union __timeoutr {
-	uint32_t val;
+	u32_t val;
 	struct {
-		uint32_t timeouta :12 __packed;
-		uint32_t tidle :1 __packed;
-		uint32_t rsvd__13_14 :1 __packed;
-		uint32_t timouten :1 __packed;
-		uint32_t timeoutb :12 __packed;
-		uint32_t rsvd__28_30 :1 __packed;
-		uint32_t texten :1 __packed;
+		u32_t timeouta :12 __packed;
+		u32_t tidle :1 __packed;
+		u32_t rsvd__13_14 :1 __packed;
+		u32_t timouten :1 __packed;
+		u32_t timeoutb :12 __packed;
+		u32_t rsvd__28_30 :1 __packed;
+		u32_t texten :1 __packed;
 	} bit;
 };
 
 union __isr {
-	uint32_t val;
+	u32_t val;
 	struct {
-		uint32_t txe :1 __packed;
-		uint32_t txis :1 __packed;
-		uint32_t rxne :1 __packed;
-		uint32_t addr :1 __packed;
-		uint32_t nackf :1 __packed;
-		uint32_t stopf :1 __packed;
-		uint32_t tc :1 __packed;
-		uint32_t tcr :1 __packed;
-		uint32_t berr :1 __packed;
-		uint32_t arlo :1 __packed;
-		uint32_t ovr :1 __packed;
-		uint32_t pecerr :1 __packed;
-		uint32_t timeout :1 __packed;
-		uint32_t alert :1 __packed;
-		uint32_t rsvd__14 :1 __packed;
-		uint32_t busy :1 __packed;
-		uint32_t dir :1 __packed;
-		uint32_t addcode :7 __packed;
-		uint32_t rsvd__24_31 :8 __packed;
+		u32_t txe :1 __packed;
+		u32_t txis :1 __packed;
+		u32_t rxne :1 __packed;
+		u32_t addr :1 __packed;
+		u32_t nackf :1 __packed;
+		u32_t stopf :1 __packed;
+		u32_t tc :1 __packed;
+		u32_t tcr :1 __packed;
+		u32_t berr :1 __packed;
+		u32_t arlo :1 __packed;
+		u32_t ovr :1 __packed;
+		u32_t pecerr :1 __packed;
+		u32_t timeout :1 __packed;
+		u32_t alert :1 __packed;
+		u32_t rsvd__14 :1 __packed;
+		u32_t busy :1 __packed;
+		u32_t dir :1 __packed;
+		u32_t addcode :7 __packed;
+		u32_t rsvd__24_31 :8 __packed;
 	} bit;
 };
 
 union __icr {
-	uint32_t val;
+	u32_t val;
 	struct {
-		uint32_t rsvd__0_2 :3 __packed;
-		uint32_t addr :1 __packed;
-		uint32_t nack :1 __packed;
-		uint32_t stop :1 __packed;
-		uint32_t rsvd__6_7 :2 __packed;
-		uint32_t berr :1 __packed;
-		uint32_t arlo :1 __packed;
-		uint32_t ovr :1 __packed;
-		uint32_t pec :1 __packed;
-		uint32_t timeout :1 __packed;
-		uint32_t alert :1 __packed;
-		uint32_t rsvd__14_31 :17 __packed;
+		u32_t rsvd__0_2 :3 __packed;
+		u32_t addr :1 __packed;
+		u32_t nack :1 __packed;
+		u32_t stop :1 __packed;
+		u32_t rsvd__6_7 :2 __packed;
+		u32_t berr :1 __packed;
+		u32_t arlo :1 __packed;
+		u32_t ovr :1 __packed;
+		u32_t pec :1 __packed;
+		u32_t timeout :1 __packed;
+		u32_t alert :1 __packed;
+		u32_t rsvd__14_31 :17 __packed;
 	} bit;
 };
 
 union __pecr {
-	uint32_t val;
+	u32_t val;
 	struct {
-		uint32_t pec:8 __packed;
-		uint32_t rsvd__9_31 :24 __packed;
+		u32_t pec:8 __packed;
+		u32_t rsvd__9_31 :24 __packed;
 	} bit;
 };
 
 union __dr {
-	uint32_t val;
+	u32_t val;
 	struct {
-		uint32_t data:8 __packed;
-		uint32_t rsvd__9_31 :24 __packed;
+		u32_t data:8 __packed;
+		u32_t rsvd__9_31 :24 __packed;
 	} bit;
 };
 
@@ -174,7 +174,7 @@ struct i2c_stm32lx {
 	union __icr icr;
 	union __pecr pecr;
 	union __dr rxdr;
-	uint32_t txdr;
+	u32_t txdr;
 };
 
 typedef void (*irq_config_func_t)(struct device *port);
@@ -199,7 +199,7 @@ struct i2c_stm32lx_data {
 	struct {
 		struct i2c_msg *msg;
 		unsigned int len;
-		uint8_t *buf;
+		u8_t *buf;
 		unsigned int is_err;
 		unsigned int is_nack;
 		unsigned int is_write;
diff --git a/drivers/i2c/twihs_sam.c b/drivers/i2c/twihs_sam.c
index 71ab7b22ae1..2706c631874 100644
--- a/drivers/i2c/twihs_sam.c
+++ b/drivers/i2c/twihs_sam.c
@@ -32,23 +32,23 @@
 struct twihs_sam_dev_cfg {
 	Twihs *regs;
 	void (*irq_config)(void);
-	uint8_t periph_id;
-	uint8_t irq_id;
+	u8_t periph_id;
+	u8_t irq_id;
 	const struct soc_gpio_pin *pin_list;
-	uint8_t pin_list_size;
+	u8_t pin_list_size;
 };
 
 struct twihs_msg {
 	/* Buffer containing data to read or write */
-	uint8_t *buf;
+	u8_t *buf;
 	/* Length of the buffer */
-	uint32_t len;
+	u32_t len;
 	/* Index of the next byte to be read/written from/to the buffer */
-	uint32_t idx;
+	u32_t idx;
 	/* Value of TWIHS_SR at the end of the message */
-	uint32_t twihs_sr;
+	u32_t twihs_sr;
 	/* Transfer flags as defined in the i2c.h file */
-	uint8_t flags;
+	u8_t flags;
 };
 
 /* Device run time data */
@@ -63,11 +63,11 @@ struct twihs_sam_dev_data {
 #define DEV_DATA(dev) \
 	((struct twihs_sam_dev_data *const)(dev)->driver_data)
 
-static uint32_t clk_div_calc(uint32_t speed)
+static u32_t clk_div_calc(u32_t speed)
 {
-	uint32_t ck_div = 0;
-	uint32_t cl_div;
-	uint32_t div_completed = 0;
+	u32_t ck_div = 0;
+	u32_t cl_div;
+	u32_t div_completed = 0;
 
 	while (!div_completed) {
 		cl_div =   ((SOC_ATMEL_SAM_MCK_FREQ_HZ / (2 * speed)) - 4)
@@ -84,13 +84,13 @@ static uint32_t clk_div_calc(uint32_t speed)
 	return (ck_div << 16) | (cl_div << 8) | cl_div;
 }
 
-static int twihs_sam_configure(struct device *dev, uint32_t config)
+static int twihs_sam_configure(struct device *dev, u32_t config)
 {
 	const struct twihs_sam_dev_cfg *const dev_cfg = DEV_CFG(dev);
 	struct twihs_sam_dev_data *const dev_data = DEV_DATA(dev);
 	Twihs *const twihs = dev_cfg->regs;
-	uint32_t i2c_speed;
-	uint32_t clk;
+	u32_t i2c_speed;
+	u32_t clk;
 
 	if (!(config & (I2C_MODE_MASTER | I2C_MODE_SLAVE_READ))) {
 		SYS_LOG_ERR("Neither Master nor Slave I2C Mode is enabled");
@@ -137,7 +137,7 @@ static int twihs_sam_configure(struct device *dev, uint32_t config)
 }
 
 static void write_msg_start(Twihs *const twihs, struct twihs_msg *msg,
-			    uint8_t daddr)
+			    u8_t daddr)
 {
 	/* Set slave address and number of internal address bytes. */
 	twihs->TWIHS_MMR = TWIHS_MMR_DADR(daddr);
@@ -151,9 +151,9 @@ static void write_msg_start(Twihs *const twihs, struct twihs_msg *msg,
 }
 
 static void read_msg_start(Twihs *const twihs, struct twihs_msg *msg,
-			   uint8_t daddr)
+			   u8_t daddr)
 {
-	uint32_t twihs_cr_stop;
+	u32_t twihs_cr_stop;
 
 	/* Set slave address and number of internal address bytes */
 	twihs->TWIHS_MMR = TWIHS_MMR_MREAD | TWIHS_MMR_DADR(daddr);
@@ -170,7 +170,7 @@ static void read_msg_start(Twihs *const twihs, struct twihs_msg *msg,
 }
 
 static int twihs_sam_transfer(struct device *dev, struct i2c_msg *msgs,
-			      uint8_t num_msgs, uint16_t addr)
+			      u8_t num_msgs, u16_t addr)
 {
 	const struct twihs_sam_dev_cfg *const dev_cfg = DEV_CFG(dev);
 	struct twihs_sam_dev_data *const dev_data = DEV_DATA(dev);
@@ -212,7 +212,7 @@ static void twihs_sam_isr(void *arg)
 	struct twihs_sam_dev_data *const dev_data = DEV_DATA(dev);
 	Twihs *const twihs = dev_cfg->regs;
 	struct twihs_msg *msg = &dev_data->msg;
-	uint32_t isr_status;
+	u32_t isr_status;
 
 	/* Retrieve interrupt status */
 	isr_status = twihs->TWIHS_SR & twihs->TWIHS_IMR;
diff --git a/drivers/interrupt_controller/arcv2_irq_unit.c b/drivers/interrupt_controller/arcv2_irq_unit.c
index f5917879ca9..7a32497f984 100644
--- a/drivers/interrupt_controller/arcv2_irq_unit.c
+++ b/drivers/interrupt_controller/arcv2_irq_unit.c
@@ -28,11 +28,11 @@ extern void *_VectorTable;
 #include <kernel_structs.h>
 #include <v2/irq.h>
 
-static uint32_t _arc_v2_irq_unit_device_power_state = DEVICE_PM_ACTIVE_STATE;
-uint32_t _saved_firq_stack;
+static u32_t _arc_v2_irq_unit_device_power_state = DEVICE_PM_ACTIVE_STATE;
+u32_t _saved_firq_stack;
 struct arc_v2_irq_unit_ctx {
-	uint32_t irq_ctrl; /* Interrupt Context Saving Control Register. */
-	uint32_t irq_vect_base; /* Interrupt Vector Base. */
+	u32_t irq_ctrl; /* Interrupt Context Saving Control Register. */
+	u32_t irq_vect_base; /* Interrupt Vector Base. */
 
 	/*
 	 * IRQ configuration:
@@ -40,7 +40,7 @@ struct arc_v2_irq_unit_ctx {
 	 * - IRQ Trigger:BIT(1)
 	 * - IRQ Enable:BIT(0)
 	 */
-	uint8_t irq_config[CONFIG_NUM_IRQS - 16];
+	u8_t irq_config[CONFIG_NUM_IRQS - 16];
 };
 static struct arc_v2_irq_unit_ctx ctx;
 #endif
@@ -102,7 +102,7 @@ extern void _firq_stack_resume(void);
 
 static int _arc_v2_irq_unit_suspend(struct device *dev)
 {
-	uint8_t irq;
+	u8_t irq;
 
 	ARG_UNUSED(dev);
 
@@ -132,8 +132,8 @@ static int _arc_v2_irq_unit_suspend(struct device *dev)
 
 static int _arc_v2_irq_unit_resume(struct device *dev)
 {
-	uint8_t irq;
-	uint32_t status32;
+	u8_t irq;
+	u32_t status32;
 
 	ARG_UNUSED(dev);
 
@@ -178,16 +178,16 @@ static int _arc_v2_irq_unit_get_state(struct device *dev)
  * the *context may include IN data or/and OUT data
  */
 static int _arc_v2_irq_unit_device_ctrl(struct device *device,
-		uint32_t ctrl_command, void *context)
+		u32_t ctrl_command, void *context)
 {
 	if (ctrl_command == DEVICE_PM_SET_POWER_STATE) {
-		if (*((uint32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
+		if (*((u32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
 			return _arc_v2_irq_unit_suspend(device);
-		} else if (*((uint32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
+		} else if (*((u32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
 			return _arc_v2_irq_unit_resume(device);
 		}
 	} else if (ctrl_command == DEVICE_PM_GET_POWER_STATE) {
-		*((uint32_t *)context) = _arc_v2_irq_unit_get_state(device);
+		*((u32_t *)context) = _arc_v2_irq_unit_get_state(device);
 		return 0;
 	}
 	return 0;
diff --git a/drivers/interrupt_controller/exti_stm32.c b/drivers/interrupt_controller/exti_stm32.c
index 86a14c5f097..969eb0ec2f4 100644
--- a/drivers/interrupt_controller/exti_stm32.c
+++ b/drivers/interrupt_controller/exti_stm32.c
@@ -38,17 +38,17 @@
 /* 10.3.7 EXTI register map */
 struct stm32_exti {
 	/* EXTI_IMR */
-	uint32_t imr;
+	u32_t imr;
 	/* EXTI_EMR */
-	uint32_t emr;
+	u32_t emr;
 	/* EXTI_RTSR */
-	uint32_t rtsr;
+	u32_t rtsr;
 	/* EXTI_FTSR */
-	uint32_t ftsr;
+	u32_t ftsr;
 	/* EXTI_SWIER */
-	uint32_t swier;
+	u32_t swier;
 	/* EXTI_PR */
-	uint32_t pr;
+	u32_t pr;
 };
 
 /* wrapper for user callback */
diff --git a/drivers/interrupt_controller/ioapic_intr.c b/drivers/interrupt_controller/ioapic_intr.c
index e1b511f6ab9..ce941161c74 100644
--- a/drivers/interrupt_controller/ioapic_intr.c
+++ b/drivers/interrupt_controller/ioapic_intr.c
@@ -73,17 +73,17 @@
 
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
 #include <power.h>
-uint32_t ioapic_suspend_buf[SUSPEND_BITS_REQD / 32] = {0};
-static uint32_t ioapic_device_power_state = DEVICE_PM_ACTIVE_STATE;
+u32_t ioapic_suspend_buf[SUSPEND_BITS_REQD / 32] = {0};
+static u32_t ioapic_device_power_state = DEVICE_PM_ACTIVE_STATE;
 #endif
 
-static uint32_t __IoApicGet(int32_t offset);
-static void __IoApicSet(int32_t offset, uint32_t value);
-static void ioApicRedSetHi(unsigned int irq, uint32_t upper32);
-static void ioApicRedSetLo(unsigned int irq, uint32_t lower32);
-static uint32_t ioApicRedGetLo(unsigned int irq);
-static void _IoApicRedUpdateLo(unsigned int irq, uint32_t value,
-					uint32_t mask);
+static u32_t __IoApicGet(s32_t offset);
+static void __IoApicSet(s32_t offset, u32_t value);
+static void ioApicRedSetHi(unsigned int irq, u32_t upper32);
+static void ioApicRedSetLo(unsigned int irq, u32_t lower32);
+static u32_t ioApicRedGetLo(unsigned int irq);
+static void _IoApicRedUpdateLo(unsigned int irq, u32_t value,
+					u32_t mask);
 
 /*
  * The functions irq_enable() and irq_disable() are implemented in the
@@ -103,8 +103,8 @@ int _ioapic_init(struct device *unused)
 {
 	ARG_UNUSED(unused);
 #ifdef CONFIG_IOAPIC_MASK_RTE
-	int32_t ix;	/* redirection table index */
-	uint32_t rteValue; /* value to copy into redirection table entry */
+	s32_t ix;	/* redirection table index */
+	u32_t rteValue; /* value to copy into redirection table entry */
 
 	/*
 	 * The platform must set the Kconfig option IOAPIC_NUM_RTES to indicate
@@ -157,7 +157,7 @@ void _ioapic_irq_disable(unsigned int irq)
 
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
 
-void store_flags(unsigned int irq, uint32_t flags)
+void store_flags(unsigned int irq, u32_t flags)
 {
 	/* Currently only the following three flags are modified */
 	if (flags & IOAPIC_LOW) {
@@ -176,9 +176,9 @@ void store_flags(unsigned int irq, uint32_t flags)
 	}
 }
 
-uint32_t restore_flags(unsigned int irq)
+u32_t restore_flags(unsigned int irq)
 {
-	uint32_t flags = 0;
+	u32_t flags = 0;
 
 	if (sys_bitfield_test_bit((mem_addr_t) ioapic_suspend_buf,
 		BIT_POS_FOR_IRQ_OPTION(irq, IOAPIC_BITFIELD_HI_LO))) {
@@ -202,7 +202,7 @@ uint32_t restore_flags(unsigned int irq)
 int ioapic_suspend(struct device *port)
 {
 	int irq;
-	uint32_t rte_lo;
+	u32_t rte_lo;
 
 	ARG_UNUSED(port);
 	memset(ioapic_suspend_buf, 0, (SUSPEND_BITS_REQD >> 3));
@@ -224,8 +224,8 @@ int ioapic_suspend(struct device *port)
 int ioapic_resume_from_suspend(struct device *port)
 {
 	int irq;
-	uint32_t flags;
-	uint32_t rteValue;
+	u32_t flags;
+	u32_t rteValue;
 
 	ARG_UNUSED(port);
 
@@ -255,17 +255,17 @@ int ioapic_resume_from_suspend(struct device *port)
 * Implements the driver control management functionality
 * the *context may include IN data or/and OUT data
 */
-static int ioapic_device_ctrl(struct device *device, uint32_t ctrl_command,
+static int ioapic_device_ctrl(struct device *device, u32_t ctrl_command,
 			      void *context)
 {
 	if (ctrl_command == DEVICE_PM_SET_POWER_STATE) {
-		if (*((uint32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
+		if (*((u32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
 			return ioapic_suspend(device);
-		} else if (*((uint32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
+		} else if (*((u32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
 			return ioapic_resume_from_suspend(device);
 		}
 	} else if (ctrl_command == DEVICE_PM_GET_POWER_STATE) {
-		*((uint32_t *)context) = ioapic_device_power_state;
+		*((u32_t *)context) = ioapic_device_power_state;
 		return 0;
 	}
 	return 0;
@@ -285,9 +285,9 @@ static int ioapic_device_ctrl(struct device *device, uint32_t ctrl_command,
  *
  * @return N/A
  */
-void _ioapic_irq_set(unsigned int irq, unsigned int vector, uint32_t flags)
+void _ioapic_irq_set(unsigned int irq, unsigned int vector, u32_t flags)
 {
-	uint32_t rteValue;   /* value to copy into redirection table entry */
+	u32_t rteValue;   /* value to copy into redirection table entry */
 
 	rteValue = IOAPIC_FIXED | IOAPIC_INT_MASK | IOAPIC_PHYSICAL |
 		   (vector & IOAPIC_VEC_MASK) | flags;
@@ -320,9 +320,9 @@ void _ioapic_int_vec_set(unsigned int irq, unsigned int vector)
  *
  * @return register value
  */
-static uint32_t __IoApicGet(int32_t offset)
+static u32_t __IoApicGet(s32_t offset)
 {
-	uint32_t value; /* value */
+	u32_t value; /* value */
 	int key;	/* interrupt lock level */
 
 	/* lock interrupts to ensure indirect addressing works "atomically" */
@@ -331,7 +331,7 @@ static uint32_t __IoApicGet(int32_t offset)
 
 	*((volatile char *)
 		(CONFIG_IOAPIC_BASE_ADDRESS + IOAPIC_IND)) = (char)offset;
-	value = *((volatile uint32_t *)(CONFIG_IOAPIC_BASE_ADDRESS + IOAPIC_DATA));
+	value = *((volatile u32_t *)(CONFIG_IOAPIC_BASE_ADDRESS + IOAPIC_DATA));
 
 	irq_unlock(key);
 
@@ -348,7 +348,7 @@ static uint32_t __IoApicGet(int32_t offset)
  * @param value Value to set the register
  * @return N/A
  */
-static void __IoApicSet(int32_t offset, uint32_t value)
+static void __IoApicSet(s32_t offset, u32_t value)
 {
 	int key; /* interrupt lock level */
 
@@ -357,7 +357,7 @@ static void __IoApicSet(int32_t offset, uint32_t value)
 	key = irq_lock();
 
 	*(volatile char *)(CONFIG_IOAPIC_BASE_ADDRESS + IOAPIC_IND) = (char)offset;
-	*((volatile uint32_t *)(CONFIG_IOAPIC_BASE_ADDRESS + IOAPIC_DATA)) = value;
+	*((volatile u32_t *)(CONFIG_IOAPIC_BASE_ADDRESS + IOAPIC_DATA)) = value;
 
 	irq_unlock(key);
 }
@@ -371,9 +371,9 @@ static void __IoApicSet(int32_t offset, uint32_t value)
  * @param irq INTIN number
  * @return 32 low-order bits
  */
-static uint32_t ioApicRedGetLo(unsigned int irq)
+static u32_t ioApicRedGetLo(unsigned int irq)
 {
-	int32_t offset = IOAPIC_REDTBL + (irq << 1); /* register offset */
+	s32_t offset = IOAPIC_REDTBL + (irq << 1); /* register offset */
 
 	return __IoApicGet(offset);
 }
@@ -388,9 +388,9 @@ static uint32_t ioApicRedGetLo(unsigned int irq)
  * @param lower32 Value to be written
  * @return N/A
  */
-static void ioApicRedSetLo(unsigned int irq, uint32_t lower32)
+static void ioApicRedSetLo(unsigned int irq, u32_t lower32)
 {
-	int32_t offset = IOAPIC_REDTBL + (irq << 1); /* register offset */
+	s32_t offset = IOAPIC_REDTBL + (irq << 1); /* register offset */
 
 	__IoApicSet(offset, lower32);
 }
@@ -405,9 +405,9 @@ static void ioApicRedSetLo(unsigned int irq, uint32_t lower32)
  * @param upper32 Value to be written
  * @return N/A
  */
-static void ioApicRedSetHi(unsigned int irq, uint32_t upper32)
+static void ioApicRedSetHi(unsigned int irq, u32_t upper32)
 {
-	int32_t offset = IOAPIC_REDTBL + (irq << 1) + 1; /* register offset */
+	s32_t offset = IOAPIC_REDTBL + (irq << 1) + 1; /* register offset */
 
 	__IoApicSet(offset, upper32);
 }
@@ -425,8 +425,8 @@ static void ioApicRedSetHi(unsigned int irq, uint32_t upper32)
  * @return N/A
  */
 static void _IoApicRedUpdateLo(unsigned int irq,
-				uint32_t value,
-				uint32_t mask)
+				u32_t value,
+				u32_t mask)
 {
 	ioApicRedSetLo(irq, (ioApicRedGetLo(irq) & ~mask) | (value & mask));
 }
diff --git a/drivers/interrupt_controller/loapic_intr.c b/drivers/interrupt_controller/loapic_intr.c
index d2bf8414874..960353f1e3c 100644
--- a/drivers/interrupt_controller/loapic_intr.c
+++ b/drivers/interrupt_controller/loapic_intr.c
@@ -184,8 +184,8 @@
 #define LOPIC_SUSPEND_BITS_REQD (ROUND_UP((LOAPIC_IRQ_COUNT * LOPIC_SSPND_BITS_PER_IRQ), 32))
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
 #include <power.h>
-uint32_t loapic_suspend_buf[LOPIC_SUSPEND_BITS_REQD / 32] = {0};
-static uint32_t loapic_device_power_state = DEVICE_PM_ACTIVE_STATE;
+u32_t loapic_suspend_buf[LOPIC_SUSPEND_BITS_REQD / 32] = {0};
+static u32_t loapic_device_power_state = DEVICE_PM_ACTIVE_STATE;
 #endif
 
 
@@ -202,7 +202,7 @@ static uint32_t loapic_device_power_state = DEVICE_PM_ACTIVE_STATE;
 static int _loapic_init(struct device *unused)
 {
 	ARG_UNUSED(unused);
-	int32_t loApicMaxLvt; /* local APIC Max LVT */
+	s32_t loApicMaxLvt; /* local APIC Max LVT */
 
 	/* enable the Local APIC */
 	sys_write32(sys_read32(CONFIG_LOAPIC_BASE_ADDRESS + LOAPIC_SVR)
@@ -282,7 +282,7 @@ void _loapic_int_vec_set(unsigned int irq, /* IRQ number of the interrupt */
 				  )
 {
 	volatile int *pLvt; /* pointer to local vector table */
-	int32_t oldLevel;   /* previous interrupt lock level */
+	s32_t oldLevel;   /* previous interrupt lock level */
 
 	/*
 	 * The following mappings are used:
@@ -321,7 +321,7 @@ void _loapic_int_vec_set(unsigned int irq, /* IRQ number of the interrupt */
 void _loapic_irq_enable(unsigned int irq)
 {
 	volatile int *pLvt; /* pointer to local vector table */
-	int32_t oldLevel;   /* previous interrupt lock level */
+	s32_t oldLevel;   /* previous interrupt lock level */
 
 	/*
 	 * See the comments in _LoApicLvtVecSet() regarding IRQ to LVT mappings
@@ -352,7 +352,7 @@ void _loapic_irq_enable(unsigned int irq)
 void _loapic_irq_disable(unsigned int irq)
 {
 	volatile int *pLvt; /* pointer to local vector table */
-	int32_t oldLevel;   /* previous interrupt lock level */
+	s32_t oldLevel;   /* previous interrupt lock level */
 
 	/*
 	 * See the comments in _LoApicLvtVecSet() regarding IRQ to LVT mappings
@@ -479,17 +479,17 @@ int loapic_resume(struct device *port)
 * Implements the driver control management functionality
 * the *context may include IN data or/and OUT data
 */
-static int loapic_device_ctrl(struct device *port, uint32_t ctrl_command,
+static int loapic_device_ctrl(struct device *port, u32_t ctrl_command,
 			      void *context)
 {
 	if (ctrl_command == DEVICE_PM_SET_POWER_STATE) {
-		if (*((uint32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
+		if (*((u32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
 			return loapic_suspend(port);
-		} else if (*((uint32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
+		} else if (*((u32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
 			return loapic_resume(port);
 		}
 	} else if (ctrl_command == DEVICE_PM_GET_POWER_STATE) {
-		*((uint32_t *)context) = loapic_device_power_state;
+		*((u32_t *)context) = loapic_device_power_state;
 		return 0;
 	}
 
diff --git a/drivers/interrupt_controller/mvic.c b/drivers/interrupt_controller/mvic.c
index 16c981ecbd5..f41c9fc303a 100644
--- a/drivers/interrupt_controller/mvic.c
+++ b/drivers/interrupt_controller/mvic.c
@@ -40,7 +40,7 @@
 #include <arch/x86/irq_controller.h>
 #include <inttypes.h>
 
-static inline uint32_t compute_ioregsel(unsigned int irq)
+static inline u32_t compute_ioregsel(unsigned int irq)
 {
 	unsigned int low_nibble;
 	unsigned int high_nibble;
@@ -62,10 +62,10 @@ static inline uint32_t compute_ioregsel(unsigned int irq)
  *
  * @returns N/A
  */
-static void _mvic_rte_set(unsigned int irq, uint32_t value)
+static void _mvic_rte_set(unsigned int irq, u32_t value)
 {
 	int key; /* interrupt lock level */
-	uint32_t regsel;
+	u32_t regsel;
 
 	__ASSERT(!(value & ~MVIC_IOWIN_SUPPORTED_BITS_MASK),
 		 "invalid IRQ flags %" PRIx32 " for irq %d", value, irq);
@@ -92,10 +92,10 @@ static void _mvic_rte_set(unsigned int irq, uint32_t value)
  *
  * @returns N/A
  */
-static void _mvic_rte_update(unsigned int irq, uint32_t value, uint32_t mask)
+static void _mvic_rte_update(unsigned int irq, u32_t value, u32_t mask)
 {
 	int key;
-	uint32_t regsel, old_value, updated_value;
+	u32_t regsel, old_value, updated_value;
 
 	__ASSERT(!(value & ~MVIC_IOWIN_SUPPORTED_BITS_MASK),
 		 "invalid IRQ flags %" PRIx32 " for irq %d", value, irq);
@@ -177,7 +177,7 @@ void _arch_irq_disable(unsigned int irq)
 
 
 void __irq_controller_irq_config(unsigned int vector, unsigned int irq,
-				 uint32_t flags)
+				 u32_t flags)
 {
 	ARG_UNUSED(vector);
 
diff --git a/drivers/interrupt_controller/plic_fe310.c b/drivers/interrupt_controller/plic_fe310.c
index ad767b109b0..cf359c016a6 100644
--- a/drivers/interrupt_controller/plic_fe310.c
+++ b/drivers/interrupt_controller/plic_fe310.c
@@ -19,8 +19,8 @@
 #define PLIC_FE310_EN_SIZE     ((PLIC_FE310_IRQS >> 5) + 1)
 
 struct plic_fe310_regs_t {
-	uint32_t threshold_prio;
-	uint32_t claim_complete;
+	u32_t threshold_prio;
+	u32_t claim_complete;
 };
 
 static int save_irq;
@@ -38,12 +38,12 @@ static int save_irq;
  *
  * @return N/A
  */
-void riscv_plic_irq_enable(uint32_t irq)
+void riscv_plic_irq_enable(u32_t irq)
 {
-	uint32_t key;
-	uint32_t fe310_irq = irq - RISCV_MAX_GENERIC_IRQ;
-	volatile uint32_t *en =
-		(volatile uint32_t *)FE310_PLIC_IRQ_EN_BASE_ADDR;
+	u32_t key;
+	u32_t fe310_irq = irq - RISCV_MAX_GENERIC_IRQ;
+	volatile u32_t *en =
+		(volatile u32_t *)FE310_PLIC_IRQ_EN_BASE_ADDR;
 
 	key = irq_lock();
 	en += (fe310_irq >> 5);
@@ -64,12 +64,12 @@ void riscv_plic_irq_enable(uint32_t irq)
  *
  * @return N/A
  */
-void riscv_plic_irq_disable(uint32_t irq)
+void riscv_plic_irq_disable(u32_t irq)
 {
-	uint32_t key;
-	uint32_t fe310_irq = irq - RISCV_MAX_GENERIC_IRQ;
-	volatile uint32_t *en =
-		(volatile uint32_t *)FE310_PLIC_IRQ_EN_BASE_ADDR;
+	u32_t key;
+	u32_t fe310_irq = irq - RISCV_MAX_GENERIC_IRQ;
+	volatile u32_t *en =
+		(volatile u32_t *)FE310_PLIC_IRQ_EN_BASE_ADDR;
 
 	key = irq_lock();
 	en += (fe310_irq >> 5);
@@ -86,11 +86,11 @@ void riscv_plic_irq_disable(uint32_t irq)
  *
  * @return 1 or 0
  */
-int riscv_plic_irq_is_enabled(uint32_t irq)
+int riscv_plic_irq_is_enabled(u32_t irq)
 {
-	volatile uint32_t *en =
-		(volatile uint32_t *)FE310_PLIC_IRQ_EN_BASE_ADDR;
-	uint32_t fe310_irq = irq - RISCV_MAX_GENERIC_IRQ;
+	volatile u32_t *en =
+		(volatile u32_t *)FE310_PLIC_IRQ_EN_BASE_ADDR;
+	u32_t fe310_irq = irq - RISCV_MAX_GENERIC_IRQ;
 
 	en += (fe310_irq >> 5);
 	return !!(*en & (1 << (fe310_irq & 31)));
@@ -107,10 +107,10 @@ int riscv_plic_irq_is_enabled(uint32_t irq)
  *
  * @return N/A
  */
-void riscv_plic_set_priority(uint32_t irq, uint32_t priority)
+void riscv_plic_set_priority(u32_t irq, u32_t priority)
 {
-	volatile uint32_t *prio =
-		(volatile uint32_t *)FE310_PLIC_PRIO_BASE_ADDR;
+	volatile u32_t *prio =
+		(volatile u32_t *)FE310_PLIC_PRIO_BASE_ADDR;
 
 	/* Can set priority only for PLIC-specific interrupt line */
 	if (irq <= RISCV_MAX_GENERIC_IRQ)
@@ -143,7 +143,7 @@ static void plic_fe310_irq_handler(void *arg)
 	volatile struct plic_fe310_regs_t *regs =
 		(volatile struct plic_fe310_regs_t *)FE310_PLIC_REG_BASE_ADDR;
 
-	uint32_t irq;
+	u32_t irq;
 	struct _isr_table_entry *ite;
 
 	/* Get the IRQ number generating the interrupt */
@@ -186,10 +186,10 @@ static int plic_fe310_init(struct device *dev)
 {
 	ARG_UNUSED(dev);
 
-	volatile uint32_t *en =
-		(volatile uint32_t *)FE310_PLIC_IRQ_EN_BASE_ADDR;
-	volatile uint32_t *prio =
-		(volatile uint32_t *)FE310_PLIC_PRIO_BASE_ADDR;
+	volatile u32_t *en =
+		(volatile u32_t *)FE310_PLIC_IRQ_EN_BASE_ADDR;
+	volatile u32_t *prio =
+		(volatile u32_t *)FE310_PLIC_PRIO_BASE_ADDR;
 	volatile struct plic_fe310_regs_t *regs =
 		(volatile struct plic_fe310_regs_t *)FE310_PLIC_REG_BASE_ADDR;
 	int i;
diff --git a/drivers/interrupt_controller/system_apic.c b/drivers/interrupt_controller/system_apic.c
index 7b865d5ec0a..a6eef85673a 100644
--- a/drivers/interrupt_controller/system_apic.c
+++ b/drivers/interrupt_controller/system_apic.c
@@ -45,7 +45,7 @@
  *
  */
 void __irq_controller_irq_config(unsigned int vector, unsigned int irq,
-				 uint32_t flags)
+				 u32_t flags)
 {
 	__ASSERT(irq >= 0 && irq <= HARDWARE_IRQ_LIMIT, "invalid irq line");
 
diff --git a/drivers/ipm/ipm_quark_se.c b/drivers/ipm/ipm_quark_se.c
index 7a5faa69b8a..9180df526c1 100644
--- a/drivers/ipm/ipm_quark_se.c
+++ b/drivers/ipm/ipm_quark_se.c
@@ -24,9 +24,9 @@
  * in incoming channel
  */
 static struct device *device_by_channel[QUARK_SE_IPM_CHANNELS];
-static uint32_t inbound_channels;
+static u32_t inbound_channels;
 
-static uint32_t quark_se_ipm_sts_get(void)
+static u32_t quark_se_ipm_sts_get(void)
 {
 	return sys_read32(QUARK_SE_IPM_CHALL_STS) & inbound_channels;
 }
@@ -87,12 +87,12 @@ void quark_se_ipm_isr(void *param)
 }
 
 
-static int quark_se_ipm_send(struct device *d, int wait, uint32_t id,
+static int quark_se_ipm_send(struct device *d, int wait, u32_t id,
 			const void *data, int size)
 {
 	const struct quark_se_ipm_config_info *config = d->config->config_info;
 	volatile struct quark_se_ipm *ipm = config->ipm;
-	const uint8_t *data8;
+	const u8_t *data8;
 	int i;
 	int flags;
 
@@ -116,7 +116,7 @@ static int quark_se_ipm_send(struct device *d, int wait, uint32_t id,
 	}
 
 	/* Populate the data, memcpy doesn't take volatiles */
-	data8 = (const uint8_t *)data;
+	data8 = (const u8_t *)data;
 
 	for (i = 0; i < size; ++i) {
 		ipm->data[i] = data8[i];
@@ -148,7 +148,7 @@ static int quark_se_ipm_max_data_size_get(struct device *d)
 }
 
 
-static uint32_t quark_se_ipm_max_id_val_get(struct device *d)
+static u32_t quark_se_ipm_max_id_val_get(struct device *d)
 {
 	ARG_UNUSED(d);
 
diff --git a/drivers/ipm/ipm_quark_se.h b/drivers/ipm/ipm_quark_se.h
index 5fbc6398c85..e6480a3efc7 100644
--- a/drivers/ipm/ipm_quark_se.h
+++ b/drivers/ipm/ipm_quark_se.h
@@ -42,24 +42,24 @@ extern "C" {
 #endif
 
 #define QUARK_SE_IPM_CHANNELS	8
-#define QUARK_SE_IPM_DATA_BYTES	(4 * sizeof(uint32_t))
+#define QUARK_SE_IPM_DATA_BYTES	(4 * sizeof(u32_t))
 #define QUARK_SE_IPM_MAX_ID_VAL	0x7FFFFFFF
 
 /* QUARK_SE EAS section 28.5.1.123 */
 struct __packed quark_se_ipm_ch_ctrl {
-	uint32_t ctrl : 31;
-	uint32_t irq : 1;
+	u32_t ctrl : 31;
+	u32_t irq : 1;
 };
 
 struct __packed quark_se_ipm_ch_sts {
-	uint32_t sts : 1;
-	uint32_t irq : 1;
-	uint32_t reserved : 30;
+	u32_t sts : 1;
+	u32_t irq : 1;
+	u32_t reserved : 30;
 };
 
 struct __packed quark_se_ipm {
 	struct quark_se_ipm_ch_ctrl ctrl;
-	uint8_t data[QUARK_SE_IPM_DATA_BYTES]; /* contiguous 32-bit registers */
+	u8_t data[QUARK_SE_IPM_DATA_BYTES]; /* contiguous 32-bit registers */
 	struct quark_se_ipm_ch_sts sts;
 };
 
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 152b4979038..4d84be758da 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -105,12 +105,12 @@
 
 struct lookup_data {
 	struct pci_dev_info info;
-	uint32_t bus:9;
-	uint32_t dev:6;
-	uint32_t func:4;
-	uint32_t baridx:3;
-	uint32_t barofs:3;
-	uint32_t unused:7;
+	u32_t bus:9;
+	u32_t dev:6;
+	u32_t func:4;
+	u32_t baridx:3;
+	u32_t barofs:3;
+	u32_t unused:7;
 };
 
 static struct lookup_data __noinit lookup;
@@ -123,9 +123,9 @@ static struct lookup_data __noinit lookup;
  */
 
 static inline int pci_bar_config_get(union pci_addr_reg pci_ctrl_addr,
-							uint32_t *config)
+							u32_t *config)
 {
-	uint32_t old_value;
+	u32_t old_value;
 
 	/* save the current setting */
 	pci_read(DEFAULT_PCI_CONTROLLER,
@@ -136,7 +136,7 @@ static inline int pci_bar_config_get(union pci_addr_reg pci_ctrl_addr,
 	/* write to the BAR to see how large it is */
 	pci_write(DEFAULT_PCI_CONTROLLER,
 			pci_ctrl_addr,
-			sizeof(uint32_t),
+			sizeof(u32_t),
 			0xffffffff);
 
 	pci_read(DEFAULT_PCI_CONTROLLER,
@@ -172,11 +172,11 @@ static inline int pci_bar_params_get(union pci_addr_reg pci_ctrl_addr,
 				     struct pci_dev_info *dev_info,
 				     int max_bars)
 {
-	uint32_t bar_value;
-	uint32_t bar_config;
-	uint32_t bar_hival;
-	uint32_t addr;
-	uint32_t mask;
+	u32_t bar_value;
+	u32_t bar_config;
+	u32_t bar_hival;
+	u32_t addr;
+	u32_t mask;
 
 	pci_ctrl_addr.field.reg = 4 + lookup.barofs;
 
@@ -231,7 +231,7 @@ static inline int pci_dev_scan(union pci_addr_reg pci_ctrl_addr,
 					struct pci_dev_info *dev_info)
 {
 	static union pci_dev pci_dev_header;
-	uint32_t pci_data;
+	u32_t pci_data;
 	int max_bars;
 
 	/* verify first if there is a valid device at this point */
@@ -408,10 +408,10 @@ int pci_bus_scan(struct pci_dev_info *dev_info)
 }
 #endif /* CONFIG_PCI_ENUMERATION */
 
-static void pci_set_command_bits(struct pci_dev_info *dev_info, uint32_t bits)
+static void pci_set_command_bits(struct pci_dev_info *dev_info, u32_t bits)
 {
 	union pci_addr_reg pci_ctrl_addr;
-	uint32_t pci_data;
+	u32_t pci_data;
 
 	pci_ctrl_addr.value = 0;
 	pci_ctrl_addr.field.func = dev_info->function;
@@ -425,14 +425,14 @@ static void pci_set_command_bits(struct pci_dev_info *dev_info, uint32_t bits)
 
 	pci_read(DEFAULT_PCI_CONTROLLER,
 			pci_ctrl_addr,
-			sizeof(uint16_t),
+			sizeof(u16_t),
 			&pci_data);
 
 	pci_data = pci_data | bits;
 
 	pci_write(DEFAULT_PCI_CONTROLLER,
 			pci_ctrl_addr,
-			sizeof(uint16_t),
+			sizeof(u16_t),
 			pci_data);
 }
 
@@ -469,8 +469,8 @@ void pci_show(struct pci_dev_info *dev_info)
 		dev_info->function,
 		dev_info->bar,
 		(dev_info->mem_type == BAR_SPACE_MEM) ? "MEM" : "I/O",
-		(uint32_t)dev_info->addr,
-		(uint32_t)(dev_info->addr + dev_info->size - 1),
+		(u32_t)dev_info->addr,
+		(u32_t)(dev_info->addr + dev_info->size - 1),
 		dev_info->irq);
 }
 #endif /* CONFIG_PCI_DEBUG */
diff --git a/drivers/pci/pci_config.c b/drivers/pci/pci_config.c
index 225b1939b91..75b8aa138f2 100644
--- a/drivers/pci/pci_config.c
+++ b/drivers/pci/pci_config.c
@@ -31,8 +31,8 @@
  *
  * @return N/A
  */
-void pci_config_out_long(uint32_t bus_no, uint32_t device_no, uint32_t func_no,
-						 uint32_t offset, uint32_t data)
+void pci_config_out_long(u32_t bus_no, u32_t device_no, u32_t func_no,
+						 u32_t offset, u32_t data)
 {
 	union pci_addr_reg pci_addr;
 
@@ -46,7 +46,7 @@ void pci_config_out_long(uint32_t bus_no, uint32_t device_no, uint32_t func_no,
 
 	/* write to the PCI controller */
 
-	pci_write(DEFAULT_PCI_CONTROLLER, pci_addr, sizeof(uint32_t), data);
+	pci_write(DEFAULT_PCI_CONTROLLER, pci_addr, sizeof(u32_t), data);
 }
 
 /**
@@ -61,8 +61,8 @@ void pci_config_out_long(uint32_t bus_no, uint32_t device_no, uint32_t func_no,
  *
  * @return N/A
  */
-void pci_config_out_word(uint32_t bus_no, uint32_t device_no, uint32_t func_no,
-						 uint32_t offset, uint16_t data)
+void pci_config_out_word(u32_t bus_no, u32_t device_no, u32_t func_no,
+						 u32_t offset, u16_t data)
 {
 	union pci_addr_reg pci_addr;
 
@@ -76,7 +76,7 @@ void pci_config_out_word(uint32_t bus_no, uint32_t device_no, uint32_t func_no,
 
 	/* write to the PCI controller */
 
-	pci_write(DEFAULT_PCI_CONTROLLER, pci_addr, sizeof(uint16_t), data);
+	pci_write(DEFAULT_PCI_CONTROLLER, pci_addr, sizeof(u16_t), data);
 }
 
 /**
@@ -91,8 +91,8 @@ void pci_config_out_word(uint32_t bus_no, uint32_t device_no, uint32_t func_no,
  *
  * @return N/A
  */
-void pci_config_out_byte(uint32_t bus_no, uint32_t device_no, uint32_t func_no,
-						 uint32_t offset, uint8_t data)
+void pci_config_out_byte(u32_t bus_no, u32_t device_no, u32_t func_no,
+						 u32_t offset, u8_t data)
 {
 	union pci_addr_reg pci_addr;
 
@@ -106,7 +106,7 @@ void pci_config_out_byte(uint32_t bus_no, uint32_t device_no, uint32_t func_no,
 
 	/* write to the PCI controller */
 
-	pci_write(DEFAULT_PCI_CONTROLLER, pci_addr, sizeof(uint8_t), data);
+	pci_write(DEFAULT_PCI_CONTROLLER, pci_addr, sizeof(u8_t), data);
 }
 
 /**
@@ -122,8 +122,8 @@ void pci_config_out_byte(uint32_t bus_no, uint32_t device_no, uint32_t func_no,
  * @return N/A
  *
  */
-void pci_config_in_long(uint32_t bus_no, uint32_t device_no, uint32_t func_no,
-						uint32_t offset, uint32_t *data)
+void pci_config_in_long(u32_t bus_no, u32_t device_no, u32_t func_no,
+						u32_t offset, u32_t *data)
 {
 	union pci_addr_reg pci_addr;
 
@@ -137,7 +137,7 @@ void pci_config_in_long(uint32_t bus_no, uint32_t device_no, uint32_t func_no,
 
 	/* read from the PCI controller */
 
-	pci_read(DEFAULT_PCI_CONTROLLER, pci_addr, sizeof(uint32_t), data);
+	pci_read(DEFAULT_PCI_CONTROLLER, pci_addr, sizeof(u32_t), data);
 }
 
 /**
@@ -154,11 +154,11 @@ void pci_config_in_long(uint32_t bus_no, uint32_t device_no, uint32_t func_no,
  *
  */
 
-void pci_config_in_word(uint32_t bus_no, uint32_t device_no, uint32_t func_no,
-						uint32_t offset, uint16_t *data)
+void pci_config_in_word(u32_t bus_no, u32_t device_no, u32_t func_no,
+						u32_t offset, u16_t *data)
 {
 	union pci_addr_reg pci_addr;
-	uint32_t pci_data;
+	u32_t pci_data;
 
 	/* create the PCI address we're going to access */
 
@@ -170,11 +170,11 @@ void pci_config_in_word(uint32_t bus_no, uint32_t device_no, uint32_t func_no,
 
 	/* read from the PCI controller */
 
-	pci_read(DEFAULT_PCI_CONTROLLER, pci_addr, sizeof(uint16_t), &pci_data);
+	pci_read(DEFAULT_PCI_CONTROLLER, pci_addr, sizeof(u16_t), &pci_data);
 
 	/* return the data */
 
-	*data = (uint16_t)pci_data;
+	*data = (u16_t)pci_data;
 }
 
 /**
@@ -191,11 +191,11 @@ void pci_config_in_word(uint32_t bus_no, uint32_t device_no, uint32_t func_no,
  *
  */
 
-void pci_config_in_byte(uint32_t bus_no, uint32_t device_no, uint32_t func_no,
-						uint32_t offset, uint8_t *data)
+void pci_config_in_byte(u32_t bus_no, u32_t device_no, u32_t func_no,
+						u32_t offset, u8_t *data)
 {
 	union pci_addr_reg pci_addr;
-	uint32_t pci_data;
+	u32_t pci_data;
 
 	/* create the PCI address we're going to access */
 
@@ -207,11 +207,11 @@ void pci_config_in_byte(uint32_t bus_no, uint32_t device_no, uint32_t func_no,
 
 	/* read from the PCI controller */
 
-	pci_read(DEFAULT_PCI_CONTROLLER, pci_addr, sizeof(uint8_t), &pci_data);
+	pci_read(DEFAULT_PCI_CONTROLLER, pci_addr, sizeof(u8_t), &pci_data);
 
 	/* return the data */
 
-	*data = (uint8_t)pci_data;
+	*data = (u8_t)pci_data;
 }
 
 /**
@@ -232,14 +232,14 @@ void pci_config_in_byte(uint32_t bus_no, uint32_t device_no, uint32_t func_no,
  *
  */
 
-int pci_config_ext_cap_ptr_find(uint8_t ext_cap_find_id, uint32_t bus,
-								uint32_t device, uint32_t function,
-								uint8_t *p_offset)
+int pci_config_ext_cap_ptr_find(u8_t ext_cap_find_id, u32_t bus,
+								u32_t device, u32_t function,
+								u8_t *p_offset)
 {
-	uint16_t tmp_stat;
-	uint8_t tmp_offset;
-	uint8_t cap_offset = 0x00;
-	uint8_t cap_id = 0x00;
+	u16_t tmp_stat;
+	u8_t tmp_offset;
+	u8_t cap_offset = 0x00;
+	u8_t cap_id = 0x00;
 
 	/* Check to see if the device has any extended capabilities */
 
@@ -274,7 +274,7 @@ int pci_config_ext_cap_ptr_find(uint8_t ext_cap_find_id, uint32_t bus,
 
 		/* Get the offset to the next New Capabilities item */
 
-		tmp_offset = cap_offset + (uint8_t)0x01;
+		tmp_offset = cap_offset + (u8_t)0x01;
 		pci_config_in_byte(bus, device, function, (int)tmp_offset, &cap_offset);
 	}
 
diff --git a/drivers/pci/pci_interface.c b/drivers/pci/pci_interface.c
index 8c76510f03b..72f88f23fcb 100644
--- a/drivers/pci/pci_interface.c
+++ b/drivers/pci/pci_interface.c
@@ -42,7 +42,7 @@
  *
  */
 
-static void pci_ctrl_read(uint32_t reg, uint32_t *data, uint32_t size)
+static void pci_ctrl_read(u32_t reg, u32_t *data, u32_t size)
 {
 	/* read based on the size requested */
 
@@ -77,7 +77,7 @@ static void pci_ctrl_read(uint32_t reg, uint32_t *data, uint32_t size)
  *
  */
 
-static void pci_ctrl_write(uint32_t reg, uint32_t data, uint32_t size)
+static void pci_ctrl_write(u32_t reg, u32_t data, u32_t size)
 {
 	/* write based on the size requested */
 
@@ -112,8 +112,8 @@ static void pci_ctrl_write(uint32_t reg, uint32_t data, uint32_t size)
  *
  */
 
-static int pci_ctrl_data_read(uint32_t controller, uint32_t offset,
-				uint32_t *data, uint32_t size)
+static int pci_ctrl_data_read(u32_t controller, u32_t offset,
+				u32_t *data, u32_t size)
 {
 	/* we only support one controller */
 
@@ -142,8 +142,8 @@ static int pci_ctrl_data_read(uint32_t controller, uint32_t offset,
  *
  */
 
-static int pci_ctrl_data_write(uint32_t controller, uint32_t offset,
-			       uint32_t data, uint32_t size)
+static int pci_ctrl_data_write(u32_t controller, u32_t offset,
+			       u32_t data, u32_t size)
 {
 	/* we only support one controller */
 
@@ -172,8 +172,8 @@ static int pci_ctrl_data_write(uint32_t controller, uint32_t offset,
  *
  */
 
-static int pci_ctrl_addr_write(uint32_t controller, uint32_t offset,
-			       uint32_t data, uint32_t size)
+static int pci_ctrl_addr_write(u32_t controller, u32_t offset,
+			       u32_t data, u32_t size)
 {
 	/* we only support one controller */
 
@@ -213,7 +213,7 @@ static int pci_ctrl_addr_write(uint32_t controller, uint32_t offset,
  * Example:
  *
  *  union pci_addr_reg addr;
- *  uint32_t status;
+ *  u32_t status;
  *
  *  addr.field.bus    = 0;    /@ PCI bus zero        @/
  *  addr.field.device = 1;    /@ PCI device one      @/
@@ -221,7 +221,7 @@ static int pci_ctrl_addr_write(uint32_t controller, uint32_t offset,
  *  addr.field.reg    = 4;    /@ PCI register 4      @/
  *  addr.field.offset = 0;    /@ PCI register offset @/
  *
- *  pci_read (DEFAULT_PCI_CONTROLLER, addr, sizeof(uint16_t), &status);
+ *  pci_read (DEFAULT_PCI_CONTROLLER, addr, sizeof(u16_t), &status);
  *
  *
  * NOTE:
@@ -237,11 +237,11 @@ static int pci_ctrl_addr_write(uint32_t controller, uint32_t offset,
  *
  */
 
-void pci_read(uint32_t controller, union pci_addr_reg addr,
-	      uint32_t size, uint32_t *data)
+void pci_read(u32_t controller, union pci_addr_reg addr,
+	      u32_t size, u32_t *data)
 {
-	uint32_t access_size;
-	uint32_t access_offset;
+	u32_t access_size;
+	u32_t access_offset;
 
 	/* validate the access size */
 
@@ -305,7 +305,7 @@ void pci_read(uint32_t controller, union pci_addr_reg addr,
  * Example:
  *
  *  pci_addr_t addr;
- *  uint32_t bar0 = 0xE0000000;
+ *  u32_t bar0 = 0xE0000000;
  *
  *  addr.field.bus    = 0;    /@ PCI bus zero        @/
  *  addr.field.device = 1;    /@ PCI device one      @/
@@ -313,7 +313,7 @@ void pci_read(uint32_t controller, union pci_addr_reg addr,
  *  addr.field.reg    = 16;   /@ PCI register 16     @/
  *  addr.field.offset = 0;    /@ PCI register offset @/
  *
- *  pci_write (DEFAULT_PCI_CONTROLLER, addr, sizeof(uint32_t), bar0);
+ *  pci_write (DEFAULT_PCI_CONTROLLER, addr, sizeof(u32_t), bar0);
  *
  * NOTE:
  *   Writing of PCI data must be performed as an atomic operation. It is up to
@@ -328,11 +328,11 @@ void pci_read(uint32_t controller, union pci_addr_reg addr,
  *
  */
 
-void pci_write(uint32_t controller, union pci_addr_reg addr,
-	       uint32_t size, uint32_t data)
+void pci_write(u32_t controller, union pci_addr_reg addr,
+	       u32_t size, u32_t data)
 {
-	uint32_t access_size;
-	uint32_t access_offset;
+	u32_t access_size;
+	u32_t access_offset;
 
 	/* validate the access size */
 
@@ -377,11 +377,11 @@ void pci_write(uint32_t controller, union pci_addr_reg addr,
  * @return N/A
  */
 
-void pci_header_get(uint32_t controller,
+void pci_header_get(u32_t controller,
 		    union pci_addr_reg pci_ctrl_addr,
 		    union pci_dev *pci_dev_header)
 {
-	uint32_t i;
+	u32_t i;
 
 	/* clear out the header */
 
@@ -393,7 +393,7 @@ void pci_header_get(uint32_t controller,
 		pci_ctrl_addr.field.reg = i;
 		pci_read(controller,
 			pci_ctrl_addr,
-			sizeof(uint32_t),
+			sizeof(u32_t),
 			&pci_dev_header->words.word[i]);
 	}
 }
diff --git a/drivers/pci/pci_legacy_bridge.c b/drivers/pci/pci_legacy_bridge.c
index 8563f1330ae..4ffcb0458ad 100644
--- a/drivers/pci/pci_legacy_bridge.c
+++ b/drivers/pci/pci_legacy_bridge.c
@@ -41,9 +41,9 @@
  */
 
 static int pci_rcba_mask_get(union pci_addr_reg pci_ctrl_addr,
-			     uint32_t *mask)
+			     u32_t *mask)
 {
-	uint32_t old_value;
+	u32_t old_value;
 
 	/* save the current setting */
 	pci_read(DEFAULT_PCI_CONTROLLER,
@@ -54,7 +54,7 @@ static int pci_rcba_mask_get(union pci_addr_reg pci_ctrl_addr,
 	/* write to the RCBA to see how large it is */
 	pci_write(DEFAULT_PCI_CONTROLLER,
 			pci_ctrl_addr,
-			sizeof(uint32_t),
+			sizeof(u32_t),
 			0xffffffff);
 
 	pci_read(DEFAULT_PCI_CONTROLLER,
@@ -94,9 +94,9 @@ int pci_legacy_bridge_detect(struct pci_dev_info *dev_info)
 {
 	union pci_addr_reg pci_ctrl_addr;
 	static union pci_dev pci_dev_header;
-	uint32_t pci_data; /* temporary data to read */
-	uint32_t rcba; /* root complex base address */
-	uint32_t rcba_mask; /* bits set for RCBA */
+	u32_t pci_data; /* temporary data to read */
+	u32_t rcba; /* root complex base address */
+	u32_t rcba_mask; /* bits set for RCBA */
 
 	/* initialise the PCI controller address register value */
 	pci_ctrl_addr.value = 0;
@@ -176,7 +176,7 @@ void pci_legacy_bridge_configure(struct pci_dev_info *dev_info,
 				 int pci_interrupt_pin,
 				 int irq_number)
 {
-	uint32_t addr = (io_block_num == 0) ? PCI_ADDR_IRQAGENT1 :
+	u32_t addr = (io_block_num == 0) ? PCI_ADDR_IRQAGENT1 :
 		PCI_ADDR_IRQAGENT3;
 	/*
 	 * Each interrupt queue agent register in PCI legacy
@@ -188,7 +188,7 @@ void pci_legacy_bridge_configure(struct pci_dev_info *dev_info,
 	 * Bits 3:0   indicates which IRQ is used for INTA.
 	 */
 	int offset = (pci_interrupt_pin - 1) * 4;
-	uint16_t irq_routing = sys_read16(dev_info->addr + addr);
+	u16_t irq_routing = sys_read16(dev_info->addr + addr);
 
 	irq_routing &= ~(0x0f << offset);
 	irq_routing |= (irq_number - NUM_STD_IRQS) << offset;
diff --git a/drivers/pinmux/beetle/pinmux_board_v2m_beetle.c b/drivers/pinmux/beetle/pinmux_board_v2m_beetle.c
index 94b8cd16bc0..8f2215a9ff8 100644
--- a/drivers/pinmux/beetle/pinmux_board_v2m_beetle.c
+++ b/drivers/pinmux/beetle/pinmux_board_v2m_beetle.c
@@ -94,8 +94,8 @@
  */
 static void arm_v2m_beetle_pinmux_defaults(void)
 {
-	uint32_t gpio_0 = 0;
-	uint32_t gpio_1 = 0;
+	u32_t gpio_0 = 0;
+	u32_t gpio_1 = 0;
 
 	/* Set GPIO Alternate Functions */
 
diff --git a/drivers/pinmux/dev/pinmux_dev_arm_beetle.c b/drivers/pinmux/dev/pinmux_dev_arm_beetle.c
index 62ce098c455..8c3f6bf6146 100644
--- a/drivers/pinmux/dev/pinmux_dev_arm_beetle.c
+++ b/drivers/pinmux/dev/pinmux_dev_arm_beetle.c
@@ -22,9 +22,9 @@
 #define CMSDK_AHB_GPIO1_DEV \
 	((volatile struct gpio_cmsdk_ahb *)CMSDK_AHB_GPIO1)
 
-static volatile struct gpio_cmsdk_ahb *_get_port(uint32_t pin)
+static volatile struct gpio_cmsdk_ahb *_get_port(u32_t pin)
 {
-	uint32_t port_num = pin / PINS_PER_PORT;
+	u32_t port_num = pin / PINS_PER_PORT;
 
 	/* Port 2 and 3 are reserved therefore not handled in this driver */
 	switch (port_num) {
@@ -38,11 +38,11 @@ static volatile struct gpio_cmsdk_ahb *_get_port(uint32_t pin)
 	}
 }
 
-static int pinmux_set(struct device *dev, uint32_t pin, uint32_t func)
+static int pinmux_set(struct device *dev, u32_t pin, u32_t func)
 {
 	volatile struct gpio_cmsdk_ahb *port = _get_port(pin);
-	uint32_t tmp;
-	uint32_t key;
+	u32_t tmp;
+	u32_t key;
 
 	ARG_UNUSED(dev);
 
@@ -79,7 +79,7 @@ static int pinmux_set(struct device *dev, uint32_t pin, uint32_t func)
 	return 0;
 }
 
-static int pinmux_get(struct device *dev, uint32_t pin, uint32_t *func)
+static int pinmux_get(struct device *dev, u32_t pin, u32_t *func)
 {
 	volatile struct gpio_cmsdk_ahb *port = _get_port(pin);
 
@@ -94,7 +94,7 @@ static int pinmux_get(struct device *dev, uint32_t pin, uint32_t *func)
 	return 0;
 }
 
-static int pinmux_pullup(struct device *dev, uint32_t pin, uint8_t func)
+static int pinmux_pullup(struct device *dev, u32_t pin, u8_t func)
 {
 	ARG_UNUSED(dev);
 	ARG_UNUSED(pin);
@@ -106,7 +106,7 @@ static int pinmux_pullup(struct device *dev, uint32_t pin, uint8_t func)
 	return 0;
 }
 
-static int pinmux_input(struct device *dev, uint32_t pin, uint8_t func)
+static int pinmux_input(struct device *dev, u32_t pin, u8_t func)
 {
 	volatile struct gpio_cmsdk_ahb *port = _get_port(pin);
 
diff --git a/drivers/pinmux/dev/pinmux_dev_atmel_sam3x.c b/drivers/pinmux/dev/pinmux_dev_atmel_sam3x.c
index 956ac016def..c36fa2e7a5b 100644
--- a/drivers/pinmux/dev/pinmux_dev_atmel_sam3x.c
+++ b/drivers/pinmux/dev/pinmux_dev_atmel_sam3x.c
@@ -13,9 +13,9 @@
 #include <soc.h>
 #include <misc/util.h>
 
-static volatile struct __pio *_get_port(uint32_t pin)
+static volatile struct __pio *_get_port(u32_t pin)
 {
-	uint32_t port_num = pin / 32;
+	u32_t port_num = pin / 32;
 
 	switch (port_num) {
 	case 0:
@@ -32,10 +32,10 @@ static volatile struct __pio *_get_port(uint32_t pin)
 	}
 }
 
-static int pinmux_set(struct device *dev, uint32_t pin, uint32_t func)
+static int pinmux_set(struct device *dev, u32_t pin, u32_t func)
 {
 	volatile struct __pio *port = _get_port(pin);
-	uint32_t tmp;
+	u32_t tmp;
 
 	ARG_UNUSED(dev);
 
@@ -54,7 +54,7 @@ static int pinmux_set(struct device *dev, uint32_t pin, uint32_t func)
 	return 0;
 }
 
-static int pinmux_get(struct device *dev, uint32_t pin, uint32_t *func)
+static int pinmux_get(struct device *dev, u32_t pin, u32_t *func)
 {
 	volatile struct __pio *port = _get_port(pin);
 
@@ -69,7 +69,7 @@ static int pinmux_get(struct device *dev, uint32_t pin, uint32_t *func)
 	return 0;
 }
 
-static int pinmux_pullup(struct device *dev, uint32_t pin, uint8_t func)
+static int pinmux_pullup(struct device *dev, u32_t pin, u8_t func)
 {
 	volatile struct __pio *port = _get_port(pin);
 
@@ -87,7 +87,7 @@ static int pinmux_pullup(struct device *dev, uint32_t pin, uint8_t func)
 
 	return 0;
 }
-static int pinmux_input(struct device *dev, uint32_t pin, uint8_t func)
+static int pinmux_input(struct device *dev, u32_t pin, u8_t func)
 {
 	volatile struct __pio *port = _get_port(pin);
 
diff --git a/drivers/pinmux/dev/pinmux_dev_k64.c b/drivers/pinmux/dev/pinmux_dev_k64.c
index 6c85d7cdd38..a6aece17f1c 100644
--- a/drivers/pinmux/dev/pinmux_dev_k64.c
+++ b/drivers/pinmux/dev/pinmux_dev_k64.c
@@ -14,16 +14,16 @@
 #include <sys_io.h>
 #include <pinmux/k64/pinmux.h>
 
-static int fsl_k64_dev_set(struct device *dev, uint32_t pin,
-				uint32_t func)
+static int fsl_k64_dev_set(struct device *dev, u32_t pin,
+				u32_t func)
 {
 	ARG_UNUSED(dev);
 
 	return _fsl_k64_set_pin(pin, func);
 }
 
-static int fsl_k64_dev_get(struct device *dev, uint32_t pin,
-				uint32_t *func)
+static int fsl_k64_dev_get(struct device *dev, u32_t pin,
+				u32_t *func)
 {
 	ARG_UNUSED(dev);
 
diff --git a/drivers/pinmux/dev/pinmux_dev_stm32.c b/drivers/pinmux/dev/pinmux_dev_stm32.c
index 619df8d870c..3c1b9122491 100644
--- a/drivers/pinmux/dev/pinmux_dev_stm32.c
+++ b/drivers/pinmux/dev/pinmux_dev_stm32.c
@@ -21,7 +21,7 @@
 #include <pinmux/stm32/pinmux_stm32.h>
 
 static int pinmux_stm32_set(struct device *dev,
-				 uint32_t pin, uint32_t func)
+				 u32_t pin, u32_t func)
 {
 	ARG_UNUSED(dev);
 
@@ -29,7 +29,7 @@ static int pinmux_stm32_set(struct device *dev,
 }
 
 static int pinmux_stm32_get(struct device *dev,
-				 uint32_t pin, uint32_t *func)
+				 u32_t pin, u32_t *func)
 {
 	ARG_UNUSED(dev);
 	ARG_UNUSED(pin);
@@ -39,8 +39,8 @@ static int pinmux_stm32_get(struct device *dev,
 }
 
 static int pinmux_stm32_input(struct device *dev,
-				uint32_t pin,
-				uint8_t func)
+				u32_t pin,
+				u8_t func)
 {
 	ARG_UNUSED(dev);
 	ARG_UNUSED(pin);
@@ -50,8 +50,8 @@ static int pinmux_stm32_input(struct device *dev,
 }
 
 static int pinmux_stm32_pullup(struct device *dev,
-				uint32_t pin,
-				uint8_t func)
+				u32_t pin,
+				u8_t func)
 {
 	ARG_UNUSED(dev);
 	ARG_UNUSED(pin);
diff --git a/drivers/pinmux/pinmux.h b/drivers/pinmux/pinmux.h
index a55f41d7e1d..6be38909a26 100644
--- a/drivers/pinmux/pinmux.h
+++ b/drivers/pinmux/pinmux.h
@@ -16,12 +16,12 @@ extern "C" {
 #endif
 
 struct pin_config {
-	uint8_t pin_num;
-	uint32_t mode;
+	u8_t pin_num;
+	u32_t mode;
 };
 
 struct pinmux_config {
-	uint32_t	base_address;
+	u32_t	base_address;
 };
 
 #ifdef __cplusplus
diff --git a/drivers/pinmux/pinmux_fe310.c b/drivers/pinmux/pinmux_fe310.c
index 45e64cbdcb2..676835d2722 100644
--- a/drivers/pinmux/pinmux_fe310.c
+++ b/drivers/pinmux/pinmux_fe310.c
@@ -14,12 +14,12 @@
 #include <soc.h>
 
 struct pinmux_fe310_config {
-	uint32_t base;
+	u32_t base;
 };
 
 struct pinmux_fe310_regs_t {
-	uint32_t iof_en;
-	uint32_t iof_sel;
+	u32_t iof_en;
+	u32_t iof_sel;
 };
 
 #define DEV_CFG(dev)					\
@@ -29,7 +29,7 @@ struct pinmux_fe310_regs_t {
 #define DEV_PINMUX(dev)						\
 	((struct pinmux_fe310_regs_t *)(DEV_CFG(dev))->base)
 
-static int pinmux_fe310_set(struct device *dev, uint32_t pin, uint32_t func)
+static int pinmux_fe310_set(struct device *dev, u32_t pin, u32_t func)
 {
 	volatile struct pinmux_fe310_regs_t *pinmux = DEV_PINMUX(dev);
 
@@ -48,7 +48,7 @@ static int pinmux_fe310_set(struct device *dev, uint32_t pin, uint32_t func)
 	return 0;
 }
 
-static int pinmux_fe310_get(struct device *dev, uint32_t pin, uint32_t *func)
+static int pinmux_fe310_get(struct device *dev, u32_t pin, u32_t *func)
 {
 	volatile struct pinmux_fe310_regs_t *pinmux = DEV_PINMUX(dev);
 
@@ -62,12 +62,12 @@ static int pinmux_fe310_get(struct device *dev, uint32_t pin, uint32_t *func)
 	return 0;
 }
 
-static int pinmux_fe310_pullup(struct device *dev, uint32_t pin, uint8_t func)
+static int pinmux_fe310_pullup(struct device *dev, u32_t pin, u8_t func)
 {
 	return -ENOTSUP;
 }
 
-static int pinmux_fe310_input(struct device *dev, uint32_t pin, uint8_t func)
+static int pinmux_fe310_input(struct device *dev, u32_t pin, u8_t func)
 {
 	return -ENOTSUP;
 }
diff --git a/drivers/pinmux/pinmux_mcux.c b/drivers/pinmux/pinmux_mcux.c
index ddd9e9d4892..26f0fff4024 100644
--- a/drivers/pinmux/pinmux_mcux.c
+++ b/drivers/pinmux/pinmux_mcux.c
@@ -15,7 +15,7 @@ struct pinmux_mcux_config {
 	PORT_Type *base;
 };
 
-static int pinmux_mcux_set(struct device *dev, uint32_t pin, uint32_t func)
+static int pinmux_mcux_set(struct device *dev, u32_t pin, u32_t func)
 {
 	const struct pinmux_mcux_config *config = dev->config->config_info;
 	PORT_Type *base = config->base;
@@ -25,7 +25,7 @@ static int pinmux_mcux_set(struct device *dev, uint32_t pin, uint32_t func)
 	return 0;
 }
 
-static int pinmux_mcux_get(struct device *dev, uint32_t pin, uint32_t *func)
+static int pinmux_mcux_get(struct device *dev, u32_t pin, u32_t *func)
 {
 	const struct pinmux_mcux_config *config = dev->config->config_info;
 	PORT_Type *base = config->base;
@@ -35,12 +35,12 @@ static int pinmux_mcux_get(struct device *dev, uint32_t pin, uint32_t *func)
 	return 0;
 }
 
-static int pinmux_mcux_pullup(struct device *dev, uint32_t pin, uint8_t func)
+static int pinmux_mcux_pullup(struct device *dev, u32_t pin, u8_t func)
 {
 	return -ENOTSUP;
 }
 
-static int pinmux_mcux_input(struct device *dev, uint32_t pin, uint8_t func)
+static int pinmux_mcux_input(struct device *dev, u32_t pin, u8_t func)
 {
 	return -ENOTSUP;
 }
diff --git a/drivers/pinmux/pinmux_qmsi.c b/drivers/pinmux/pinmux_qmsi.c
index 19f3fb88b3f..d61483caff3 100644
--- a/drivers/pinmux/pinmux_qmsi.c
+++ b/drivers/pinmux/pinmux_qmsi.c
@@ -13,16 +13,16 @@
 
 #define MASK_2_BITS	0x3
 
-static int pinmux_set(struct device *dev, uint32_t pin,
-			  uint32_t func)
+static int pinmux_set(struct device *dev, u32_t pin,
+			  u32_t func)
 {
 	ARG_UNUSED(dev);
 
 	return qm_pmux_select(pin, func) == 0 ? 0 : -EIO;
 }
 
-static int pinmux_get(struct device *dev, uint32_t pin,
-			  uint32_t *func)
+static int pinmux_get(struct device *dev, u32_t pin,
+			  u32_t *func)
 {
 	ARG_UNUSED(dev);
 
@@ -31,40 +31,40 @@ static int pinmux_get(struct device *dev, uint32_t pin,
 	 * 2 bits to set the mode (A, B, C, or D).  As such we only get 16
 	 * pins per register.
 	 */
-	uint32_t reg_offset = pin >> 4;
+	u32_t reg_offset = pin >> 4;
 
 	/* The pin offset within the register */
-	uint32_t pin_no = pin % 16;
+	u32_t pin_no = pin % 16;
 
 	/*
 	 * Now figure out what is the full address for the register
 	 * we are looking for.
 	 */
-	volatile uint32_t *mux_register = &QM_SCSS_PMUX->pmux_sel[reg_offset];
+	volatile u32_t *mux_register = &QM_SCSS_PMUX->pmux_sel[reg_offset];
 
 	/*
 	 * MASK_2_BITS (the value of which is 3) is used because there are
 	 * 2 bits for the mode of each pin.
 	 */
-	uint32_t pin_mask = MASK_2_BITS << (pin_no << 1);
-	uint32_t mode_mask = *mux_register & pin_mask;
-	uint32_t mode = mode_mask >> (pin_no << 1);
+	u32_t pin_mask = MASK_2_BITS << (pin_no << 1);
+	u32_t mode_mask = *mux_register & pin_mask;
+	u32_t mode = mode_mask >> (pin_no << 1);
 
 	*func = mode;
 
 	return 0;
 }
 
-static int pinmux_pullup(struct device *dev, uint32_t pin,
-			     uint8_t func)
+static int pinmux_pullup(struct device *dev, u32_t pin,
+			     u8_t func)
 {
 	ARG_UNUSED(dev);
 
 	return qm_pmux_pullup_en(pin, func) == 0 ? 0 : -EIO;
 }
 
-static int pinmux_input(struct device *dev, uint32_t pin,
-			    uint8_t func)
+static int pinmux_input(struct device *dev, u32_t pin,
+			    u8_t func)
 {
 	ARG_UNUSED(dev);
 
diff --git a/drivers/pinmux/pinmux_quark_mcu.h b/drivers/pinmux/pinmux_quark_mcu.h
index e4b6cdbf5f4..67df4d5a300 100644
--- a/drivers/pinmux/pinmux_quark_mcu.h
+++ b/drivers/pinmux/pinmux_quark_mcu.h
@@ -20,7 +20,7 @@
  * Each pinmux register rperesents a bank of 16 pins, 2 bits per pin for a total
  * of four possible settings per pin.
  *
- * The first argument to the macro is name of the uint32_t's that is being used
+ * The first argument to the macro is name of the u32_t's that is being used
  * to contain the bit patterns for all the configuration registers.  The pin
  * number divided by 16 selects the correct register bank based on the pin
  * number.
@@ -34,23 +34,23 @@
 #define PIN_CONFIG(A, _pin, _func) \
 	(A[((_pin) / 16)] |= ((0x3 & (_func)) << (((_pin) % 16) * 2)))
 
-static inline int _quark_mcu_set_mux(uint32_t base, uint32_t pin, uint8_t func)
+static inline int _quark_mcu_set_mux(u32_t base, u32_t pin, u8_t func)
 {
 	/*
 	 * the registers are 32-bit wide, but each pin requires 1 bit
 	 * to set the input enable bit.
 	 */
-	uint32_t register_offset = (pin / 32) * 4;
+	u32_t register_offset = (pin / 32) * 4;
 	/*
 	 * Now figure out what is the full address for the register
 	 * we are looking for.  Add the base register to the register_mask
 	 */
-	volatile uint32_t *mux_register = (uint32_t *)(base + register_offset);
+	volatile u32_t *mux_register = (u32_t *)(base + register_offset);
 
 	/*
 	 * Finally grab the pin offset within the register
 	 */
-	uint32_t pin_offset = pin % 32;
+	u32_t pin_offset = pin % 32;
 
 	/*
 	 * MAGIC NUMBER: 0x1 is used as the pullup is a single bit in a
diff --git a/drivers/pinmux/stm32/pinmux_stm32.c b/drivers/pinmux/stm32/pinmux_stm32.c
index 0877df561d2..2b89a63b103 100644
--- a/drivers/pinmux/stm32/pinmux_stm32.c
+++ b/drivers/pinmux/stm32/pinmux_stm32.c
@@ -24,7 +24,7 @@
 #include "pinmux.h"
 
 #if defined(CONFIG_CLOCK_CONTROL_STM32_CUBE)
-static const uint32_t ports_enable[STM32_PORTS_MAX] = {
+static const u32_t ports_enable[STM32_PORTS_MAX] = {
 	STM32_PERIPH_GPIOA,
 	STM32_PERIPH_GPIOB,
 	STM32_PERIPH_GPIOC,
@@ -43,7 +43,7 @@ static const uint32_t ports_enable[STM32_PORTS_MAX] = {
 #endif
 };
 #elif defined(CONFIG_SOC_SERIES_STM32F4X)
-static const uint32_t ports_enable[STM32_PORTS_MAX] = {
+static const u32_t ports_enable[STM32_PORTS_MAX] = {
 	STM32F4X_CLOCK_ENABLE_GPIOA,
 	STM32F4X_CLOCK_ENABLE_GPIOB,
 	STM32F4X_CLOCK_ENABLE_GPIOC,
@@ -63,7 +63,7 @@ static const uint32_t ports_enable[STM32_PORTS_MAX] = {
  *
  * @return 0 on success, error otherwise
  */
-static int enable_port(uint32_t port, struct device *clk)
+static int enable_port(u32_t port, struct device *clk)
 {
 	/* enable port clock */
 	if (!clk) {
@@ -97,13 +97,13 @@ static int enable_port(uint32_t port, struct device *clk)
 static int stm32_pin_configure(int pin, int func, int altf)
 {
 	/* determine IO port registers location */
-	uint32_t offset = STM32_PORT(pin) * GPIO_REG_SIZE;
-	uint8_t *port_base = (uint8_t *)(GPIO_PORTS_BASE + offset);
+	u32_t offset = STM32_PORT(pin) * GPIO_REG_SIZE;
+	u8_t *port_base = (u8_t *)(GPIO_PORTS_BASE + offset);
 
 	/* not much here, on STM32F10x the alternate function is
 	 * controller by setting up GPIO pins in specific mode.
 	 */
-	return stm32_gpio_configure((uint32_t *)port_base,
+	return stm32_gpio_configure((u32_t *)port_base,
 				    STM32_PIN(pin), func, altf);
 }
 
@@ -116,7 +116,7 @@ static int stm32_pin_configure(int pin, int func, int altf)
  *
  * @return 0 on success, error otherwise
  */
-int _pinmux_stm32_set(uint32_t pin, uint32_t func,
+int _pinmux_stm32_set(u32_t pin, u32_t func,
 				struct device *clk)
 {
 	int config;
diff --git a/drivers/pinmux/stm32/pinmux_stm32.h b/drivers/pinmux/stm32/pinmux_stm32.h
index d6e481565ac..7c90440773d 100644
--- a/drivers/pinmux/stm32/pinmux_stm32.h
+++ b/drivers/pinmux/stm32/pinmux_stm32.h
@@ -213,7 +213,7 @@ typedef int stm32_pin_func_t;
  * in @funcs array
  */
 struct stm32_pinmux_conf {
-	uint32_t pin;		 /* pin ID */
+	u32_t pin;		 /* pin ID */
 	const stm32_pin_func_t *funcs; /* functions array, indexed with
 					* (stm32_pin_alt_func - 1)
 					*/
@@ -310,7 +310,7 @@ clock_control_subsys_t stm32_get_port_clock(int port);
  * @param clk clock control device, for enabling/disabling clock gate
  * for the port
  */
-int _pinmux_stm32_set(uint32_t pin, uint32_t func,
+int _pinmux_stm32_set(u32_t pin, u32_t func,
 		      struct device *clk);
 
 /**
diff --git a/drivers/pwm/pwm_dw.c b/drivers/pwm/pwm_dw.c
index 4ed530de95a..03c622c4aa3 100644
--- a/drivers/pwm/pwm_dw.c
+++ b/drivers/pwm/pwm_dw.c
@@ -57,10 +57,10 @@
 
 struct pwm_dw_config {
 	/** Base address of registers */
-	uint32_t	addr;
+	u32_t	addr;
 
 	/** Number of ports */
-	uint32_t	num_ports;
+	u32_t	num_ports;
 };
 
 /**
@@ -71,7 +71,7 @@ struct pwm_dw_config {
  *
  * @return The base address of that particular timer
  */
-static inline int pwm_dw_timer_base_addr(struct device *dev, uint32_t timer)
+static inline int pwm_dw_timer_base_addr(struct device *dev, u32_t timer)
 {
 	const struct pwm_dw_config * const cfg =
 	    (struct pwm_dw_config *)dev->config->config_info;
@@ -87,7 +87,7 @@ static inline int pwm_dw_timer_base_addr(struct device *dev, uint32_t timer)
  *
  * @return The load count 2 address of that particular timer
  */
-static inline int pwm_dw_timer_ldcnt2_addr(struct device *dev, uint32_t timer)
+static inline int pwm_dw_timer_ldcnt2_addr(struct device *dev, u32_t timer)
 {
 	const struct pwm_dw_config * const cfg =
 	    (struct pwm_dw_config *)dev->config->config_info;
@@ -97,7 +97,7 @@ static inline int pwm_dw_timer_ldcnt2_addr(struct device *dev, uint32_t timer)
 
 
 static int pwm_dw_configure(struct device *dev, int access_op,
-				 uint32_t pwm, int flags)
+				 u32_t pwm, int flags)
 {
 	ARG_UNUSED(dev);
 	ARG_UNUSED(access_op);
@@ -107,10 +107,10 @@ static int pwm_dw_configure(struct device *dev, int access_op,
 	return 0;
 }
 
-static int __set_one_port(struct device *dev, uint32_t pwm,
-			  uint32_t on, uint32_t off)
+static int __set_one_port(struct device *dev, u32_t pwm,
+			  u32_t on, u32_t off)
 {
-	uint32_t reg_addr;
+	u32_t reg_addr;
 
 	reg_addr = pwm_dw_timer_base_addr(dev, pwm);
 
@@ -153,7 +153,7 @@ static int __set_one_port(struct device *dev, uint32_t pwm,
  * @return 0
  */
 static int pwm_dw_set_values(struct device *dev, int access_op,
-			     uint32_t pwm, uint32_t on, uint32_t off)
+			     u32_t pwm, u32_t on, u32_t off)
 {
 	const struct pwm_dw_config * const cfg =
 	    (struct pwm_dw_config *)dev->config->config_info;
@@ -179,7 +179,7 @@ static int pwm_dw_set_values(struct device *dev, int access_op,
 }
 
 static int pwm_dw_set_duty_cycle(struct device *dev, int access_op,
-				 uint32_t pwm, uint8_t duty)
+				 u32_t pwm, u8_t duty)
 {
 	/* The IP block does not natively support duty cycle settings.
 	 * So need to use set_values().
diff --git a/drivers/pwm/pwm_k64_ftm.c b/drivers/pwm/pwm_k64_ftm.c
index bcf39329d21..3fa23191678 100644
--- a/drivers/pwm/pwm_k64_ftm.c
+++ b/drivers/pwm/pwm_k64_ftm.c
@@ -70,7 +70,7 @@
  * @return 0 if successful, failed otherwise
  */
 
-static int pwm_ftm_clk_enable(uint8_t ftm_num)
+static int pwm_ftm_clk_enable(u8_t ftm_num)
 {
 
 	volatile struct K20_SIM *sim =
@@ -105,15 +105,15 @@ static int pwm_ftm_clk_enable(uint8_t ftm_num)
  */
 
 static int pwm_ftm_configure(struct device *dev, int access_op,
-			     uint32_t channel, int flags)
+			     u32_t channel, int flags)
 {
 	int return_val = 0;
 
-	uint32_t clock_source;
-	uint32_t prescale;
-	uint32_t polarity;
+	u32_t clock_source;
+	u32_t prescale;
+	u32_t polarity;
 
-	uint32_t reg_val;
+	u32_t reg_val;
 
 
 	SYS_LOG_DBG("...");
@@ -265,7 +265,7 @@ static int pwm_ftm_configure(struct device *dev, int access_op,
  */
 
 static int pwm_ftm_set_values(struct device *dev, int access_op,
-			      uint32_t channel, uint32_t on, uint32_t off)
+			      u32_t channel, u32_t on, u32_t off)
 {
 	const struct pwm_ftm_config * const config =
 		dev->config->config_info;
@@ -274,8 +274,8 @@ static int pwm_ftm_set_values(struct device *dev, int access_op,
 
 	SYS_LOG_DBG("(on=%d, off=%d)", on, off);
 
-	uint32_t pwm_pair;
-	uint32_t combine;
+	u32_t pwm_pair;
+	u32_t combine;
 
 	switch (access_op) {
 	case PWM_ACCESS_BY_PIN:
@@ -451,9 +451,9 @@ static int pwm_ftm_set_values(struct device *dev, int access_op,
  */
 
 static int pwm_ftm_set_duty_cycle(struct device *dev, int access_op,
-				  uint32_t channel, uint8_t duty)
+				  u32_t channel, u8_t duty)
 {
-	uint32_t on, off;
+	u32_t on, off;
 
 	const struct pwm_ftm_config * const config =
 		dev->config->config_info;
@@ -546,7 +546,7 @@ static int pwm_ftm_set_duty_cycle(struct device *dev, int access_op,
  */
 
 static int pwm_ftm_set_phase(struct device *dev, int access_op,
-			     uint32_t channel, uint8_t phase)
+			     u32_t channel, u8_t phase)
 {
 
 #ifdef COMBINE_MODE_SUPPORT
@@ -618,7 +618,7 @@ static int pwm_ftm_set_phase(struct device *dev, int access_op,
  * @param power_state device power state to be saved
  * @return N/A
  */
-static void pwm_ftm_set_power_state(struct device *dev, uint32_t power_state)
+static void pwm_ftm_set_power_state(struct device *dev, u32_t power_state)
 {
 	struct pwm_ftm_drv_data *context = dev->driver_data;
 
@@ -634,7 +634,7 @@ static void pwm_ftm_set_power_state(struct device *dev, uint32_t power_state)
  * @param dev Device struct
  * @return device power state
  */
-static uint32_t pwm_ftm_get_power_state(struct device *dev)
+static u32_t pwm_ftm_get_power_state(struct device *dev)
 {
 	struct pwm_ftm_drv_data *context = dev->driver_data;
 
@@ -653,7 +653,7 @@ static uint32_t pwm_ftm_get_power_state(struct device *dev)
 
 static int pwm_ftm_suspend(struct device *dev)
 {
-	uint32_t reg_val;
+	u32_t reg_val;
 
 	const struct pwm_ftm_config * const config =
 		dev->config->config_info;
@@ -689,8 +689,8 @@ static int pwm_ftm_suspend(struct device *dev)
  */
 static int pwm_ftm_resume_from_suspend(struct device *dev)
 {
-	uint32_t clock_source;
-	uint32_t reg_val;
+	u32_t clock_source;
+	u32_t reg_val;
 
 	/* set clock source to config value */
 
@@ -721,17 +721,17 @@ static int pwm_ftm_resume_from_suspend(struct device *dev)
 * Implements the driver control management functionality
 * the *context may include IN data or/and OUT data
 */
-static int pwm_ftm_device_ctrl(struct device *dev, uint32_t ctrl_command,
+static int pwm_ftm_device_ctrl(struct device *dev, u32_t ctrl_command,
 			       void *context)
 {
 	if (ctrl_command == DEVICE_PM_SET_POWER_STATE) {
-		if (*((uint32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
+		if (*((u32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
 			return pwm_ftm_suspend(dev);
-		} else if (*((uint32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
+		} else if (*((u32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
 			return pwm_ftm_resume_from_suspend(dev);
 		}
 	} else if (ctrl_command == DEVICE_PM_GET_POWER_STATE) {
-		*((uint32_t *)context) = pwm_ftm_get_power_state(dev);
+		*((u32_t *)context) = pwm_ftm_get_power_state(dev);
 		return 0;
 	}
 
diff --git a/drivers/pwm/pwm_k64_ftm.h b/drivers/pwm/pwm_k64_ftm.h
index 9bf17069e07..acd4bfb7a82 100644
--- a/drivers/pwm/pwm_k64_ftm.h
+++ b/drivers/pwm/pwm_k64_ftm.h
@@ -145,16 +145,16 @@ extern int pwm_ftm_init(struct device *dev);
 struct pwm_ftm_config {
 
 	/* FTM register base address */
-	uint32_t ftm_num;
+	u32_t ftm_num;
 
 	/* FTM register base address */
-	uint32_t reg_base;
+	u32_t reg_base;
 
 	/* FTM prescale (1,2,4,8,16,32,64,128) */
-	uint32_t prescale;
+	u32_t prescale;
 
 	/* FTM clock source  */
-	uint32_t clock_source;
+	u32_t clock_source;
 
 	/* If phase is not 0, the odd-numbered channel is not available */
 	bool phase_enable0;  /* combine pwm0, pwm1 for phase capability */
@@ -163,15 +163,15 @@ struct pwm_ftm_config {
 	bool phase_enable6;  /* combine pwm6, pwm5 for phase capability */
 
 	/* FTM period (clock ticks) */
-	uint32_t period;
+	u32_t period;
 
 };
 
 /** Runtime driver data */
 struct pwm_ftm_drv_data {
-	uint32_t phase[4];
+	u32_t phase[4];
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
-	uint32_t device_power_state;
+	u32_t device_power_state;
 #endif
 };
 
diff --git a/drivers/pwm/pwm_nrf5_sw.c b/drivers/pwm/pwm_nrf5_sw.c
index 50d20cafb98..ddc8d1156da 100644
--- a/drivers/pwm/pwm_nrf5_sw.c
+++ b/drivers/pwm/pwm_nrf5_sw.c
@@ -10,26 +10,26 @@
 
 struct pwm_config {
 	NRF_TIMER_Type *timer;
-	uint8_t gpiote_base;
-	uint8_t ppi_base;
-	uint8_t map_size;
+	u8_t gpiote_base;
+	u8_t ppi_base;
+	u8_t map_size;
 };
 
 struct chan_map {
-	uint32_t pwm;
-	uint32_t pulse_cycles;
+	u32_t pwm;
+	u32_t pulse_cycles;
 };
 
 struct pwm_data {
-	uint32_t period_cycles;
+	u32_t period_cycles;
 	struct chan_map map[];
 };
 
-static uint32_t pwm_period_check(struct pwm_data *data, uint8_t map_size,
-				 uint32_t pwm, uint32_t period_cycles,
-				 uint32_t pulse_cycles)
+static u32_t pwm_period_check(struct pwm_data *data, u8_t map_size,
+				 u32_t pwm, u32_t period_cycles,
+				 u32_t pulse_cycles)
 {
-	uint8_t i;
+	u8_t i;
 
 	/* allow 0% and 100% duty cycle, as it does not use PWM. */
 	if ((pulse_cycles == 0) || (pulse_cycles == period_cycles)) {
@@ -48,10 +48,10 @@ static uint32_t pwm_period_check(struct pwm_data *data, uint8_t map_size,
 	return 0;
 }
 
-static uint8_t pwm_channel_map(struct pwm_data *data, uint8_t map_size,
-			       uint32_t pwm)
+static u8_t pwm_channel_map(struct pwm_data *data, u8_t map_size,
+			       u32_t pwm)
 {
-	uint8_t i;
+	u8_t i;
 
 	/* find pin, if already present */
 	for (i = 0; i < map_size; i++) {
@@ -71,16 +71,16 @@ static uint8_t pwm_channel_map(struct pwm_data *data, uint8_t map_size,
 	return i;
 }
 
-static int pwm_nrf5_sw_pin_set(struct device *dev, uint32_t pwm,
-			       uint32_t period_cycles, uint32_t pulse_cycles)
+static int pwm_nrf5_sw_pin_set(struct device *dev, u32_t pwm,
+			       u32_t period_cycles, u32_t pulse_cycles)
 {
 	struct pwm_config *config;
 	NRF_TIMER_Type *timer;
 	struct pwm_data *data;
-	uint8_t ppi_index;
-	uint8_t channel;
-	uint16_t div;
-	uint32_t ret;
+	u8_t ppi_index;
+	u8_t channel;
+	u16_t div;
+	u32_t ret;
 
 	config = (struct pwm_config *)dev->config->config_info;
 	timer = config->timer;
@@ -154,13 +154,13 @@ static int pwm_nrf5_sw_pin_set(struct device *dev, uint32_t pwm,
 							    (pwm << 8);
 
 	/* setup PPI */
-	NRF_PPI->CH[ppi_index].EEP = (uint32_t)
+	NRF_PPI->CH[ppi_index].EEP = (u32_t)
 				     &(timer->EVENTS_COMPARE[channel]);
-	NRF_PPI->CH[ppi_index].TEP = (uint32_t)
+	NRF_PPI->CH[ppi_index].TEP = (u32_t)
 				     &(NRF_GPIOTE->TASKS_OUT[channel]);
-	NRF_PPI->CH[ppi_index + 1].EEP = (uint32_t)
+	NRF_PPI->CH[ppi_index + 1].EEP = (u32_t)
 					 &(timer->EVENTS_COMPARE[3]);
-	NRF_PPI->CH[ppi_index + 1].TEP = (uint32_t)
+	NRF_PPI->CH[ppi_index + 1].TEP = (u32_t)
 					 &(NRF_GPIOTE->TASKS_OUT[channel]);
 	NRF_PPI->CHENSET = BIT(ppi_index) | BIT(ppi_index + 1);
 
@@ -180,8 +180,8 @@ pin_set_pwm_off:
 	return 0;
 }
 
-static int pwm_nrf5_sw_get_cycles_per_sec(struct device *dev, uint32_t pwm,
-					  uint64_t *cycles)
+static int pwm_nrf5_sw_get_cycles_per_sec(struct device *dev, u32_t pwm,
+					  u64_t *cycles)
 {
 	struct pwm_config *config;
 
@@ -213,7 +213,7 @@ static const struct pwm_config pwm_nrf5_sw_0_config = {
 
 #define PWM_0_DATA_SIZE (offsetof(struct pwm_data, map) + \
 			 sizeof(struct chan_map) * PWM_0_MAP_SIZE)
-static uint8_t pwm_nrf5_sw_0_data[PWM_0_DATA_SIZE];
+static u8_t pwm_nrf5_sw_0_data[PWM_0_DATA_SIZE];
 
 DEVICE_AND_API_INIT(pwm_nrf5_sw_0, CONFIG_PWM_NRF5_SW_0_DEV_NAME,
 		    pwm_nrf5_sw_init, pwm_nrf5_sw_0_data, &pwm_nrf5_sw_0_config,
diff --git a/drivers/pwm/pwm_pca9685.c b/drivers/pwm/pwm_pca9685.c
index 5457f14718d..9b4712ebc0a 100644
--- a/drivers/pwm/pwm_pca9685.c
+++ b/drivers/pwm/pwm_pca9685.c
@@ -56,7 +56,7 @@ static inline int _has_i2c_master(struct device *dev)
 }
 
 static int pwm_pca9685_configure(struct device *dev, int access_op,
-				 uint32_t pwm, int flags)
+				 u32_t pwm, int flags)
 {
 	ARG_UNUSED(dev);
 	ARG_UNUSED(access_op);
@@ -67,15 +67,15 @@ static int pwm_pca9685_configure(struct device *dev, int access_op,
 }
 
 static int pwm_pca9685_set_values(struct device *dev, int access_op,
-				  uint32_t pwm, uint32_t on, uint32_t off)
+				  u32_t pwm, u32_t on, u32_t off)
 {
 	const struct pwm_pca9685_config * const config =
 		dev->config->config_info;
 	struct pwm_pca9685_drv_data * const drv_data =
 		(struct pwm_pca9685_drv_data * const)dev->driver_data;
 	struct device * const i2c_master = drv_data->i2c_master;
-	uint16_t i2c_addr = config->i2c_slave_addr;
-	uint8_t buf[] = { 0, 0, 0, 0, 0};
+	u16_t i2c_addr = config->i2c_slave_addr;
+	u8_t buf[] = { 0, 0, 0, 0, 0};
 
 	if (!_has_i2c_master(dev)) {
 		return -EINVAL;
@@ -124,9 +124,9 @@ static int pwm_pca9685_set_values(struct device *dev, int access_op,
  * to the ON state.
  */
 static int pwm_pca9685_set_duty_cycle(struct device *dev, int access_op,
-				      uint32_t pwm, uint8_t duty)
+				      u32_t pwm, u8_t duty)
 {
-	uint32_t on, off, phase;
+	u32_t on, off, phase;
 
 	phase = 0;     /* Hard coded until API changes */
 
@@ -165,7 +165,7 @@ int pwm_pca9685_init(struct device *dev)
 	struct pwm_pca9685_drv_data * const drv_data =
 		(struct pwm_pca9685_drv_data * const)dev->driver_data;
 	struct device *i2c_master;
-	uint8_t buf[] = {0, 0};
+	u8_t buf[] = {0, 0};
 	int ret;
 
 	/* Find out the device struct of the I2C master */
diff --git a/drivers/pwm/pwm_pca9685.h b/drivers/pwm/pwm_pca9685.h
index e6ddb77e3c3..03b41fc25a6 100644
--- a/drivers/pwm/pwm_pca9685.h
+++ b/drivers/pwm/pwm_pca9685.h
@@ -32,8 +32,8 @@ struct pwm_pca9685_config {
 	const char * const i2c_master_dev_name;
 
 	/** The slave address of the chip */
-	uint16_t i2c_slave_addr;
-	uint8_t stride[2];
+	u16_t i2c_slave_addr;
+	u8_t stride[2];
 };
 
 /** Runtime driver data */
diff --git a/drivers/pwm/pwm_qmsi.c b/drivers/pwm/pwm_qmsi.c
index f7d78aa0b24..369bdae70d5 100644
--- a/drivers/pwm/pwm_qmsi.c
+++ b/drivers/pwm/pwm_qmsi.c
@@ -20,8 +20,8 @@
 				   USEC_PER_SEC)
 
 /* pwm uses 32 bits counter to control low and high period */
-#define MAX_LOW_PERIOD_IN_HW_CLOCK_CYCLES (((uint64_t)1) << 32)
-#define MAX_HIGH_PERIOD_IN_HW_CLOCK_CYCLES (((uint64_t)1) << 32)
+#define MAX_LOW_PERIOD_IN_HW_CLOCK_CYCLES (((u64_t)1) << 32)
+#define MAX_HIGH_PERIOD_IN_HW_CLOCK_CYCLES (((u64_t)1) << 32)
 
 #define MAX_PERIOD_IN_HW_CLOCK_CYCLES (MAX_LOW_PERIOD_IN_HW_CLOCK_CYCLES + \
 				       MAX_HIGH_PERIOD_IN_HW_CLOCK_CYCLES)
@@ -44,9 +44,9 @@ struct pwm_data {
 	struct k_sem sem;
 #endif
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
-	uint32_t device_power_state;
+	u32_t device_power_state;
 #endif
-	uint32_t channel_period[CONFIG_PWM_QMSI_NUM_PORTS];
+	u32_t channel_period[CONFIG_PWM_QMSI_NUM_PORTS];
 };
 
 static struct pwm_data pwm_context;
@@ -58,7 +58,7 @@ static struct pwm_data pwm_context;
 #endif
 
 static int pwm_qmsi_configure(struct device *dev, int access_op,
-				 uint32_t pwm, int flags)
+				 u32_t pwm, int flags)
 {
 	ARG_UNUSED(dev);
 	ARG_UNUSED(access_op);
@@ -68,8 +68,8 @@ static int pwm_qmsi_configure(struct device *dev, int access_op,
 	return 0;
 }
 
-static int __set_one_port(struct device *dev, qm_pwm_t id, uint32_t pwm,
-				uint32_t on, uint32_t off)
+static int __set_one_port(struct device *dev, qm_pwm_t id, u32_t pwm,
+				u32_t on, u32_t off)
 {
 	qm_pwm_config_t cfg;
 	int ret_val = 0;
@@ -145,10 +145,10 @@ pwm_set_port_return:
  * return 0, or negative errno code
  */
 static int pwm_qmsi_set_values(struct device *dev, int access_op,
-			       uint32_t pwm, uint32_t on, uint32_t off)
+			       u32_t pwm, u32_t on, u32_t off)
 {
 	struct pwm_data *context = dev->driver_data;
-	uint32_t *channel_period = context->channel_period;
+	u32_t *channel_period = context->channel_period;
 	int i, high, low;
 
 	if (on) {
@@ -206,10 +206,10 @@ static int pwm_qmsi_set_values(struct device *dev, int access_op,
 }
 
 static int pwm_qmsi_set_period(struct device *dev, int access_op,
-			       uint32_t pwm, uint32_t period)
+			       u32_t pwm, u32_t period)
 {
 	struct pwm_data *context = dev->driver_data;
-	uint32_t *channel_period = context->channel_period;
+	u32_t *channel_period = context->channel_period;
 	int ret_val = 0;
 
 	if (channel_period == NULL) {
@@ -252,11 +252,11 @@ pwm_set_period_return:
 }
 
 static int pwm_qmsi_set_duty_cycle(struct device *dev, int access_op,
-				   uint32_t pwm, uint8_t duty)
+				   u32_t pwm, u8_t duty)
 {
 	struct pwm_data *context = dev->driver_data;
-	uint32_t *channel_period = context->channel_period;
-	uint32_t on, off;
+	u32_t *channel_period = context->channel_period;
+	u32_t on, off;
 
 	if (channel_period == NULL) {
 		return -EIO;
@@ -300,7 +300,7 @@ static int pwm_qmsi_set_duty_cycle(struct device *dev, int access_op,
 }
 
 static int pwm_qmsi_set_phase(struct device *dev, int access_op,
-			      uint32_t pwm, uint8_t phase)
+			      u32_t pwm, u8_t phase)
 {
 	ARG_UNUSED(dev);
 	ARG_UNUSED(access_op);
@@ -326,10 +326,10 @@ static int pwm_qmsi_set_phase(struct device *dev, int access_op,
  *
  * return 0, or negative errno code
  */
-static int pwm_qmsi_pin_set(struct device *dev, uint32_t pwm,
-			    uint32_t period_cycles, uint32_t pulse_cycles)
+static int pwm_qmsi_pin_set(struct device *dev, u32_t pwm,
+			    u32_t period_cycles, u32_t pulse_cycles)
 {
-	uint32_t high, low;
+	u32_t high, low;
 
 	if (pwm >= CONFIG_PWM_QMSI_NUM_PORTS) {
 		return -EINVAL;
@@ -364,14 +364,14 @@ static int pwm_qmsi_pin_set(struct device *dev, uint32_t pwm,
  *
  * return 0, or negative errno code
  */
-static int pwm_qmsi_get_cycles_per_sec(struct device *dev, uint32_t pwm,
-				       uint64_t *cycles)
+static int pwm_qmsi_get_cycles_per_sec(struct device *dev, u32_t pwm,
+				       u64_t *cycles)
 {
 	if (cycles == NULL) {
 		return -EINVAL;
 	}
 
-	*cycles = (uint64_t)clk_sys_get_ticks_per_us() * USEC_PER_SEC;
+	*cycles = (u64_t)clk_sys_get_ticks_per_us() * USEC_PER_SEC;
 
 	return 0;
 }
@@ -387,7 +387,7 @@ static const struct pwm_driver_api pwm_qmsi_drv_api_funcs = {
 };
 
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
-static void pwm_qmsi_set_power_state(struct device *dev, uint32_t power_state)
+static void pwm_qmsi_set_power_state(struct device *dev, u32_t power_state)
 {
 	struct pwm_data *context = dev->driver_data;
 
@@ -400,7 +400,7 @@ static void pwm_qmsi_set_power_state(struct device *dev, uint32_t power_state)
 static int pwm_qmsi_init(struct device *dev)
 {
 	struct pwm_data *context = dev->driver_data;
-	uint32_t *channel_period = context->channel_period;
+	u32_t *channel_period = context->channel_period;
 
 	for (int i = 0; i < CONFIG_PWM_QMSI_NUM_PORTS; i++) {
 		channel_period[i] = DEFAULT_PERIOD *
@@ -422,7 +422,7 @@ static int pwm_qmsi_init(struct device *dev)
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
 static qm_pwm_context_t pwm_ctx;
 
-static uint32_t pwm_qmsi_get_power_state(struct device *dev)
+static u32_t pwm_qmsi_get_power_state(struct device *dev)
 {
 	struct pwm_data *context = dev->driver_data;
 
@@ -451,17 +451,17 @@ static int pwm_qmsi_resume_from_suspend(struct device *dev)
 * Implements the driver control management functionality
 * the *context may include IN data or/and OUT data
 */
-static int pwm_qmsi_device_ctrl(struct device *dev, uint32_t ctrl_command,
+static int pwm_qmsi_device_ctrl(struct device *dev, u32_t ctrl_command,
 				void *context)
 {
 	if (ctrl_command == DEVICE_PM_SET_POWER_STATE) {
-		if (*((uint32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
+		if (*((u32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
 			return pwm_qmsi_suspend(dev);
-		} else if (*((uint32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
+		} else if (*((u32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
 			return pwm_qmsi_resume_from_suspend(dev);
 		}
 	} else if (ctrl_command == DEVICE_PM_GET_POWER_STATE) {
-		*((uint32_t *)context) = pwm_qmsi_get_power_state(dev);
+		*((u32_t *)context) = pwm_qmsi_get_power_state(dev);
 		return 0;
 	}
 
diff --git a/drivers/pwm/pwm_stm32.c b/drivers/pwm/pwm_stm32.c
index dcf0134f1a2..6ee3a0fecd0 100644
--- a/drivers/pwm/pwm_stm32.c
+++ b/drivers/pwm/pwm_stm32.c
@@ -32,11 +32,11 @@
 #define CHANNEL_LENGTH 4
 
 #ifdef CONFIG_CLOCK_CONTROL_STM32_CUBE
-static uint32_t __get_tim_clk(uint32_t bus_clk,
+static u32_t __get_tim_clk(u32_t bus_clk,
 			      clock_control_subsys_t *sub_system)
 {
 	struct stm32_pclken *pclken = (struct stm32_pclken *)(sub_system);
-	uint32_t tim_clk, apb_psc;
+	u32_t tim_clk, apb_psc;
 
 	if (pclken->bus == STM32_CLOCK_BUS_APB1) {
 		apb_psc = CONFIG_CLOCK_STM32_APB1_PRESCALER;
@@ -54,11 +54,11 @@ static uint32_t __get_tim_clk(uint32_t bus_clk,
 }
 #else
 #ifdef CONFIG_SOC_SERIES_STM32F4X
-static uint32_t __get_tim_clk(uint32_t bus_clk,
+static u32_t __get_tim_clk(u32_t bus_clk,
 			      clock_control_subsys_t *sub_system)
 {
 	struct stm32f4x_pclken *pclken = (struct stm32f4x_pclken *)(sub_system);
-	uint32_t tim_clk, apb_psc;
+	u32_t tim_clk, apb_psc;
 
 	if (pclken->bus == STM32F4X_CLOCK_BUS_APB1) {
 		apb_psc = CONFIG_CLOCK_STM32F4X_APB1_PRESCALER;
@@ -77,11 +77,11 @@ static uint32_t __get_tim_clk(uint32_t bus_clk,
 
 #else
 
-static uint32_t __get_tim_clk(uint32_t bus_clk,
+static u32_t __get_tim_clk(u32_t bus_clk,
 			      clock_control_subsys_t sub_system)
 {
-	uint32_t tim_clk, apb_psc;
-	uint32_t subsys = POINTER_TO_UINT(sub_system);
+	u32_t tim_clk, apb_psc;
+	u32_t subsys = POINTER_TO_UINT(sub_system);
 
 	if (subsys > STM32F10X_CLOCK_APB2_BASE) {
 		apb_psc = CONFIG_CLOCK_STM32F10X_APB2_PRESCALER;
@@ -111,13 +111,13 @@ static uint32_t __get_tim_clk(uint32_t bus_clk,
  *
  * return 0, or negative errno code
  */
-static int pwm_stm32_pin_set(struct device *dev, uint32_t pwm,
-			     uint32_t period_cycles, uint32_t pulse_cycles)
+static int pwm_stm32_pin_set(struct device *dev, u32_t pwm,
+			     u32_t period_cycles, u32_t pulse_cycles)
 {
 	struct pwm_stm32_data *data = DEV_DATA(dev);
 	TIM_HandleTypeDef *TimerHandle = &data->hpwm;
 	TIM_OC_InitTypeDef sConfig;
-	uint32_t channel;
+	u32_t channel;
 	bool counter_32b;
 
 	if (period_cycles == 0 || pulse_cycles > period_cycles) {
@@ -188,12 +188,12 @@ static int pwm_stm32_pin_set(struct device *dev, uint32_t pwm,
  *
  * return 0, or negative errno code
  */
-static int pwm_stm32_get_cycles_per_sec(struct device *dev, uint32_t pwm,
-					uint64_t *cycles)
+static int pwm_stm32_get_cycles_per_sec(struct device *dev, u32_t pwm,
+					u64_t *cycles)
 {
 	const struct pwm_stm32_config *cfg = DEV_CFG(dev);
 	struct pwm_stm32_data *data = DEV_DATA(dev);
-	uint32_t bus_clk, tim_clk;
+	u32_t bus_clk, tim_clk;
 
 	if (cycles == NULL) {
 		return -EINVAL;
@@ -213,7 +213,7 @@ static int pwm_stm32_get_cycles_per_sec(struct device *dev, uint32_t pwm,
 	tim_clk = __get_tim_clk(bus_clk, cfg->clock_subsys);
 #endif
 
-	*cycles = (uint64_t)(tim_clk / (data->pwm_prescaler + 1));
+	*cycles = (u64_t)(tim_clk / (data->pwm_prescaler + 1));
 
 	return 0;
 }
diff --git a/drivers/pwm/pwm_stm32.h b/drivers/pwm/pwm_stm32.h
index 779002ee82f..6a53fed7b84 100644
--- a/drivers/pwm/pwm_stm32.h
+++ b/drivers/pwm/pwm_stm32.h
@@ -17,7 +17,7 @@ extern "C" {
 
 /** Configuration data */
 struct pwm_stm32_config {
-	uint32_t pwm_base;
+	u32_t pwm_base;
 	/* clock subsystem driving this peripheral */
 #ifdef CONFIG_CLOCK_CONTROL_STM32_CUBE
 	struct stm32_pclken pclken;
@@ -38,7 +38,7 @@ struct pwm_stm32_data {
 	 * Value used to divide the TIM clock.
 	 * Min = 0x0000U, Max = 0xFFFFU
 	 */
-	uint32_t pwm_prescaler;
+	u32_t pwm_prescaler;
 	/* clock device */
 	struct device *clock;
 };
diff --git a/drivers/random/rand32_timer.c b/drivers/random/rand32_timer.c
index 3f2e881bbff..5ceb0a2bd92 100644
--- a/drivers/random/rand32_timer.c
+++ b/drivers/random/rand32_timer.c
@@ -40,7 +40,7 @@ static atomic_val_t _rand32_counter;
  * @return a 32-bit number
  */
 
-uint32_t sys_rand32_get(void)
+u32_t sys_rand32_get(void)
 {
 	return k_cycle_get_32() + atomic_add(&_rand32_counter, _RAND32_INC);
 }
diff --git a/drivers/random/rand32_timestamp.c b/drivers/random/rand32_timestamp.c
index 8253dacfe05..0d6b7bd7f34 100644
--- a/drivers/random/rand32_timestamp.c
+++ b/drivers/random/rand32_timestamp.c
@@ -29,7 +29,7 @@
  * @return a 32-bit number
  */
 
-uint32_t sys_rand32_get(void)
+u32_t sys_rand32_get(void)
 {
 	return _do_read_cpu_timestamp32();
 }
diff --git a/drivers/random/random_mcux_rnga.c b/drivers/random/random_mcux_rnga.c
index eea52471c32..abe1fd0ed61 100644
--- a/drivers/random/random_mcux_rnga.c
+++ b/drivers/random/random_mcux_rnga.c
@@ -11,10 +11,10 @@
 
 #include "fsl_rnga.h"
 
-static uint8_t random_mcux_rnga_get_uint8(void)
+static u8_t random_mcux_rnga_get_uint8(void)
 {
-	uint32_t random;
-	uint8_t output = 0;
+	u32_t random;
+	u8_t output = 0;
 	int i;
 
 	RNGA_SetMode(RNG, kRNGA_ModeNormal);
@@ -36,8 +36,8 @@ static uint8_t random_mcux_rnga_get_uint8(void)
 	return output;
 }
 
-static int random_mcux_rnga_get_entropy(struct device *dev, uint8_t *buffer,
-					uint16_t length)
+static int random_mcux_rnga_get_entropy(struct device *dev, u8_t *buffer,
+					u16_t length)
 {
 	int i;
 
@@ -63,7 +63,7 @@ DEVICE_AND_API_INIT(random_mcux_rnga, CONFIG_RANDOM_NAME,
 
 static int random_mcux_rnga_init(struct device *dev)
 {
-	uint32_t seed = k_cycle_get_32();
+	u32_t seed = k_cycle_get_32();
 
 	ARG_UNUSED(dev);
 
@@ -80,13 +80,13 @@ static int random_mcux_rnga_init(struct device *dev)
 	return 0;
 }
 
-uint32_t sys_rand32_get(void)
+u32_t sys_rand32_get(void)
 {
-	uint32_t output;
+	u32_t output;
 	int r;
 
 	r = random_mcux_rnga_get_entropy(DEVICE_GET(random_mcux_rnga),
-					 (uint8_t *) &output, sizeof(output));
+					 (u8_t *) &output, sizeof(output));
 	__ASSERT_NO_MSG(!r);
 
 	return output;
diff --git a/drivers/random/random_mcux_trng.c b/drivers/random/random_mcux_trng.c
index 5679d170506..3d75c4dc81d 100644
--- a/drivers/random/random_mcux_trng.c
+++ b/drivers/random/random_mcux_trng.c
@@ -11,8 +11,8 @@
 
 #include "fsl_trng.h"
 
-static int random_mcux_trng_get_entropy(struct device *dev, uint8_t *buffer,
-					uint16_t length)
+static int random_mcux_trng_get_entropy(struct device *dev, u8_t *buffer,
+					u16_t length)
 {
 	status_t status;
 
@@ -51,13 +51,13 @@ static int random_mcux_trng_init(struct device *dev)
 	return 0;
 }
 
-uint32_t sys_rand32_get(void)
+u32_t sys_rand32_get(void)
 {
-	uint32_t output;
+	u32_t output;
 	int rc;
 
 	rc = random_mcux_trng_get_entropy(DEVICE_GET(random_mcux_trng),
-					  (uint8_t *) &output, sizeof(output));
+					  (u8_t *) &output, sizeof(output));
 	__ASSERT_NO_MSG(!rc);
 
 	return output;
diff --git a/drivers/rtc/rtc_qmsi.c b/drivers/rtc/rtc_qmsi.c
index c064e95503b..7c95e7e4dcd 100644
--- a/drivers/rtc/rtc_qmsi.c
+++ b/drivers/rtc/rtc_qmsi.c
@@ -23,7 +23,7 @@ struct rtc_data {
 	struct k_sem sem;
 #endif
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
-	uint32_t device_power_state;
+	u32_t device_power_state;
 #endif
 };
 
@@ -45,14 +45,14 @@ static struct rtc_data rtc_context;
 
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
 
-static void rtc_qmsi_set_power_state(struct device *dev, uint32_t power_state)
+static void rtc_qmsi_set_power_state(struct device *dev, u32_t power_state)
 {
 	struct rtc_data *context = dev->driver_data;
 
 	context->device_power_state = power_state;
 }
 
-static uint32_t rtc_qmsi_get_power_state(struct device *dev)
+static u32_t rtc_qmsi_get_power_state(struct device *dev)
 {
 	struct rtc_data *context = dev->driver_data;
 
@@ -112,17 +112,17 @@ static int rtc_qmsi_set_config(struct device *dev, struct rtc_config *cfg)
 	return result;
 }
 
-static int rtc_qmsi_set_alarm(struct device *dev, const uint32_t alarm_val)
+static int rtc_qmsi_set_alarm(struct device *dev, const u32_t alarm_val)
 {
 	return qm_rtc_set_alarm(QM_RTC_0, alarm_val);
 }
 
-static uint32_t rtc_qmsi_read(struct device *dev)
+static u32_t rtc_qmsi_read(struct device *dev)
 {
 	return QM_RTC[QM_RTC_0]->rtc_ccvr;
 }
 
-static uint32_t rtc_qmsi_get_pending_int(struct device *dev)
+static u32_t rtc_qmsi_get_pending_int(struct device *dev)
 {
 	return QM_RTC[QM_RTC_0]->rtc_stat;
 }
@@ -183,17 +183,17 @@ static int rtc_resume_device(struct device *dev)
 * Implements the driver control management functionality
 * the *context may include IN data or/and OUT data
 */
-static int rtc_qmsi_device_ctrl(struct device *dev, uint32_t ctrl_command,
+static int rtc_qmsi_device_ctrl(struct device *dev, u32_t ctrl_command,
 				void *context)
 {
 	if (ctrl_command == DEVICE_PM_SET_POWER_STATE) {
-		if (*((uint32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
+		if (*((u32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
 			return rtc_suspend_device(dev);
-		} else if (*((uint32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
+		} else if (*((u32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
 			return rtc_resume_device(dev);
 		}
 	} else if (ctrl_command == DEVICE_PM_GET_POWER_STATE) {
-		*((uint32_t *)context) = rtc_qmsi_get_power_state(dev);
+		*((u32_t *)context) = rtc_qmsi_get_power_state(dev);
 		return 0;
 	}
 
diff --git a/drivers/sensor/adxl362/adxl362.c b/drivers/sensor/adxl362/adxl362.c
index 5be89c3e372..5eb769c2cc2 100644
--- a/drivers/sensor/adxl362/adxl362.c
+++ b/drivers/sensor/adxl362/adxl362.c
@@ -20,11 +20,11 @@
 
 static struct adxl362_data adxl362_data;
 
-static int adxl362_set_reg(struct device *dev, uint16_t register_value,
-			   uint8_t register_address, uint8_t count)
+static int adxl362_set_reg(struct device *dev, u16_t register_value,
+			   u8_t register_address, u8_t count)
 {
 	struct adxl362_data *adxl362_data = dev->driver_data;
-	uint8_t buffer[4];
+	u8_t buffer[4];
 	int ret;
 
 	buffer[0] = ADXL362_WRITE_REG;
@@ -49,12 +49,12 @@ static int adxl362_set_reg(struct device *dev, uint16_t register_value,
 	return 0;
 }
 
-static int adxl362_get_reg(struct device *dev, uint8_t *read_buf,
-			   uint8_t register_address, uint8_t count)
+static int adxl362_get_reg(struct device *dev, u8_t *read_buf,
+			   u8_t register_address, u8_t count)
 {
 	struct adxl362_data *adxl362_data = dev->driver_data;
-	uint8_t buffer[4];
-	uint8_t index;
+	u8_t buffer[4];
+	u8_t index;
 	int ret;
 
 	buffer[0] = ADXL362_READ_REG;
@@ -90,10 +90,10 @@ static int adxl362_software_reset(struct device *dev)
 			       ADXL362_REG_SOFT_RESET, 1);
 }
 
-static int adxl362_set_power_mode(struct device *dev, uint8_t mode)
+static int adxl362_set_power_mode(struct device *dev, u8_t mode)
 {
-	uint8_t old_power_ctl;
-	uint8_t new_power_ctl;
+	u8_t old_power_ctl;
+	u8_t new_power_ctl;
 	int ret;
 
 	ret = adxl362_get_reg(dev, &old_power_ctl, ADXL362_REG_POWER_CTL, 1);
@@ -112,12 +112,12 @@ static int adxl362_set_power_mode(struct device *dev, uint8_t mode)
  * Output data rate map with allowed frequencies:
  * freq = freq_int + freq_milli / 1000
  *
- * Since we don't need a finer frequency resolution than milliHz, use uint16_t
+ * Since we don't need a finer frequency resolution than milliHz, use u16_t
  * to save some flash.
  */
 static const struct {
-	uint16_t freq_int;
-	uint16_t freq_milli; /* User should convert to uHz before setting the
+	u16_t freq_int;
+	u16_t freq_milli; /* User should convert to uHz before setting the
 			      * SENSOR_ATTR_SAMPLING_FREQUENCY attribute.
 			      */
 } adxl362_odr_map[] = {
@@ -129,7 +129,7 @@ static const struct {
 	{ 400, 0 },
 };
 
-static int adxl362_freq_to_odr_val(uint16_t freq_int, uint16_t freq_milli)
+static int adxl362_freq_to_odr_val(u16_t freq_int, u16_t freq_milli)
 {
 	size_t i;
 
@@ -150,15 +150,15 @@ static int adxl362_freq_to_odr_val(uint16_t freq_int, uint16_t freq_milli)
 }
 
 static const struct adxl362_range {
-	uint16_t range;
-	uint8_t reg_val;
+	u16_t range;
+	u8_t reg_val;
 } adxl362_acc_range_map[] = {
 	{2,	ADXL362_RANGE_2G},
 	{4,	ADXL362_RANGE_4G},
 	{8,	ADXL362_RANGE_8G},
 };
 
-static int32_t adxl362_range_to_reg_val(uint16_t range)
+static s32_t adxl362_range_to_reg_val(u16_t range)
 {
 	int i;
 
@@ -171,11 +171,11 @@ static int32_t adxl362_range_to_reg_val(uint16_t range)
 	return -EINVAL;
 }
 
-static int adxl362_set_range(struct device *dev, uint8_t range)
+static int adxl362_set_range(struct device *dev, u8_t range)
 {
 	struct adxl362_data *adxl362_data = dev->driver_data;
-	uint8_t old_filter_ctl;
-	uint8_t new_filter_ctl;
+	u8_t old_filter_ctl;
+	u8_t new_filter_ctl;
 	int ret;
 
 	ret = adxl362_get_reg(dev, &old_filter_ctl, ADXL362_REG_FILTER_CTL, 1);
@@ -194,10 +194,10 @@ static int adxl362_set_range(struct device *dev, uint8_t range)
 	return 0;
 }
 
-static int adxl362_set_output_rate(struct device *dev, uint8_t out_rate)
+static int adxl362_set_output_rate(struct device *dev, u8_t out_rate)
 {
-	uint8_t old_filter_ctl;
-	uint8_t new_filter_ctl;
+	u8_t old_filter_ctl;
+	u8_t new_filter_ctl;
 
 	adxl362_get_reg(dev, &old_filter_ctl, ADXL362_REG_FILTER_CTL, 1);
 	new_filter_ctl = old_filter_ctl & ~ADXL362_FILTER_CTL_ODR(0x7);
@@ -271,9 +271,9 @@ static int adxl362_attr_set(struct device *dev, enum sensor_channel chan,
 }
 
 
-static int adxl362_read_temperature(struct device *dev, int32_t *temp_celsius)
+static int adxl362_read_temperature(struct device *dev, s32_t *temp_celsius)
 {
-	uint8_t raw_temp_data[2];
+	u8_t raw_temp_data[2];
 	int ret;
 
 	/* Reads the temperature of the device. */
@@ -282,16 +282,16 @@ static int adxl362_read_temperature(struct device *dev, int32_t *temp_celsius)
 		return ret;
 	}
 
-	*temp_celsius = (int32_t)(raw_temp_data[1] << 8) + raw_temp_data[0];
+	*temp_celsius = (s32_t)(raw_temp_data[1] << 8) + raw_temp_data[0];
 	*temp_celsius *= 65;
 
 	return ret;
 }
 
-static int adxl362_fifo_setup(struct device *dev, uint8_t mode,
-			      uint16_t water_mark_lvl, uint8_t en_temp_read)
+static int adxl362_fifo_setup(struct device *dev, u8_t mode,
+			      u16_t water_mark_lvl, u8_t en_temp_read)
 {
-	uint8_t write_val;
+	u8_t write_val;
 	int ret;
 
 	write_val = ADXL362_FIFO_CTL_FIFO_MODE(mode) |
@@ -311,12 +311,12 @@ static int adxl362_fifo_setup(struct device *dev, uint8_t mode,
 }
 
 static int adxl362_setup_activity_detection(struct device *dev,
-					    uint8_t ref_or_abs,
-					    uint16_t threshold,
-					    uint8_t time)
+					    u8_t ref_or_abs,
+					    u16_t threshold,
+					    u8_t time)
 {
-	uint8_t old_act_inact_reg;
-	uint8_t new_act_inact_reg;
+	u8_t old_act_inact_reg;
+	u8_t new_act_inact_reg;
 	int ret;
 
 	/**
@@ -369,12 +369,12 @@ static int adxl362_setup_activity_detection(struct device *dev,
 }
 
 static int adxl362_setup_inactivity_detection(struct device *dev,
-					      uint8_t ref_or_abs,
-					      uint16_t threshold,
-					      uint16_t time)
+					      u8_t ref_or_abs,
+					      u16_t threshold,
+					      u16_t time)
 {
-	uint8_t old_act_inact_reg;
-	uint8_t new_act_inact_reg;
+	u8_t old_act_inact_reg;
+	u8_t new_act_inact_reg;
 	int ret;
 
 	/* Configure motion threshold and inactivity timer. */
@@ -414,8 +414,8 @@ static int adxl362_setup_inactivity_detection(struct device *dev,
 static int adxl362_sample_fetch(struct device *dev, enum sensor_channel chan)
 {
 	struct adxl362_data *data = dev->driver_data;
-	uint8_t buf[2];
-	int16_t x, y, z;
+	u8_t buf[2];
+	s16_t x, y, z;
 	int ret;
 
 	ret = adxl362_get_reg(dev, buf, ADXL362_REG_XDATA_L, 2);
@@ -437,9 +437,9 @@ static int adxl362_sample_fetch(struct device *dev, enum sensor_channel chan)
 
 	z = (buf[1] << 8) + buf[0];
 
-	data->acc_x = (int32_t)x * (adxl362_data.selected_range / 2);
-	data->acc_y = (int32_t)y * (adxl362_data.selected_range / 2);
-	data->acc_z = (int32_t)z * (adxl362_data.selected_range / 2);
+	data->acc_x = (s32_t)x * (adxl362_data.selected_range / 2);
+	data->acc_y = (s32_t)y * (adxl362_data.selected_range / 2);
+	data->acc_z = (s32_t)z * (adxl362_data.selected_range / 2);
 
 	ret = adxl362_read_temperature(dev, &data->temp);
 	if (ret) {
@@ -577,7 +577,7 @@ static int adxl362_init(struct device *dev)
 {
 	struct adxl362_data *data = dev->driver_data;
 	struct spi_config spi_config;
-	uint8_t value;
+	u8_t value;
 	int ret;
 
 	data->spi = device_get_binding(CONFIG_ADXL362_SPI_DEV_NAME);
diff --git a/drivers/sensor/adxl362/adxl362.h b/drivers/sensor/adxl362/adxl362.h
index 6b544bc3fca..0b44b4d97dc 100644
--- a/drivers/sensor/adxl362/adxl362.h
+++ b/drivers/sensor/adxl362/adxl362.h
@@ -156,12 +156,12 @@
 
 struct adxl362_data {
 	struct device *spi;
-	int32_t acc_x;
-	int32_t acc_y;
-	int32_t acc_z;
-	int32_t temp;
-	uint8_t spi_slave;
-	uint8_t selected_range;
+	s32_t acc_x;
+	s32_t acc_y;
+	s32_t acc_z;
+	s32_t temp;
+	u8_t spi_slave;
+	u8_t selected_range;
 };
 
 #if defined(CONFIG_ADXL362_ACCEL_RANGE_RUNTIME) ||\
diff --git a/drivers/sensor/ak8975/ak8975.c b/drivers/sensor/ak8975/ak8975.c
index 39fd6cc2ca6..269d4b8c979 100644
--- a/drivers/sensor/ak8975/ak8975.c
+++ b/drivers/sensor/ak8975/ak8975.c
@@ -17,7 +17,7 @@
 static int ak8975_sample_fetch(struct device *dev, enum sensor_channel chan)
 {
 	struct ak8975_data *drv_data = dev->driver_data;
-	uint8_t buf[6];
+	u8_t buf[6];
 
 	__ASSERT_NO_MSG(chan == SENSOR_CHAN_ALL);
 
@@ -42,13 +42,13 @@ static int ak8975_sample_fetch(struct device *dev, enum sensor_channel chan)
 	return 0;
 }
 
-static void ak8975_convert(struct sensor_value *val, int16_t sample,
-			   uint8_t adjustment)
+static void ak8975_convert(struct sensor_value *val, s16_t sample,
+			   u8_t adjustment)
 {
-	int32_t conv_val;
+	s32_t conv_val;
 
 	conv_val = sample * AK8975_MICRO_GAUSS_PER_BIT *
-		   ((uint16_t)adjustment + 128) / 256;
+		   ((u16_t)adjustment + 128) / 256;
 	val->val1 = conv_val / 1000000;
 	val->val2 = conv_val % 1000000;
 }
@@ -86,7 +86,7 @@ static const struct sensor_driver_api ak8975_driver_api = {
 
 static int ak8975_read_adjustment_data(struct ak8975_data *drv_data)
 {
-	uint8_t buf[3];
+	u8_t buf[3];
 
 	if (i2c_reg_write_byte(drv_data->i2c, CONFIG_AK8975_I2C_ADDR,
 			       AK8975_REG_CNTL, AK8975_MODE_FUSE_ACCESS) < 0) {
@@ -110,7 +110,7 @@ static int ak8975_read_adjustment_data(struct ak8975_data *drv_data)
 int ak8975_init(struct device *dev)
 {
 	struct ak8975_data *drv_data = dev->driver_data;
-	uint8_t id;
+	u8_t id;
 
 	drv_data->i2c = device_get_binding(CONFIG_AK8975_I2C_MASTER_DEV_NAME);
 	if (drv_data->i2c == NULL) {
diff --git a/drivers/sensor/ak8975/ak8975.h b/drivers/sensor/ak8975/ak8975.h
index f6c38d63108..fba8d8dfa12 100644
--- a/drivers/sensor/ak8975/ak8975.h
+++ b/drivers/sensor/ak8975/ak8975.h
@@ -50,13 +50,13 @@
 struct ak8975_data {
 	struct device *i2c;
 
-	int16_t x_sample;
-	int16_t y_sample;
-	int16_t z_sample;
+	s16_t x_sample;
+	s16_t y_sample;
+	s16_t z_sample;
 
-	uint8_t x_adj;
-	uint8_t y_adj;
-	uint8_t z_adj;
+	u8_t x_adj;
+	u8_t y_adj;
+	u8_t z_adj;
 };
 
 #endif /* __SENSOR_AK8975__ */
diff --git a/drivers/sensor/bma280/bma280.c b/drivers/sensor/bma280/bma280.c
index ad5edfccac5..4eb0ee6477d 100644
--- a/drivers/sensor/bma280/bma280.c
+++ b/drivers/sensor/bma280/bma280.c
@@ -14,8 +14,8 @@
 static int bma280_sample_fetch(struct device *dev, enum sensor_channel chan)
 {
 	struct bma280_data *drv_data = dev->driver_data;
-	uint8_t buf[6];
-	uint8_t lsb;
+	u8_t buf[6];
+	u8_t lsb;
 
 	__ASSERT_NO_MSG(chan == SENSOR_CHAN_ALL);
 
@@ -30,17 +30,17 @@ static int bma280_sample_fetch(struct device *dev, enum sensor_channel chan)
 	}
 
 	lsb = (buf[0] & BMA280_ACCEL_LSB_MASK) >> BMA280_ACCEL_LSB_SHIFT;
-	drv_data->x_sample = (((int8_t)buf[1]) << BMA280_ACCEL_LSB_BITS) | lsb;
+	drv_data->x_sample = (((s8_t)buf[1]) << BMA280_ACCEL_LSB_BITS) | lsb;
 
 	lsb = (buf[2] & BMA280_ACCEL_LSB_MASK) >> BMA280_ACCEL_LSB_SHIFT;
-	drv_data->y_sample = (((int8_t)buf[3]) << BMA280_ACCEL_LSB_BITS) | lsb;
+	drv_data->y_sample = (((s8_t)buf[3]) << BMA280_ACCEL_LSB_BITS) | lsb;
 
 	lsb = (buf[4] & BMA280_ACCEL_LSB_MASK) >> BMA280_ACCEL_LSB_SHIFT;
-	drv_data->z_sample = (((int8_t)buf[5]) << BMA280_ACCEL_LSB_BITS) | lsb;
+	drv_data->z_sample = (((s8_t)buf[5]) << BMA280_ACCEL_LSB_BITS) | lsb;
 
 	if (i2c_reg_read_byte(drv_data->i2c, BMA280_I2C_ADDRESS,
 			      BMA280_REG_TEMP,
-			      (uint8_t *)&drv_data->temp_sample) < 0) {
+			      (u8_t *)&drv_data->temp_sample) < 0) {
 		SYS_LOG_DBG("Could not read temperature data");
 		return -EIO;
 	}
@@ -49,7 +49,7 @@ static int bma280_sample_fetch(struct device *dev, enum sensor_channel chan)
 }
 
 static void bma280_channel_accel_convert(struct sensor_value *val,
-					int64_t raw_val)
+					s64_t raw_val)
 {
 	/*
 	 * accel_val = (sample * BMA280_PMU_FULL_RAGE) /
@@ -111,7 +111,7 @@ static const struct sensor_driver_api bma280_driver_api = {
 int bma280_init(struct device *dev)
 {
 	struct bma280_data *drv_data = dev->driver_data;
-	uint8_t id = 0;
+	u8_t id = 0;
 
 	drv_data->i2c = device_get_binding(CONFIG_BMA280_I2C_MASTER_DEV_NAME);
 	if (drv_data->i2c == NULL) {
diff --git a/drivers/sensor/bma280/bma280.h b/drivers/sensor/bma280/bma280.h
index c09e9b926e8..995b82f9c27 100644
--- a/drivers/sensor/bma280/bma280.h
+++ b/drivers/sensor/bma280/bma280.h
@@ -115,10 +115,10 @@
 
 struct bma280_data {
 	struct device *i2c;
-	int16_t x_sample;
-	int16_t y_sample;
-	int16_t z_sample;
-	int8_t temp_sample;
+	s16_t x_sample;
+	s16_t y_sample;
+	s16_t z_sample;
+	s8_t temp_sample;
 
 #ifdef CONFIG_BMA280_TRIGGER
 	struct device *gpio;
diff --git a/drivers/sensor/bma280/bma280_trigger.c b/drivers/sensor/bma280/bma280_trigger.c
index 1c46732a91f..8eb4caf2451 100644
--- a/drivers/sensor/bma280/bma280_trigger.c
+++ b/drivers/sensor/bma280/bma280_trigger.c
@@ -18,7 +18,7 @@ int bma280_attr_set(struct device *dev,
 		    const struct sensor_value *val)
 {
 	struct bma280_data *drv_data = dev->driver_data;
-	uint64_t slope_th;
+	u64_t slope_th;
 
 	if (chan != SENSOR_CHAN_ACCEL_XYZ) {
 		return -ENOTSUP;
@@ -26,10 +26,10 @@ int bma280_attr_set(struct device *dev,
 
 	if (attr == SENSOR_ATTR_SLOPE_TH) {
 		/* slope_th = (val * 10^6 * 2^10) / BMA280_PMU_FULL_RAGE */
-		slope_th = (uint64_t)val->val1 * 1000000 + (uint64_t)val->val2;
+		slope_th = (u64_t)val->val1 * 1000000 + (u64_t)val->val2;
 		slope_th = (slope_th * (1 << 10)) / BMA280_PMU_FULL_RANGE;
 		if (i2c_reg_write_byte(drv_data->i2c, BMA280_I2C_ADDRESS,
-				       BMA280_REG_SLOPE_TH, (uint8_t)slope_th)
+				       BMA280_REG_SLOPE_TH, (u8_t)slope_th)
 				       < 0) {
 			SYS_LOG_DBG("Could not set slope threshold");
 			return -EIO;
@@ -51,7 +51,7 @@ int bma280_attr_set(struct device *dev,
 }
 
 static void bma280_gpio_callback(struct device *dev,
-				 struct gpio_callback *cb, uint32_t pins)
+				 struct gpio_callback *cb, u32_t pins)
 {
 	struct bma280_data *drv_data =
 		CONTAINER_OF(cb, struct bma280_data, gpio_cb);
@@ -71,7 +71,7 @@ static void bma280_thread_cb(void *arg)
 {
 	struct device *dev = arg;
 	struct bma280_data *drv_data = dev->driver_data;
-	uint8_t status = 0;
+	u8_t status = 0;
 	int err = 0;
 
 	/* check for data ready */
diff --git a/drivers/sensor/bmc150_magn/bmc150_magn.c b/drivers/sensor/bmc150_magn/bmc150_magn.c
index e5e173138e7..867d64cb66f 100644
--- a/drivers/sensor/bmc150_magn/bmc150_magn.c
+++ b/drivers/sensor/bmc150_magn/bmc150_magn.c
@@ -22,7 +22,7 @@
 
 static const struct {
 	int freq;
-	uint8_t reg_val;
+	u8_t reg_val;
 } bmc150_magn_samp_freq_table[] = { {2, 0x01},
 				    {6, 0x02},
 				    {8, 0x03},
@@ -33,9 +33,9 @@ static const struct {
 				    {30, 0x07} };
 
 static const struct bmc150_magn_preset {
-	uint8_t rep_xy;
-	uint8_t rep_z;
-	uint8_t odr;
+	u8_t rep_xy;
+	u8_t rep_z;
+	u8_t odr;
 } bmc150_magn_presets_table[] = {
 	[LOW_POWER_PRESET] = {3, 3, 10},
 	[REGULAR_PRESET] = {9, 15, 10},
@@ -83,11 +83,11 @@ static int bmc150_magn_set_power_mode(struct device *dev,
 	return -ENOTSUP;
 }
 
-static int bmc150_magn_set_odr(struct device *dev, uint8_t val)
+static int bmc150_magn_set_odr(struct device *dev, u8_t val)
 {
 	struct bmc150_magn_data *data = dev->driver_data;
 	const struct bmc150_magn_config *config = dev->config->config_info;
-	uint8_t i;
+	u8_t i;
 
 	for (i = 0; i < ARRAY_SIZE(bmc150_magn_samp_freq_table); ++i) {
 		if (val <= bmc150_magn_samp_freq_table[i].freq) {
@@ -109,7 +109,7 @@ static int bmc150_magn_read_rep_xy(struct device *dev)
 {
 	struct bmc150_magn_data *data = dev->driver_data;
 	const struct bmc150_magn_config *config = dev->config->config_info;
-	uint8_t reg_val;
+	u8_t reg_val;
 
 	if (i2c_reg_read_byte(data->i2c_master, config->i2c_slave_addr,
 			      BMC150_MAGN_REG_REP_XY, &reg_val) < 0) {
@@ -125,7 +125,7 @@ static int bmc150_magn_read_rep_z(struct device *dev)
 {
 	struct bmc150_magn_data *data = dev->driver_data;
 	const struct bmc150_magn_config *config = dev->config->config_info;
-	uint8_t reg_val;
+	u8_t reg_val;
 
 	if (i2c_reg_read_byte(data->i2c_master, config->i2c_slave_addr,
 			      BMC150_MAGN_REG_REP_Z, &reg_val) < 0) {
@@ -171,7 +171,7 @@ static int bmc150_magn_read_odr(struct device *dev)
 {
 	struct bmc150_magn_data *data = dev->driver_data;
 	const struct bmc150_magn_config *config = dev->config->config_info;
-	uint8_t i, odr_val, reg_val;
+	u8_t i, odr_val, reg_val;
 
 	if (i2c_reg_read_byte(data->i2c_master, config->i2c_slave_addr,
 			      BMC150_MAGN_REG_OPMODE_ODR, &reg_val) < 0) {
@@ -233,11 +233,11 @@ static int bmc150_magn_write_rep_z(struct device *dev, int val)
  * Datasheet part 4.3.4, provided by Bosch here:
  * https://github.com/BoschSensortec/BMM050_driver
  */
-static int32_t bmc150_magn_compensate_xy(struct bmc150_magn_trim_regs *tregs,
-					int16_t xy, uint16_t rhall, bool is_x)
+static s32_t bmc150_magn_compensate_xy(struct bmc150_magn_trim_regs *tregs,
+					s16_t xy, u16_t rhall, bool is_x)
 {
-	int8_t txy1, txy2;
-	int16_t val;
+	s8_t txy1, txy2;
+	s16_t val;
 
 	if (xy == BMC150_MAGN_XY_OVERFLOW_VAL) {
 		return INT32_MIN;
@@ -255,30 +255,30 @@ static int32_t bmc150_magn_compensate_xy(struct bmc150_magn_trim_regs *tregs,
 		txy2 = tregs->y2;
 	}
 
-	val = ((int16_t)(((uint16_t)((((int32_t)tregs->xyz1) << 14) / rhall)) -
-	      ((uint16_t)0x4000)));
-	val = ((int16_t)((((int32_t)xy) * ((((((((int32_t)tregs->xy2) *
-	      ((((int32_t)val) * ((int32_t)val)) >> 7)) + (((int32_t)val) *
-	      ((int32_t)(((int16_t)tregs->xy1) << 7)))) >> 9) +
-	      ((int32_t)0x100000)) * ((int32_t)(((int16_t)txy2) +
-	      ((int16_t)0xA0)))) >> 12)) >> 13)) + (((int16_t)txy1) << 3);
+	val = ((s16_t)(((u16_t)((((s32_t)tregs->xyz1) << 14) / rhall)) -
+	      ((u16_t)0x4000)));
+	val = ((s16_t)((((s32_t)xy) * ((((((((s32_t)tregs->xy2) *
+	      ((((s32_t)val) * ((s32_t)val)) >> 7)) + (((s32_t)val) *
+	      ((s32_t)(((s16_t)tregs->xy1) << 7)))) >> 9) +
+	      ((s32_t)0x100000)) * ((s32_t)(((s16_t)txy2) +
+	      ((s16_t)0xA0)))) >> 12)) >> 13)) + (((s16_t)txy1) << 3);
 
-	return (int32_t)val;
+	return (s32_t)val;
 }
 
-static int32_t bmc150_magn_compensate_z(struct bmc150_magn_trim_regs *tregs,
-					int16_t z, uint16_t rhall)
+static s32_t bmc150_magn_compensate_z(struct bmc150_magn_trim_regs *tregs,
+					s16_t z, u16_t rhall)
 {
-	int32_t val;
+	s32_t val;
 
 	if (z == BMC150_MAGN_Z_OVERFLOW_VAL) {
 		return INT32_MIN;
 	}
 
-	val = (((((int32_t)(z - tregs->z4)) << 15) - ((((int32_t)tregs->z3) *
-	      ((int32_t)(((int16_t)rhall) - ((int16_t)tregs->xyz1)))) >> 2)) /
-	      (tregs->z2 + ((int16_t)(((((int32_t)tregs->z1) *
-	      ((((int16_t)rhall) << 1))) + (1 << 15)) >> 16))));
+	val = (((((s32_t)(z - tregs->z4)) << 15) - ((((s32_t)tregs->z3) *
+	      ((s32_t)(((s16_t)rhall) - ((s16_t)tregs->xyz1)))) >> 2)) /
+	      (tregs->z2 + ((s16_t)(((((s32_t)tregs->z1) *
+	      ((((s16_t)rhall) << 1))) + (1 << 15)) >> 16))));
 
 	return val;
 }
@@ -288,25 +288,25 @@ static int bmc150_magn_sample_fetch(struct device *dev,
 {
 	struct bmc150_magn_data *data = dev->driver_data;
 	const struct bmc150_magn_config *config = dev->config->config_info;
-	uint16_t values[BMC150_MAGN_AXIS_XYZR_MAX];
-	int16_t raw_x, raw_y, raw_z;
-	uint16_t rhall;
+	u16_t values[BMC150_MAGN_AXIS_XYZR_MAX];
+	s16_t raw_x, raw_y, raw_z;
+	u16_t rhall;
 
 	__ASSERT_NO_MSG(chan == SENSOR_CHAN_ALL ||
 			chan == SENSOR_CHAN_MAGN_XYZ);
 
 	if (i2c_burst_read(data->i2c_master, config->i2c_slave_addr,
-			   BMC150_MAGN_REG_X_L, (uint8_t *)values,
+			   BMC150_MAGN_REG_X_L, (u8_t *)values,
 			   sizeof(values)) < 0) {
 		SYS_LOG_DBG("failed to read sample");
 		return -EIO;
 	}
 
-	raw_x = (int16_t)sys_le16_to_cpu(values[BMC150_MAGN_AXIS_X]) >>
+	raw_x = (s16_t)sys_le16_to_cpu(values[BMC150_MAGN_AXIS_X]) >>
 		BMC150_MAGN_SHIFT_XY_L;
-	raw_y = (int16_t)sys_le16_to_cpu(values[BMC150_MAGN_AXIS_Y]) >>
+	raw_y = (s16_t)sys_le16_to_cpu(values[BMC150_MAGN_AXIS_Y]) >>
 		BMC150_MAGN_SHIFT_XY_L;
-	raw_z = (int16_t)sys_le16_to_cpu(values[BMC150_MAGN_AXIS_Z]) >>
+	raw_z = (s16_t)sys_le16_to_cpu(values[BMC150_MAGN_AXIS_Z]) >>
 		BMC150_MAGN_SHIFT_Z_L;
 	rhall = sys_le16_to_cpu(values[BMC150_MAGN_RHALL]) >>
 		BMC150_MAGN_SHIFT_RHALL_L;
@@ -324,7 +324,7 @@ static void bmc150_magn_convert(struct sensor_value *val, int raw_val)
 {
 	/* val = raw_val / 1600 */
 	val->val1 = raw_val / 1600;
-	val->val2 = ((int32_t)raw_val * (1000000 / 1600)) % 1000000;
+	val->val2 = ((s32_t)raw_val * (1000000 / 1600)) % 1000000;
 }
 
 static int bmc150_magn_channel_get(struct device *dev,
@@ -448,7 +448,7 @@ static int bmc150_magn_attr_set(struct device *dev,
 			return -ENOTSUP;
 		}
 
-		if (bmc150_magn_set_odr(dev, (uint8_t)(val->val1)) < 0) {
+		if (bmc150_magn_set_odr(dev, (u8_t)(val->val1)) < 0) {
 			return -EIO;
 		}
 		break;
@@ -481,7 +481,7 @@ static int bmc150_magn_init_chip(struct device *dev)
 {
 	struct bmc150_magn_data *data = dev->driver_data;
 	const struct bmc150_magn_config *config = dev->config->config_info;
-	uint8_t chip_id;
+	u8_t chip_id;
 	struct bmc150_magn_preset preset;
 
 	bmc150_magn_set_power_mode(dev, BMC150_MAGN_POWER_MODE_NORMAL, 0);
@@ -535,7 +535,7 @@ static int bmc150_magn_init_chip(struct device *dev)
 	}
 
 	if (i2c_burst_read(data->i2c_master, config->i2c_slave_addr,
-			   BMC150_MAGN_REG_TRIM_START, (uint8_t *)&data->tregs,
+			   BMC150_MAGN_REG_TRIM_START, (u8_t *)&data->tregs,
 			   sizeof(data->tregs)) < 0) {
 		SYS_LOG_DBG("failed to read trim regs");
 		goto err_poweroff;
diff --git a/drivers/sensor/bmc150_magn/bmc150_magn.h b/drivers/sensor/bmc150_magn/bmc150_magn.h
index 43ece836ada..c7904be51b3 100644
--- a/drivers/sensor/bmc150_magn/bmc150_magn.h
+++ b/drivers/sensor/bmc150_magn/bmc150_magn.h
@@ -87,29 +87,29 @@
 
 struct bmc150_magn_config {
 	char *i2c_master_dev_name;
-	uint16_t i2c_slave_addr;
+	u16_t i2c_slave_addr;
 
 #if defined(CONFIG_BMC150_MAGN_TRIGGER_DRDY)
 	char *gpio_drdy_dev_name;
-	uint8_t gpio_drdy_int_pin;
+	u8_t gpio_drdy_int_pin;
 #endif
 };
 
 struct bmc150_magn_trim_regs {
-	int8_t x1;
-	int8_t y1;
-	uint16_t reserved1;
-	uint8_t reserved2;
-	int16_t z4;
-	int8_t x2;
-	int8_t y2;
-	uint16_t reserved3;
-	int16_t z2;
-	uint16_t z1;
-	uint16_t xyz1;
-	int16_t z3;
-	int8_t xy2;
-	uint8_t xy1;
+	s8_t x1;
+	s8_t y1;
+	u16_t reserved1;
+	u8_t reserved2;
+	s16_t z4;
+	s8_t x2;
+	s8_t y2;
+	u16_t reserved3;
+	s16_t z2;
+	u16_t z1;
+	u16_t xyz1;
+	s16_t z3;
+	s8_t xy2;
+	u8_t xy1;
 } __packed;
 
 struct bmc150_magn_data {
diff --git a/drivers/sensor/bmc150_magn/bmc150_magn_trigger.c b/drivers/sensor/bmc150_magn/bmc150_magn_trigger.c
index b684a65ddd2..63b3b17b09f 100644
--- a/drivers/sensor/bmc150_magn/bmc150_magn_trigger.c
+++ b/drivers/sensor/bmc150_magn/bmc150_magn_trigger.c
@@ -19,7 +19,7 @@ int bmc150_magn_trigger_set(struct device *dev,
 	struct bmc150_magn_data *data = dev->driver_data;
 	const struct bmc150_magn_config * const config =
 					dev->config->config_info;
-	uint8_t state;
+	u8_t state;
 
 #if defined(CONFIG_BMC150_MAGN_TRIGGER_DRDY)
 	if (trig->type == SENSOR_TRIG_DATA_READY) {
@@ -54,7 +54,7 @@ int bmc150_magn_trigger_set(struct device *dev,
 
 static void bmc150_magn_gpio_drdy_callback(struct device *dev,
 					   struct gpio_callback *cb,
-					   uint32_t pins)
+					   u32_t pins)
 {
 	struct bmc150_magn_data *data =
 		CONTAINER_OF(cb, struct bmc150_magn_data, gpio_cb);
@@ -73,7 +73,7 @@ static void bmc150_magn_thread_main(void *arg1, void *arg2, void *arg3)
 	struct device *dev = (struct device *) arg1;
 	struct bmc150_magn_data *data = dev->driver_data;
 	const struct bmc150_magn_config *config = dev->config->config_info;
-	uint8_t reg_val;
+	u8_t reg_val;
 
 	int gpio_pin = config->gpio_drdy_int_pin;
 
diff --git a/drivers/sensor/bme280/bme280.c b/drivers/sensor/bme280/bme280.c
index 6f5f8803901..72ac74635a5 100644
--- a/drivers/sensor/bme280/bme280.c
+++ b/drivers/sensor/bme280/bme280.c
@@ -23,14 +23,14 @@
 #include "bme280.h"
 
 static int bm280_reg_read(struct bme280_data *data,
-			  uint8_t start, uint8_t *buf, int size)
+			  u8_t start, u8_t *buf, int size)
 {
 #ifdef CONFIG_BME280_DEV_TYPE_I2C
 	return i2c_burst_read(data->i2c_master, data->i2c_slave_addr,
 			      start, buf, size);
 #elif defined CONFIG_BME280_DEV_TYPE_SPI
-	uint8_t tx_buf[2];
-	uint8_t rx_buf[2];
+	u8_t tx_buf[2];
+	u8_t rx_buf[2];
 	int i;
 	int ret;
 
@@ -55,14 +55,14 @@ static int bm280_reg_read(struct bme280_data *data,
 	return 0;
 }
 
-static int bm280_reg_write(struct bme280_data *data, uint8_t reg, uint8_t val)
+static int bm280_reg_write(struct bme280_data *data, u8_t reg, u8_t val)
 {
 #ifdef CONFIG_BME280_DEV_TYPE_I2C
 	return i2c_reg_write_byte(data->i2c_master, data->i2c_slave_addr,
 				  reg, val);
 #elif defined CONFIG_BME280_DEV_TYPE_SPI
-	uint8_t tx_buf[2];
-	uint8_t rx_buf[2];
+	u8_t tx_buf[2];
+	u8_t rx_buf[2];
 	int ret;
 
 	ret = spi_slave_select(data->spi, data->spi_slave);
@@ -88,31 +88,31 @@ static int bm280_reg_write(struct bme280_data *data, uint8_t reg, uint8_t val)
  * Compensation code taken from BME280 datasheet, Section 4.2.3
  * "Compensation formula".
  */
-static void bme280_compensate_temp(struct bme280_data *data, int32_t adc_temp)
+static void bme280_compensate_temp(struct bme280_data *data, s32_t adc_temp)
 {
-	int32_t var1, var2;
+	s32_t var1, var2;
 
-	var1 = (((adc_temp >> 3) - ((int32_t)data->dig_t1 << 1)) *
-		((int32_t)data->dig_t2)) >> 11;
-	var2 = (((((adc_temp >> 4) - ((int32_t)data->dig_t1)) *
-		  ((adc_temp >> 4) - ((int32_t)data->dig_t1))) >> 12) *
-		((int32_t)data->dig_t3)) >> 14;
+	var1 = (((adc_temp >> 3) - ((s32_t)data->dig_t1 << 1)) *
+		((s32_t)data->dig_t2)) >> 11;
+	var2 = (((((adc_temp >> 4) - ((s32_t)data->dig_t1)) *
+		  ((adc_temp >> 4) - ((s32_t)data->dig_t1))) >> 12) *
+		((s32_t)data->dig_t3)) >> 14;
 
 	data->t_fine = var1 + var2;
 	data->comp_temp = (data->t_fine * 5 + 128) >> 8;
 }
 
-static void bme280_compensate_press(struct bme280_data *data, int32_t adc_press)
+static void bme280_compensate_press(struct bme280_data *data, s32_t adc_press)
 {
-	int64_t var1, var2, p;
+	s64_t var1, var2, p;
 
-	var1 = ((int64_t)data->t_fine) - 128000;
-	var2 = var1 * var1 * (int64_t)data->dig_p6;
-	var2 = var2 + ((var1 * (int64_t)data->dig_p5) << 17);
-	var2 = var2 + (((int64_t)data->dig_p4) << 35);
-	var1 = ((var1 * var1 * (int64_t)data->dig_p3) >> 8) +
-		((var1 * (int64_t)data->dig_p2) << 12);
-	var1 = (((((int64_t)1) << 47) + var1)) * ((int64_t)data->dig_p1) >> 33;
+	var1 = ((s64_t)data->t_fine) - 128000;
+	var2 = var1 * var1 * (s64_t)data->dig_p6;
+	var2 = var2 + ((var1 * (s64_t)data->dig_p5) << 17);
+	var2 = var2 + (((s64_t)data->dig_p4) << 35);
+	var1 = ((var1 * var1 * (s64_t)data->dig_p3) >> 8) +
+		((var1 * (s64_t)data->dig_p2) << 12);
+	var1 = (((((s64_t)1) << 47) + var1)) * ((s64_t)data->dig_p1) >> 33;
 
 	/* Avoid exception caused by division by zero. */
 	if (var1 == 0) {
@@ -122,36 +122,36 @@ static void bme280_compensate_press(struct bme280_data *data, int32_t adc_press)
 
 	p = 1048576 - adc_press;
 	p = (((p << 31) - var2) * 3125) / var1;
-	var1 = (((int64_t)data->dig_p9) * (p >> 13) * (p >> 13)) >> 25;
-	var2 = (((int64_t)data->dig_p8) * p) >> 19;
-	p = ((p + var1 + var2) >> 8) + (((int64_t)data->dig_p7) << 4);
+	var1 = (((s64_t)data->dig_p9) * (p >> 13) * (p >> 13)) >> 25;
+	var2 = (((s64_t)data->dig_p8) * p) >> 19;
+	p = ((p + var1 + var2) >> 8) + (((s64_t)data->dig_p7) << 4);
 
-	data->comp_press = (uint32_t)p;
+	data->comp_press = (u32_t)p;
 }
 
 static void bme280_compensate_humidity(struct bme280_data *data,
-				       int32_t adc_humidity)
+				       s32_t adc_humidity)
 {
-	int32_t h;
+	s32_t h;
 
-	h = (data->t_fine - ((int32_t)76800));
-	h = ((((adc_humidity << 14) - (((int32_t)data->dig_h4) << 20) -
-		(((int32_t)data->dig_h5) * h)) + ((int32_t)16384)) >> 15) *
-		(((((((h * ((int32_t)data->dig_h6)) >> 10) * (((h *
-		((int32_t)data->dig_h3)) >> 11) + ((int32_t)32768))) >> 10) +
-		((int32_t)2097152)) * ((int32_t)data->dig_h2) + 8192) >> 14);
+	h = (data->t_fine - ((s32_t)76800));
+	h = ((((adc_humidity << 14) - (((s32_t)data->dig_h4) << 20) -
+		(((s32_t)data->dig_h5) * h)) + ((s32_t)16384)) >> 15) *
+		(((((((h * ((s32_t)data->dig_h6)) >> 10) * (((h *
+		((s32_t)data->dig_h3)) >> 11) + ((s32_t)32768))) >> 10) +
+		((s32_t)2097152)) * ((s32_t)data->dig_h2) + 8192) >> 14);
 	h = (h - (((((h >> 15) * (h >> 15)) >> 7) *
-		((int32_t)data->dig_h1)) >> 4));
+		((s32_t)data->dig_h1)) >> 4));
 	h = (h > 419430400 ? 419430400 : h);
 
-	data->comp_humidity = (uint32_t)(h >> 12);
+	data->comp_humidity = (u32_t)(h >> 12);
 }
 
 static int bme280_sample_fetch(struct device *dev, enum sensor_channel chan)
 {
 	struct bme280_data *data = dev->driver_data;
-	uint8_t buf[8];
-	int32_t adc_press, adc_temp, adc_humidity;
+	u8_t buf[8];
+	s32_t adc_press, adc_temp, adc_humidity;
 	int size = 6;
 	int ret;
 
@@ -229,12 +229,12 @@ static const struct sensor_driver_api bme280_api_funcs = {
 
 static int bme280_read_compensation(struct bme280_data *data)
 {
-	uint16_t buf[12];
-	uint8_t hbuf[7];
+	u16_t buf[12];
+	u8_t hbuf[7];
 	int err = 0;
 
 	err = bm280_reg_read(data, BME280_REG_COMP_START,
-			     (uint8_t *)buf, sizeof(buf));
+			     (u8_t *)buf, sizeof(buf));
 
 	if (err < 0) {
 		return err;
diff --git a/drivers/sensor/bme280/bme280.h b/drivers/sensor/bme280/bme280.h
index 369ed908292..5e836b0364d 100644
--- a/drivers/sensor/bme280/bme280.h
+++ b/drivers/sensor/bme280/bme280.h
@@ -105,7 +105,7 @@
 struct bme280_data {
 #ifdef CONFIG_BME280_DEV_TYPE_I2C
 	struct device *i2c_master;
-	uint16_t i2c_slave_addr;
+	u16_t i2c_slave_addr;
 #elif defined CONFIG_BME280_DEV_TYPE_SPI
 	struct device *spi;
 	int spi_slave;
@@ -113,34 +113,34 @@ struct bme280_data {
 #error "BME280 device type not specified"
 #endif
 	/* Compensation parameters. */
-	uint16_t dig_t1;
-	int16_t dig_t2;
-	int16_t dig_t3;
-	uint16_t dig_p1;
-	int16_t dig_p2;
-	int16_t dig_p3;
-	int16_t dig_p4;
-	int16_t dig_p5;
-	int16_t dig_p6;
-	int16_t dig_p7;
-	int16_t dig_p8;
-	int16_t dig_p9;
-	uint8_t dig_h1;
-	int16_t dig_h2;
-	uint8_t dig_h3;
-	int16_t dig_h4;
-	int16_t dig_h5;
-	int8_t dig_h6;
+	u16_t dig_t1;
+	s16_t dig_t2;
+	s16_t dig_t3;
+	u16_t dig_p1;
+	s16_t dig_p2;
+	s16_t dig_p3;
+	s16_t dig_p4;
+	s16_t dig_p5;
+	s16_t dig_p6;
+	s16_t dig_p7;
+	s16_t dig_p8;
+	s16_t dig_p9;
+	u8_t dig_h1;
+	s16_t dig_h2;
+	u8_t dig_h3;
+	s16_t dig_h4;
+	s16_t dig_h5;
+	s8_t dig_h6;
 
 	/* Compensated values. */
-	int32_t comp_temp;
-	uint32_t comp_press;
-	uint32_t comp_humidity;
+	s32_t comp_temp;
+	u32_t comp_press;
+	u32_t comp_humidity;
 
 	/* Carryover between temperature and pressure/humidity compensation. */
-	int32_t t_fine;
+	s32_t t_fine;
 
-	uint8_t chip_id;
+	u8_t chip_id;
 };
 
 #define SYS_LOG_DOMAIN "BME280"
diff --git a/drivers/sensor/bmg160/bmg160.c b/drivers/sensor/bmg160/bmg160.c
index b2185fcf0d7..a697eaeb4ed 100644
--- a/drivers/sensor/bmg160/bmg160.c
+++ b/drivers/sensor/bmg160/bmg160.c
@@ -30,8 +30,8 @@ static inline int bmg160_bus_config(struct device *dev)
 	return i2c_configure(bmg160->i2c, i2c_cfg.raw);
 }
 
-int bmg160_read(struct device *dev, uint8_t reg_addr, uint8_t *data,
-		uint8_t len)
+int bmg160_read(struct device *dev, u8_t reg_addr, u8_t *data,
+		u8_t len)
 {
 	const struct bmg160_device_config *dev_cfg = dev->config->config_info;
 	struct bmg160_device_data *bmg160 = dev->driver_data;
@@ -51,13 +51,13 @@ int bmg160_read(struct device *dev, uint8_t reg_addr, uint8_t *data,
 	return ret;
 }
 
-int bmg160_read_byte(struct device *dev, uint8_t reg_addr, uint8_t *byte)
+int bmg160_read_byte(struct device *dev, u8_t reg_addr, u8_t *byte)
 {
 	return bmg160_read(dev, reg_addr, byte, 1);
 }
 
-static int bmg160_write(struct device *dev, uint8_t reg_addr, uint8_t *data,
-			uint8_t len)
+static int bmg160_write(struct device *dev, u8_t reg_addr, u8_t *data,
+			u8_t len)
 {
 	const struct bmg160_device_config *dev_cfg = dev->config->config_info;
 	struct bmg160_device_data *bmg160 = dev->driver_data;
@@ -77,13 +77,13 @@ static int bmg160_write(struct device *dev, uint8_t reg_addr, uint8_t *data,
 	return ret;
 }
 
-int bmg160_write_byte(struct device *dev, uint8_t reg_addr, uint8_t byte)
+int bmg160_write_byte(struct device *dev, u8_t reg_addr, u8_t byte)
 {
 	return bmg160_write(dev, reg_addr, &byte, 1);
 }
 
-int bmg160_update_byte(struct device *dev, uint8_t reg_addr, uint8_t mask,
-		       uint8_t value)
+int bmg160_update_byte(struct device *dev, u8_t reg_addr, u8_t mask,
+		       u8_t value)
 {
 	const struct bmg160_device_config *dev_cfg = dev->config->config_info;
 	struct bmg160_device_data *bmg160 = dev->driver_data;
@@ -104,15 +104,15 @@ int bmg160_update_byte(struct device *dev, uint8_t reg_addr, uint8_t mask,
 }
 
 /* Allowed range values, in degrees/sec. */
-static const int16_t bmg160_gyro_range_map[] = {2000, 1000, 500, 250, 125};
+static const s16_t bmg160_gyro_range_map[] = {2000, 1000, 500, 250, 125};
 #define BMG160_GYRO_RANGE_MAP_SIZE	ARRAY_SIZE(bmg160_gyro_range_map)
 
 /* Allowed sampling frequencies, in Hz */
-static const int16_t bmg160_sampling_freq_map[] = {2000, 1000, 400, 200, 100};
+static const s16_t bmg160_sampling_freq_map[] = {2000, 1000, 400, 200, 100};
 #define BMG160_SAMPLING_FREQ_MAP_SIZE	ARRAY_SIZE(bmg160_sampling_freq_map)
 
-static int bmg160_is_val_valid(int16_t val, const int16_t *val_map,
-			       uint16_t map_size)
+static int bmg160_is_val_valid(s16_t val, const s16_t *val_map,
+			       u16_t map_size)
 {
 	int i;
 
@@ -131,7 +131,7 @@ static int bmg160_attr_set(struct device *dev, enum sensor_channel chan,
 {
 	struct bmg160_device_data *bmg160 = dev->driver_data;
 	int idx;
-	uint16_t range_dps;
+	u16_t range_dps;
 
 	if (chan != SENSOR_CHAN_GYRO_XYZ) {
 		return -ENOTSUP;
@@ -189,12 +189,12 @@ static int bmg160_sample_fetch(struct device *dev, enum sensor_channel chan)
 {
 	struct bmg160_device_data *bmg160 = dev->driver_data;
 	union {
-		uint8_t raw[7];
+		u8_t raw[7];
 		struct {
-			uint16_t x_axis;
-			uint16_t y_axis;
-			uint16_t z_axis;
-			uint8_t temp;
+			u16_t x_axis;
+			u16_t y_axis;
+			u16_t z_axis;
+			u8_t temp;
 		};
 	} buf __aligned(2);
 
@@ -212,14 +212,14 @@ static int bmg160_sample_fetch(struct device *dev, enum sensor_channel chan)
 }
 
 static void bmg160_to_fixed_point(struct bmg160_device_data *bmg160,
-				  enum sensor_channel chan, int16_t raw,
+				  enum sensor_channel chan, s16_t raw,
 				  struct sensor_value *val)
 {
 	if (chan == SENSOR_CHAN_TEMP) {
 		val->val1 = 23 + (raw / 2);
 		val->val2 = (raw % 2) * 500000;
 	} else {
-		int32_t converted_val = raw * bmg160->scale;
+		s32_t converted_val = raw * bmg160->scale;
 
 		val->val1 = converted_val / 1000000;
 		val->val2 = converted_val % 1000000;
@@ -230,7 +230,7 @@ static int bmg160_channel_get(struct device *dev, enum sensor_channel chan,
 			      struct sensor_value *val)
 {
 	struct bmg160_device_data *bmg160 = dev->driver_data;
-	int16_t raw_val;
+	s16_t raw_val;
 	int i;
 
 	switch (chan) {
@@ -272,8 +272,8 @@ int bmg160_init(struct device *dev)
 {
 	const struct bmg160_device_config *cfg = dev->config->config_info;
 	struct bmg160_device_data *bmg160 = dev->driver_data;
-	uint8_t chip_id = 0;
-	uint16_t range_dps;
+	u8_t chip_id = 0;
+	u16_t range_dps;
 
 	bmg160->i2c = device_get_binding((char *)cfg->i2c_port);
 	if (!bmg160->i2c) {
diff --git a/drivers/sensor/bmg160/bmg160.h b/drivers/sensor/bmg160/bmg160.h
index 2f01c1b54a9..1baad0e6e6e 100644
--- a/drivers/sensor/bmg160/bmg160.h
+++ b/drivers/sensor/bmg160/bmg160.h
@@ -182,10 +182,10 @@ struct bmg160_device_config {
 #ifdef CONFIG_BMG160_TRIGGER
 	const char *gpio_port;
 #endif
-	uint16_t i2c_addr;
-	uint8_t i2c_speed;
+	u16_t i2c_addr;
+	u8_t i2c_speed;
 #ifdef CONFIG_BMG160_TRIGGER
-	uint8_t int_pin;
+	u8_t int_pin;
 #endif
 };
 
@@ -207,23 +207,23 @@ struct bmg160_device_data {
 	sensor_trigger_handler_t anymotion_handler;
 	sensor_trigger_handler_t drdy_handler;
 #endif
-	int16_t raw_gyro_xyz[3];
-	uint16_t scale;
-	uint8_t range_idx;
+	s16_t raw_gyro_xyz[3];
+	u16_t scale;
+	u8_t range_idx;
 
-	int8_t raw_temp;
+	s8_t raw_temp;
 };
 
 int bmg160_trigger_init(struct device *dev);
 int bmg160_trigger_set(struct device *dev,
 		       const struct sensor_trigger *trig,
 		       sensor_trigger_handler_t handler);
-int bmg160_read(struct device *dev, uint8_t reg_addr, uint8_t *data,
-		uint8_t len);
-int bmg160_read_byte(struct device *dev, uint8_t reg_addr, uint8_t *byte);
-int bmg160_update_byte(struct device *dev, uint8_t reg_addr, uint8_t mask,
-		       uint8_t value);
-int bmg160_write_byte(struct device *dev, uint8_t reg_addr, uint8_t data);
+int bmg160_read(struct device *dev, u8_t reg_addr, u8_t *data,
+		u8_t len);
+int bmg160_read_byte(struct device *dev, u8_t reg_addr, u8_t *byte);
+int bmg160_update_byte(struct device *dev, u8_t reg_addr, u8_t mask,
+		       u8_t value);
+int bmg160_write_byte(struct device *dev, u8_t reg_addr, u8_t data);
 int bmg160_slope_config(struct device *dev, enum sensor_attribute attr,
 			const struct sensor_value *val);
 
diff --git a/drivers/sensor/bmg160/bmg160_trigger.c b/drivers/sensor/bmg160/bmg160_trigger.c
index 5fda5338c16..5c4b42ec2cd 100644
--- a/drivers/sensor/bmg160/bmg160_trigger.c
+++ b/drivers/sensor/bmg160/bmg160_trigger.c
@@ -16,7 +16,7 @@
 extern struct bmg160_device_data bmg160_data;
 
 static void bmg160_gpio_callback(struct device *port, struct gpio_callback *cb,
-				 uint32_t pin)
+				 u32_t pin)
 {
 	struct bmg160_device_data *bmg160 =
 		CONTAINER_OF(cb, struct bmg160_device_data, gpio_cb);
@@ -35,7 +35,7 @@ static int bmg160_anymotion_set(struct device *dev,
 				sensor_trigger_handler_t handler)
 {
 	struct bmg160_device_data *bmg160 = dev->driver_data;
-	uint8_t anymotion_en = 0;
+	u8_t anymotion_en = 0;
 
 	if (handler) {
 		anymotion_en = BMG160_ANY_EN_X |
@@ -74,8 +74,8 @@ int bmg160_slope_config(struct device *dev, enum sensor_attribute attr,
 	struct bmg160_device_data *bmg160 = dev->driver_data;
 
 	if (attr == SENSOR_ATTR_SLOPE_TH) {
-		uint16_t any_th_dps, range_dps;
-		uint8_t any_th_reg_val;
+		u16_t any_th_dps, range_dps;
+		u8_t any_th_reg_val;
 
 		any_th_dps = sensor_rad_to_degrees(val);
 		range_dps = BMG160_SCALE_TO_RANGE(bmg160->scale);
@@ -149,7 +149,7 @@ static int bmg160_handle_dataready_int(struct device *dev)
 static void bmg160_handle_int(void *arg)
 {
 	struct device *dev = (struct device *)arg;
-	uint8_t status_int[4];
+	u8_t status_int[4];
 
 	if (bmg160_read(dev, BMG160_REG_INT_STATUS0, status_int, 4) < 0) {
 		return;
diff --git a/drivers/sensor/bmi160/bmi160.c b/drivers/sensor/bmi160/bmi160.c
index ee92ce9bf61..c7a3bca1d91 100644
--- a/drivers/sensor/bmi160/bmi160.c
+++ b/drivers/sensor/bmi160/bmi160.c
@@ -19,9 +19,9 @@
 
 struct bmi160_device_data bmi160_data;
 
-static int bmi160_transceive(struct device *dev, uint8_t *tx_buf,
-			     uint8_t tx_buf_len, uint8_t *rx_buf,
-			     uint8_t rx_buf_len)
+static int bmi160_transceive(struct device *dev, u8_t *tx_buf,
+			     u8_t tx_buf_len, u8_t *rx_buf,
+			     u8_t rx_buf_len)
 {
 	const struct bmi160_device_config *dev_cfg = dev->config->config_info;
 	struct bmi160_device_data *bmi160 = dev->driver_data;
@@ -44,20 +44,20 @@ static int bmi160_transceive(struct device *dev, uint8_t *tx_buf,
 			      rx_buf, rx_buf_len);
 }
 
-int bmi160_read(struct device *dev, uint8_t reg_addr,
-		uint8_t *data, uint8_t len)
+int bmi160_read(struct device *dev, u8_t reg_addr,
+		u8_t *data, u8_t len)
 {
-	uint8_t tx[3] = {0};
+	u8_t tx[3] = {0};
 
 	tx[0] = reg_addr | (1 << 7);
 
 	return bmi160_transceive(dev, tx, len, data, len);
 }
 
-int bmi160_byte_read(struct device *dev, uint8_t reg_addr,
-		     uint8_t *byte)
+int bmi160_byte_read(struct device *dev, u8_t reg_addr,
+		     u8_t *byte)
 {
-	uint8_t rx_buf[2];
+	u8_t rx_buf[2];
 
 	if (bmi160_read(dev, reg_addr, rx_buf, 2) < 0) {
 		return -EIO;
@@ -68,14 +68,14 @@ int bmi160_byte_read(struct device *dev, uint8_t reg_addr,
 	return 0;
 }
 
-static int bmi160_word_read(struct device *dev, uint8_t reg_addr,
-			    uint16_t *word)
+static int bmi160_word_read(struct device *dev, u8_t reg_addr,
+			    u16_t *word)
 {
 	union {
-		uint8_t raw[3];
+		u8_t raw[3];
 		struct {
-			uint8_t dummy;
-			uint16_t word;
+			u8_t dummy;
+			u16_t word;
 		} __packed;
 	} buf;
 
@@ -88,28 +88,28 @@ static int bmi160_word_read(struct device *dev, uint8_t reg_addr,
 	return 0;
 }
 
-int bmi160_byte_write(struct device *dev, uint8_t reg_addr, uint8_t byte)
+int bmi160_byte_write(struct device *dev, u8_t reg_addr, u8_t byte)
 {
-	uint8_t tx_buf[2] = {reg_addr & 0x7F, byte};
+	u8_t tx_buf[2] = {reg_addr & 0x7F, byte};
 
 	return bmi160_transceive(dev, tx_buf, 2, NULL, 0);
 }
 
-int bmi160_word_write(struct device *dev, uint8_t reg_addr, uint16_t word)
+int bmi160_word_write(struct device *dev, u8_t reg_addr, u16_t word)
 {
-	uint8_t tx_buf[3] = {
+	u8_t tx_buf[3] = {
 		reg_addr & 0x7F,
-		(uint8_t)(word & 0xff),
-		(uint8_t)(word >> 8)
+		(u8_t)(word & 0xff),
+		(u8_t)(word >> 8)
 	};
 
 	return bmi160_transceive(dev, tx_buf, 3, NULL, 0);
 }
 
-int bmi160_reg_field_update(struct device *dev, uint8_t reg_addr,
-			    uint8_t pos, uint8_t mask, uint8_t val)
+int bmi160_reg_field_update(struct device *dev, u8_t reg_addr,
+			    u8_t pos, u8_t mask, u8_t val)
 {
-	uint8_t old_val;
+	u8_t old_val;
 
 	if (bmi160_byte_read(dev, reg_addr, &old_val) < 0) {
 		return -EIO;
@@ -122,8 +122,8 @@ int bmi160_reg_field_update(struct device *dev, uint8_t reg_addr,
 static int bmi160_pmu_set(struct device *dev, union bmi160_pmu_status *pmu_sts)
 {
 	struct {
-		uint8_t cmd;
-		uint16_t delay_us; /* values taken from page 82 */
+		u8_t cmd;
+		u16_t delay_us; /* values taken from page 82 */
 	} cmds[] = {
 		{BMI160_CMD_PMU_MAG | pmu_sts->mag, 350},
 		{BMI160_CMD_PMU_ACC | pmu_sts->acc, 3200},
@@ -175,12 +175,12 @@ static int bmi160_pmu_set(struct device *dev, union bmi160_pmu_status *pmu_sts)
  * Output data rate map with allowed frequencies:
  * freq = freq_int + freq_milli / 1000
  *
- * Since we don't need a finer frequency resolution than milliHz, use uint16_t
+ * Since we don't need a finer frequency resolution than milliHz, use u16_t
  * to save some flash.
  */
 struct {
-	uint16_t freq_int;
-	uint16_t freq_milli; /* User should convert to uHz before setting the
+	u16_t freq_int;
+	u16_t freq_milli; /* User should convert to uHz before setting the
 			      * SENSOR_ATTR_SAMPLING_FREQUENCY attribute.
 			      */
 } bmi160_odr_map[] = {
@@ -189,7 +189,7 @@ struct {
 	{400,  0  }, {800,   0  }, {1600,  0  }, {3200, 0  },
 };
 
-static int bmi160_freq_to_odr_val(uint16_t freq_int, uint16_t freq_milli)
+static int bmi160_freq_to_odr_val(u16_t freq_int, u16_t freq_milli)
 {
 	size_t i;
 
@@ -211,8 +211,8 @@ static int bmi160_freq_to_odr_val(uint16_t freq_int, uint16_t freq_milli)
 #endif
 
 #if defined(CONFIG_BMI160_ACCEL_ODR_RUNTIME)
-static int bmi160_acc_odr_set(struct device *dev, uint16_t freq_int,
-			      uint16_t freq_milli)
+static int bmi160_acc_odr_set(struct device *dev, u16_t freq_int,
+			      u16_t freq_milli)
 {
 	struct bmi160_device_data *bmi160 = dev->driver_data;
 	int odr = bmi160_freq_to_odr_val(freq_int, freq_milli);
@@ -232,7 +232,7 @@ static int bmi160_acc_odr_set(struct device *dev, uint16_t freq_int,
 	return bmi160_reg_field_update(dev, BMI160_REG_ACC_CONF,
 				       BMI160_ACC_CONF_ODR_POS,
 				       BMI160_ACC_CONF_ODR_MASK,
-				       (uint8_t) odr);
+				       (u8_t) odr);
 }
 #endif
 
@@ -255,9 +255,9 @@ static const struct bmi160_range bmi160_gyr_range_map[] = {
 
 #if defined(CONFIG_BMI160_ACCEL_RANGE_RUNTIME) ||\
 	defined(CONFIG_BMI160_GYRO_RANGE_RUNTIME)
-static int32_t bmi160_range_to_reg_val(uint16_t range,
+static s32_t bmi160_range_to_reg_val(u16_t range,
 				       const struct bmi160_range *range_map,
-				       uint16_t range_map_size)
+				       u16_t range_map_size)
 {
 	int i;
 
@@ -271,9 +271,9 @@ static int32_t bmi160_range_to_reg_val(uint16_t range,
 }
 #endif
 
-static int32_t bmi160_reg_val_to_range(uint8_t reg_val,
+static s32_t bmi160_reg_val_to_range(u8_t reg_val,
 				       const struct bmi160_range *range_map,
-				       uint16_t range_map_size)
+				       u16_t range_map_size)
 {
 	int i;
 
@@ -286,19 +286,19 @@ static int32_t bmi160_reg_val_to_range(uint8_t reg_val,
 	return -EINVAL;
 }
 
-int32_t bmi160_acc_reg_val_to_range(uint8_t reg_val)
+s32_t bmi160_acc_reg_val_to_range(u8_t reg_val)
 {
 	return bmi160_reg_val_to_range(reg_val, bmi160_acc_range_map,
 				       BMI160_ACC_RANGE_MAP_SIZE);
 }
 
-int32_t bmi160_gyr_reg_val_to_range(uint8_t reg_val)
+s32_t bmi160_gyr_reg_val_to_range(u8_t reg_val)
 {
 	return bmi160_reg_val_to_range(reg_val, bmi160_gyr_range_map,
 				       BMI160_GYR_RANGE_MAP_SIZE);
 }
 
-static int bmi160_do_calibration(struct device *dev, uint8_t foc_conf)
+static int bmi160_do_calibration(struct device *dev, u8_t foc_conf)
 {
 	if (bmi160_byte_write(dev, BMI160_REG_FOC_CONF, foc_conf) < 0) {
 		return -EIO;
@@ -314,10 +314,10 @@ static int bmi160_do_calibration(struct device *dev, uint8_t foc_conf)
 }
 
 #if defined(CONFIG_BMI160_ACCEL_RANGE_RUNTIME)
-static int bmi160_acc_range_set(struct device *dev, int32_t range)
+static int bmi160_acc_range_set(struct device *dev, s32_t range)
 {
 	struct bmi160_device_data *bmi160 = dev->driver_data;
-	int32_t reg_val = bmi160_range_to_reg_val(range,
+	s32_t reg_val = bmi160_range_to_reg_val(range,
 						  bmi160_acc_range_map,
 						  BMI160_ACC_RANGE_MAP_SIZE);
 
@@ -344,14 +344,14 @@ static int bmi160_acc_range_set(struct device *dev, int32_t range)
 static int bmi160_acc_ofs_set(struct device *dev, enum sensor_channel chan,
 			      const struct sensor_value *ofs)
 {
-	uint8_t reg_addr[] = {
+	u8_t reg_addr[] = {
 		BMI160_REG_OFFSET_ACC_X,
 		BMI160_REG_OFFSET_ACC_Y,
 		BMI160_REG_OFFSET_ACC_Z
 	};
 	int i;
-	int32_t ofs_u;
-	int8_t reg_val;
+	s32_t ofs_u;
+	s8_t reg_val;
 
 	/* we need the offsets for all axis */
 	if (chan != SENSOR_CHAN_ACCEL_XYZ) {
@@ -378,13 +378,13 @@ static int  bmi160_acc_calibrate(struct device *dev, enum sensor_channel chan,
 				 const struct sensor_value *xyz_calib_value)
 {
 	struct bmi160_device_data *bmi160 = dev->driver_data;
-	uint8_t foc_pos[] = {
+	u8_t foc_pos[] = {
 		BMI160_FOC_ACC_X_POS,
 		BMI160_FOC_ACC_Y_POS,
 		BMI160_FOC_ACC_Z_POS,
 	};
 	int i;
-	uint8_t reg_val = 0;
+	u8_t reg_val = 0;
 
 	/* Calibration has to be done in normal mode. */
 	if (bmi160->pmu_sts.acc != BMI160_PMU_NORMAL) {
@@ -399,8 +399,8 @@ static int  bmi160_acc_calibrate(struct device *dev, enum sensor_channel chan,
 	}
 
 	for (i = 0; i < 3; i++, xyz_calib_value++) {
-		int32_t accel_g;
-		uint8_t accel_val;
+		s32_t accel_g;
+		u8_t accel_val;
 
 		accel_g = sensor_ms2_to_g(xyz_calib_value);
 		if (accel_g == 0) {
@@ -457,8 +457,8 @@ static int bmi160_acc_config(struct device *dev, enum sensor_channel chan,
 #endif /* !defined(CONFIG_BMI160_ACCEL_PMU_SUSPEND) */
 
 #if defined(CONFIG_BMI160_GYRO_ODR_RUNTIME)
-static int bmi160_gyr_odr_set(struct device *dev, uint16_t freq_int,
-			      uint16_t freq_milli)
+static int bmi160_gyr_odr_set(struct device *dev, u16_t freq_int,
+			      u16_t freq_milli)
 {
 	int odr = bmi160_freq_to_odr_val(freq_int, freq_milli);
 
@@ -473,15 +473,15 @@ static int bmi160_gyr_odr_set(struct device *dev, uint16_t freq_int,
 	return bmi160_reg_field_update(dev, BMI160_REG_GYR_CONF,
 				       BMI160_GYR_CONF_ODR_POS,
 				       BMI160_GYR_CONF_ODR_MASK,
-				       (uint8_t) odr);
+				       (u8_t) odr);
 }
 #endif
 
 #if defined(CONFIG_BMI160_GYRO_RANGE_RUNTIME)
-static int bmi160_gyr_range_set(struct device *dev, uint16_t range)
+static int bmi160_gyr_range_set(struct device *dev, u16_t range)
 {
 	struct bmi160_device_data *bmi160 = dev->driver_data;
-	int32_t reg_val = bmi160_range_to_reg_val(range,
+	s32_t reg_val = bmi160_range_to_reg_val(range,
 						  bmi160_gyr_range_map,
 						  BMI160_GYR_RANGE_MAP_SIZE);
 
@@ -509,16 +509,16 @@ static int bmi160_gyr_ofs_set(struct device *dev, enum sensor_channel chan,
 			      const struct sensor_value *ofs)
 {
 	struct {
-		uint8_t lsb_addr;
-		uint8_t msb_pos;
+		u8_t lsb_addr;
+		u8_t msb_pos;
 	} ofs_desc[] = {
 		{BMI160_REG_OFFSET_GYR_X, BMI160_GYR_MSB_OFS_X_POS},
 		{BMI160_REG_OFFSET_GYR_Y, BMI160_GYR_MSB_OFS_Y_POS},
 		{BMI160_REG_OFFSET_GYR_Z, BMI160_GYR_MSB_OFS_Z_POS},
 	};
 	int i;
-	int32_t ofs_u;
-	int16_t val;
+	s32_t ofs_u;
+	s16_t val;
 
 	/* we need the offsets for all axis */
 	if (chan != SENSOR_CHAN_GYRO_XYZ) {
@@ -645,7 +645,7 @@ static int bmi160_attr_set(struct device *dev, enum sensor_channel chan,
 static int bmi160_sample_fetch(struct device *dev, enum sensor_channel chan)
 {
 	struct bmi160_device_data *bmi160 = dev->driver_data;
-	uint8_t tx[BMI160_BUF_SIZE] = {0};
+	u8_t tx[BMI160_BUF_SIZE] = {0};
 	size_t i;
 
 	__ASSERT_NO_MSG(chan == SENSOR_CHAN_ALL);
@@ -669,8 +669,8 @@ static int bmi160_sample_fetch(struct device *dev, enum sensor_channel chan)
 
 	/* convert samples to cpu endianness */
 	for (i = 0; i < BMI160_SAMPLE_SIZE; i += 2) {
-		uint16_t *sample =
-			(uint16_t *) &bmi160->sample.raw[BMI160_DATA_OFS + i];
+		u16_t *sample =
+			(u16_t *) &bmi160->sample.raw[BMI160_DATA_OFS + i];
 
 		*sample = sys_le16_to_cpu(*sample);
 	}
@@ -678,10 +678,10 @@ static int bmi160_sample_fetch(struct device *dev, enum sensor_channel chan)
 	return 0;
 }
 
-static void bmi160_to_fixed_point(int16_t raw_val, uint16_t scale,
+static void bmi160_to_fixed_point(s16_t raw_val, u16_t scale,
 				  struct sensor_value *val)
 {
-	int32_t converted_val;
+	s32_t converted_val;
 
 	/*
 	 * maximum converted value we can get is: max(raw_val) * max(scale)
@@ -695,12 +695,12 @@ static void bmi160_to_fixed_point(int16_t raw_val, uint16_t scale,
 }
 
 static void bmi160_channel_convert(enum sensor_channel chan,
-				   uint16_t scale,
-				   uint16_t *raw_xyz,
+				   u16_t scale,
+				   u16_t *raw_xyz,
 				   struct sensor_value *val)
 {
 	int i;
-	uint8_t ofs_start, ofs_stop;
+	u8_t ofs_start, ofs_stop;
 
 	switch (chan) {
 	case SENSOR_CHAN_ACCEL_X:
@@ -751,8 +751,8 @@ static inline void bmi160_acc_channel_get(struct device *dev,
 
 static int bmi160_temp_channel_get(struct device *dev, struct sensor_value *val)
 {
-	uint16_t temp_raw = 0;
-	int32_t temp_micro = 0;
+	u16_t temp_raw = 0;
+	s32_t temp_micro = 0;
 	struct bmi160_device_data *bmi160 = dev->driver_data;
 
 	if (bmi160->pmu_sts.raw == 0) {
@@ -816,8 +816,8 @@ int bmi160_init(struct device *dev)
 {
 	const struct bmi160_device_config *cfg = dev->config->config_info;
 	struct bmi160_device_data *bmi160 = dev->driver_data;
-	uint8_t val = 0;
-	int32_t acc_range, gyr_range;
+	u8_t val = 0;
+	s32_t acc_range, gyr_range;
 
 	bmi160->spi = device_get_binding((char *)cfg->spi_port);
 	if (!bmi160->spi) {
diff --git a/drivers/sensor/bmi160/bmi160.h b/drivers/sensor/bmi160/bmi160.h
index fec2ba1c235..5a1a637d3d7 100644
--- a/drivers/sensor/bmi160/bmi160.h
+++ b/drivers/sensor/bmi160/bmi160.h
@@ -378,56 +378,56 @@ enum bmi160_odr {
 /* end of default settings */
 
 struct bmi160_range {
-	uint16_t range;
-	uint8_t reg_val;
+	u16_t range;
+	u8_t reg_val;
 };
 
 struct bmi160_device_config {
 	const char *spi_port;
 #if defined(CONFIG_BMI160_TRIGGER)
 	const char *gpio_port;
-	uint8_t int_pin;
+	u8_t int_pin;
 #endif
-	uint32_t spi_freq;
-	uint8_t spi_slave;
+	u32_t spi_freq;
+	u8_t spi_slave;
 };
 
 union bmi160_pmu_status {
-	uint8_t raw;
+	u8_t raw;
 	struct {
-		uint8_t mag : 2;
-		uint8_t gyr : 2;
-		uint8_t acc : 2;
-		uint8_t res : 2;
+		u8_t mag : 2;
+		u8_t gyr : 2;
+		u8_t acc : 2;
+		u8_t res : 2;
 	};
 };
 
 #if !defined(CONFIG_BMI160_GYRO_PMU_SUSPEND) && \
 		!defined(CONFIG_BMI160_ACCEL_PMU_SUSPEND)
-#	define BMI160_SAMPLE_SIZE		(6 * sizeof(uint16_t))
+#	define BMI160_SAMPLE_SIZE		(6 * sizeof(u16_t))
 #else
-#	define BMI160_SAMPLE_SIZE		(3 * sizeof(uint16_t))
+#	define BMI160_SAMPLE_SIZE		(3 * sizeof(u16_t))
 #endif
 
 /* total buffer contains one dummy byte, needed by SPI */
 #define BMI160_BUF_SIZE			(BMI160_SAMPLE_SIZE + 1)
 #define BMI160_DATA_OFS			1
 union bmi160_sample {
-	uint8_t raw[BMI160_BUF_SIZE];
+	u8_t raw[BMI160_BUF_SIZE];
 	struct {
-		uint8_t dummy_byte;
+		u8_t dummy_byte;
 #if !defined(CONFIG_BMI160_GYRO_PMU_SUSPEND)
-		uint16_t gyr[3];
+		u16_t gyr[3];
 #endif
 #if !defined(CONFIG_BMI160_ACCEL_PMU_SUSPEND)
-		uint16_t acc[3];
+		u16_t acc[3];
 #endif
 	} __packed;
 };
 
 struct bmi160_scale {
-	uint16_t acc; /* micro m/s^2/lsb */
-	uint16_t gyr; /* micro radians/s/lsb */
+	u16_t acc; /* micro m/s^2/lsb */
+	u16_t gyr; /* micro radians/s/lsb */
 };
 
 struct bmi160_device_data {
@@ -460,15 +460,15 @@ struct bmi160_device_data {
 #endif /* CONFIG_BMI160_TRIGGER */
 };
 
-int bmi160_read(struct device *dev, uint8_t reg_addr,
-		uint8_t *data, uint8_t len);
-int bmi160_byte_read(struct device *dev, uint8_t reg_addr, uint8_t *byte);
-int bmi160_byte_write(struct device *dev, uint8_t reg_addr, uint8_t byte);
-int bmi160_word_write(struct device *dev, uint8_t reg_addr, uint16_t word);
-int bmi160_reg_field_update(struct device *dev, uint8_t reg_addr,
-			    uint8_t pos, uint8_t mask, uint8_t val);
-static inline int bmi160_reg_update(struct device *dev, uint8_t reg_addr,
-				    uint8_t mask, uint8_t val)
+int bmi160_read(struct device *dev, u8_t reg_addr,
+		u8_t *data, u8_t len);
+int bmi160_byte_read(struct device *dev, u8_t reg_addr, u8_t *byte);
+int bmi160_byte_write(struct device *dev, u8_t reg_addr, u8_t byte);
+int bmi160_word_write(struct device *dev, u8_t reg_addr, u16_t word);
+int bmi160_reg_field_update(struct device *dev, u8_t reg_addr,
+			    u8_t pos, u8_t mask, u8_t val);
+static inline int bmi160_reg_update(struct device *dev, u8_t reg_addr,
+				    u8_t mask, u8_t val)
 {
 	return bmi160_reg_field_update(dev, reg_addr, 0, mask, val);
 }
@@ -478,8 +478,8 @@ int bmi160_trigger_set(struct device *dev,
 		       sensor_trigger_handler_t handler);
 int bmi160_acc_slope_config(struct device *dev, enum sensor_attribute attr,
 			    const struct sensor_value *val);
-int32_t bmi160_acc_reg_val_to_range(uint8_t reg_val);
-int32_t bmi160_gyr_reg_val_to_range(uint8_t reg_val);
+s32_t bmi160_acc_reg_val_to_range(u8_t reg_val);
+s32_t bmi160_gyr_reg_val_to_range(u8_t reg_val);
 
 #define SYS_LOG_DOMAIN "BMI160"
 #define SYS_LOG_LEVEL CONFIG_SYS_LOG_SENSOR_LEVEL
diff --git a/drivers/sensor/bmi160/bmi160_trigger.c b/drivers/sensor/bmi160/bmi160_trigger.c
index a901c827af1..f47f3312889 100644
--- a/drivers/sensor/bmi160/bmi160_trigger.c
+++ b/drivers/sensor/bmi160/bmi160_trigger.c
@@ -24,7 +24,7 @@ static void bmi160_handle_anymotion(struct device *dev)
 	}
 }
 
-static void bmi160_handle_drdy(struct device *dev, uint8_t status)
+static void bmi160_handle_drdy(struct device *dev, u8_t status)
 {
 	struct bmi160_device_data *bmi160 = dev->driver_data;
 	struct sensor_trigger drdy_trigger = {
@@ -51,11 +51,11 @@ static void bmi160_handle_interrupts(void *arg)
 	struct device *dev = (struct device *)arg;
 
 	union {
-		uint8_t raw[6];
+		u8_t raw[6];
 		struct {
-			uint8_t dummy; /* spi related dummy byte */
-			uint8_t status;
-			uint8_t int_status[4];
+			u8_t dummy; /* spi related dummy byte */
+			u8_t status;
+			u8_t int_status[4];
 		};
 	} buf;
 
@@ -106,7 +106,7 @@ static void bmi160_work_handler(struct k_work *work)
 extern struct bmi160_device_data bmi160_data;
 
 static void bmi160_gpio_callback(struct device *port,
-				 struct gpio_callback *cb, uint32_t pin)
+				 struct gpio_callback *cb, u32_t pin)
 {
 	struct bmi160_device_data *bmi160 =
 		CONTAINER_OF(cb, struct bmi160_device_data, gpio_cb);
@@ -126,7 +126,7 @@ static int bmi160_trigger_drdy_set(struct device *dev,
 				   sensor_trigger_handler_t handler)
 {
 	struct bmi160_device_data *bmi160 = dev->driver_data;
-	uint8_t drdy_en = 0;
+	u8_t drdy_en = 0;
 
 #if !defined(CONFIG_BMI160_ACCEL_PMU_SUSPEND)
 	if (chan == SENSOR_CHAN_ACCEL_XYZ) {
@@ -161,7 +161,7 @@ static int bmi160_trigger_anym_set(struct device *dev,
 				   sensor_trigger_handler_t handler)
 {
 	struct bmi160_device_data *bmi160 = dev->driver_data;
-	uint8_t anym_en = 0;
+	u8_t anym_en = 0;
 
 	bmi160->handler_anymotion = handler;
 
@@ -195,8 +195,8 @@ static int bmi160_trigger_set_acc(struct device *dev,
 int bmi160_acc_slope_config(struct device *dev, enum sensor_attribute attr,
 			    const struct sensor_value *val)
 {
-	uint8_t acc_range_g, reg_val;
-	uint32_t slope_th_ums2;
+	u8_t acc_range_g, reg_val;
+	u32_t slope_th_ums2;
 
 	if (attr == SENSOR_ATTR_SLOPE_TH) {
 		if (bmi160_byte_read(dev, BMI160_REG_ACC_RANGE, &reg_val) < 0) {
diff --git a/drivers/sensor/dht/dht.c b/drivers/sensor/dht/dht.c
index aa47812f62c..54e4c20be44 100644
--- a/drivers/sensor/dht/dht.c
+++ b/drivers/sensor/dht/dht.c
@@ -23,17 +23,17 @@
  * @return duration in usec of signal being measured,
  *         -1 if duration exceeds DHT_SIGNAL_MAX_WAIT_DURATION
  */
-static int8_t dht_measure_signal_duration(struct dht_data *drv_data,
-					  uint32_t signal_val)
+static s8_t dht_measure_signal_duration(struct dht_data *drv_data,
+					  u32_t signal_val)
 {
-	uint32_t val;
-	uint32_t elapsed_cycles;
-	uint32_t max_wait_cycles = (uint32_t)(
-		(uint64_t)DHT_SIGNAL_MAX_WAIT_DURATION *
-		(uint64_t)sys_clock_hw_cycles_per_sec /
-		(uint64_t)USEC_PER_SEC
+	u32_t val;
+	u32_t elapsed_cycles;
+	u32_t max_wait_cycles = (u32_t)(
+		(u64_t)DHT_SIGNAL_MAX_WAIT_DURATION *
+		(u64_t)sys_clock_hw_cycles_per_sec /
+		(u64_t)USEC_PER_SEC
 	);
-	uint32_t start_cycles = k_cycle_get_32();
+	u32_t start_cycles = k_cycle_get_32();
 
 	do {
 		gpio_pin_read(drv_data->gpio, CONFIG_DHT_GPIO_PIN_NUM, &val);
@@ -44,18 +44,18 @@ static int8_t dht_measure_signal_duration(struct dht_data *drv_data,
 		}
 	} while (val == signal_val);
 
-	return (uint64_t)elapsed_cycles *
-	       (uint64_t)USEC_PER_SEC /
-	       (uint64_t)sys_clock_hw_cycles_per_sec;
+	return (u64_t)elapsed_cycles *
+	       (u64_t)USEC_PER_SEC /
+	       (u64_t)sys_clock_hw_cycles_per_sec;
 }
 
 static int dht_sample_fetch(struct device *dev, enum sensor_channel chan)
 {
 	struct dht_data *drv_data = dev->driver_data;
 	int ret = 0;
-	int8_t signal_duration[DHT_DATA_BITS_NUM];
-	int8_t max_duration, min_duration, avg_duration;
-	uint8_t buf[5];
+	s8_t signal_duration[DHT_DATA_BITS_NUM];
+	s8_t max_duration, min_duration, avg_duration;
+	u8_t buf[5];
 	unsigned int i, j;
 
 	__ASSERT_NO_MSG(chan == SENSOR_CHAN_ALL);
@@ -122,7 +122,7 @@ static int dht_sample_fetch(struct device *dev, enum sensor_channel chan)
 			max_duration = signal_duration[i];
 		}
 	}
-	avg_duration = ((int16_t)min_duration + (int16_t)max_duration) / 2;
+	avg_duration = ((s16_t)min_duration + (s16_t)max_duration) / 2;
 
 	/* store bits in buf */
 	j = 0;
@@ -179,7 +179,7 @@ static int dht_channel_get(struct device *dev,
 	 * use both integral and decimal data bytes; resulted 16bit data has
 	 * a resolution of 0.1 units
 	 */
-	int16_t raw_val, sign;
+	s16_t raw_val, sign;
 
 	if (chan == SENSOR_CHAN_HUMIDITY) {
 		raw_val = (drv_data->sample[0] << 8) | drv_data->sample[1];
diff --git a/drivers/sensor/dht/dht.h b/drivers/sensor/dht/dht.h
index cf2b9cac7f5..5ca35bbe5e8 100644
--- a/drivers/sensor/dht/dht.h
+++ b/drivers/sensor/dht/dht.h
@@ -19,7 +19,7 @@
 
 struct dht_data {
 	struct device *gpio;
-	uint8_t sample[4];
+	u8_t sample[4];
 };
 
 #endif
diff --git a/drivers/sensor/fxas21002/fxas21002.c b/drivers/sensor/fxas21002/fxas21002.c
index 8cda81b749c..ec033abf038 100644
--- a/drivers/sensor/fxas21002/fxas21002.c
+++ b/drivers/sensor/fxas21002/fxas21002.c
@@ -9,7 +9,7 @@
 #include <misc/__assert.h>
 
 /* Sample period in microseconds, indexed by output data rate encoding (DR) */
-static const uint32_t sample_period[] = {
+static const u32_t sample_period[] = {
 	1250, 2500, 5000, 10000, 20000, 40000, 80000, 80000
 };
 
@@ -17,8 +17,8 @@ static int fxas21002_sample_fetch(struct device *dev, enum sensor_channel chan)
 {
 	const struct fxas21002_config *config = dev->config->config_info;
 	struct fxas21002_data *data = dev->driver_data;
-	uint8_t buffer[FXAS21002_MAX_NUM_BYTES];
-	int16_t *raw;
+	u8_t buffer[FXAS21002_MAX_NUM_BYTES];
+	s16_t *raw;
 	int ret = 0;
 	int i;
 
@@ -53,10 +53,10 @@ exit:
 	return ret;
 }
 
-static void fxas21002_convert(struct sensor_value *val, int16_t raw,
+static void fxas21002_convert(struct sensor_value *val, s16_t raw,
 			      enum fxas21002_range range)
 {
-	int32_t micro_rad;
+	s32_t micro_rad;
 
 	/* Convert units to micro radians per second.*/
 	micro_rad = (raw * 62500) >> range;
@@ -72,7 +72,7 @@ static int fxas21002_channel_get(struct device *dev, enum sensor_channel chan,
 	struct fxas21002_data *data = dev->driver_data;
 	int start_channel;
 	int num_channels;
-	int16_t *raw;
+	s16_t *raw;
 	int ret;
 	int i;
 
@@ -129,7 +129,7 @@ int fxas21002_get_power(struct device *dev, enum fxas21002_power *power)
 {
 	const struct fxas21002_config *config = dev->config->config_info;
 	struct fxas21002_data *data = dev->driver_data;
-	uint8_t val = *power;
+	u8_t val = *power;
 
 	if (i2c_reg_read_byte(data->i2c, config->i2c_address,
 			      FXAS21002_REG_CTRLREG1,
@@ -154,11 +154,11 @@ int fxas21002_set_power(struct device *dev, enum fxas21002_power power)
 				   power);
 }
 
-uint32_t fxas21002_get_transition_time(enum fxas21002_power start,
+u32_t fxas21002_get_transition_time(enum fxas21002_power start,
 				       enum fxas21002_power end,
-				       uint8_t dr)
+				       u8_t dr)
 {
-	uint32_t transition_time;
+	u32_t transition_time;
 
 	/* If not transitioning to active mode, then don't need to wait */
 	if (end != FXAS21002_POWER_ACTIVE) {
@@ -183,9 +183,9 @@ static int fxas21002_init(struct device *dev)
 {
 	const struct fxas21002_config *config = dev->config->config_info;
 	struct fxas21002_data *data = dev->driver_data;
-	uint32_t transition_time;
-	uint8_t whoami;
-	uint8_t ctrlreg1;
+	u32_t transition_time;
+	u8_t whoami;
+	u8_t ctrlreg1;
 
 	/* Get the I2C device */
 	data->i2c = device_get_binding(config->i2c_name);
diff --git a/drivers/sensor/fxas21002/fxas21002.h b/drivers/sensor/fxas21002/fxas21002.h
index f246523c9c6..4402b85b003 100644
--- a/drivers/sensor/fxas21002/fxas21002.h
+++ b/drivers/sensor/fxas21002/fxas21002.h
@@ -64,12 +64,12 @@ struct fxas21002_config {
 	char *i2c_name;
 #ifdef CONFIG_FXAS21002_TRIGGER
 	char *gpio_name;
-	uint8_t gpio_pin;
+	u8_t gpio_pin;
 #endif
-	uint8_t i2c_address;
-	uint8_t whoami;
+	u8_t i2c_address;
+	u8_t whoami;
 	enum fxas21002_range range;
-	uint8_t dr;
+	u8_t dr;
 };
 
 struct fxas21002_data {
@@ -77,7 +77,7 @@ struct fxas21002_data {
 	struct k_sem sem;
 #ifdef CONFIG_FXAS21002_TRIGGER
 	struct device *gpio;
-	uint8_t gpio_pin;
+	u8_t gpio_pin;
 	struct gpio_callback gpio_cb;
 	sensor_trigger_handler_t drdy_handler;
 #endif
@@ -89,15 +89,15 @@ struct fxas21002_data {
 	struct k_work work;
 	struct device *dev;
 #endif
-	int16_t raw[FXAS21002_MAX_NUM_CHANNELS];
+	s16_t raw[FXAS21002_MAX_NUM_CHANNELS];
 };
 
 int fxas21002_get_power(struct device *dev, enum fxas21002_power *power);
 int fxas21002_set_power(struct device *dev, enum fxas21002_power power);
 
-uint32_t fxas21002_get_transition_time(enum fxas21002_power start,
+u32_t fxas21002_get_transition_time(enum fxas21002_power start,
 				       enum fxas21002_power end,
-				       uint8_t dr);
+				       u8_t dr);
 
 #if CONFIG_FXAS21002_TRIGGER
 int fxas21002_trigger_init(struct device *dev);
diff --git a/drivers/sensor/fxas21002/fxas21002_trigger.c b/drivers/sensor/fxas21002/fxas21002_trigger.c
index da78e9287e6..f17c5584ec5 100644
--- a/drivers/sensor/fxas21002/fxas21002_trigger.c
+++ b/drivers/sensor/fxas21002/fxas21002_trigger.c
@@ -8,7 +8,7 @@
 
 static void fxas21002_gpio_callback(struct device *dev,
 				   struct gpio_callback *cb,
-				   uint32_t pin_mask)
+				   u32_t pin_mask)
 {
 	struct fxas21002_data *data =
 		CONTAINER_OF(cb, struct fxas21002_data, gpio_cb);
@@ -47,7 +47,7 @@ static void fxas21002_handle_int(void *arg)
 	struct device *dev = (struct device *)arg;
 	const struct fxas21002_config *config = dev->config->config_info;
 	struct fxas21002_data *data = dev->driver_data;
-	uint8_t int_source;
+	u8_t int_source;
 
 	k_sem_take(&data->sem, K_FOREVER);
 
@@ -100,8 +100,8 @@ int fxas21002_trigger_set(struct device *dev,
 	const struct fxas21002_config *config = dev->config->config_info;
 	struct fxas21002_data *data = dev->driver_data;
 	enum fxas21002_power power = FXAS21002_POWER_STANDBY;
-	uint32_t transition_time;
-	uint8_t mask;
+	u32_t transition_time;
+	u8_t mask;
 	int ret = 0;
 
 	k_sem_take(&data->sem, K_FOREVER);
@@ -167,7 +167,7 @@ int fxas21002_trigger_init(struct device *dev)
 {
 	const struct fxas21002_config *config = dev->config->config_info;
 	struct fxas21002_data *data = dev->driver_data;
-	uint8_t ctrl_reg2;
+	u8_t ctrl_reg2;
 
 #if defined(CONFIG_FXAS21002_TRIGGER_OWN_THREAD)
 	k_sem_init(&data->trig_sem, 0, UINT_MAX);
diff --git a/drivers/sensor/fxos8700/fxos8700.c b/drivers/sensor/fxos8700/fxos8700.c
index d05e3ce7b57..74cd038c612 100644
--- a/drivers/sensor/fxos8700/fxos8700.c
+++ b/drivers/sensor/fxos8700/fxos8700.c
@@ -12,9 +12,9 @@ static int fxos8700_sample_fetch(struct device *dev, enum sensor_channel chan)
 {
 	const struct fxos8700_config *config = dev->config->config_info;
 	struct fxos8700_data *data = dev->driver_data;
-	uint8_t buffer[FXOS8700_MAX_NUM_BYTES];
-	uint8_t num_bytes;
-	int16_t *raw;
+	u8_t buffer[FXOS8700_MAX_NUM_BYTES];
+	u8_t num_bytes;
+	s16_t *raw;
 	int ret = 0;
 	int i;
 
@@ -69,11 +69,11 @@ exit:
 	return ret;
 }
 
-static void fxos8700_accel_convert(struct sensor_value *val, int16_t raw,
+static void fxos8700_accel_convert(struct sensor_value *val, s16_t raw,
 				   enum fxos8700_range range)
 {
-	uint8_t frac_bits;
-	int64_t micro_ms2;
+	u8_t frac_bits;
+	s64_t micro_ms2;
 
 	/* The range encoding is convenient to compute the number of fractional
 	 * bits:
@@ -89,16 +89,16 @@ static void fxos8700_accel_convert(struct sensor_value *val, int16_t raw,
 	micro_ms2 = (raw * SENSOR_G) >> frac_bits;
 
 	/* The maximum possible value is 8g, which in units of micro m/s^2
-	 * always fits into 32-bits. Cast down to int32_t so we can use a
+	 * always fits into 32-bits. Cast down to s32_t so we can use a
 	 * faster divide.
 	 */
-	val->val1 = (int32_t) micro_ms2 / 1000000;
-	val->val2 = (int32_t) micro_ms2 % 1000000;
+	val->val1 = (s32_t) micro_ms2 / 1000000;
+	val->val2 = (s32_t) micro_ms2 % 1000000;
 }
 
-static void fxos8700_magn_convert(struct sensor_value *val, int16_t raw)
+static void fxos8700_magn_convert(struct sensor_value *val, s16_t raw)
 {
-	int32_t micro_g;
+	s32_t micro_g;
 
 	/* Convert units to micro Gauss. Raw magnetic data always has a
 	 * resolution of 0.1 uT/LSB, which is equivalent to 0.001 G/LSB.
@@ -110,9 +110,9 @@ static void fxos8700_magn_convert(struct sensor_value *val, int16_t raw)
 }
 
 #ifdef CONFIG_FXOS8700_TEMP
-static void fxos8700_temp_convert(struct sensor_value *val, int8_t raw)
+static void fxos8700_temp_convert(struct sensor_value *val, s8_t raw)
 {
-	int32_t micro_c;
+	s32_t micro_c;
 
 	/* Convert units to micro Celsius. Raw temperature data always has a
 	 * resolution of 0.96 deg C/LSB.
@@ -131,7 +131,7 @@ static int fxos8700_channel_get(struct device *dev, enum sensor_channel chan,
 	struct fxos8700_data *data = dev->driver_data;
 	int start_channel;
 	int num_channels;
-	int16_t *raw;
+	s16_t *raw;
 	int ret;
 	int i;
 
@@ -236,7 +236,7 @@ int fxos8700_get_power(struct device *dev, enum fxos8700_power *power)
 {
 	const struct fxos8700_config *config = dev->config->config_info;
 	struct fxos8700_data *data = dev->driver_data;
-	uint8_t val = *power;
+	u8_t val = *power;
 
 	if (i2c_reg_read_byte(data->i2c, config->i2c_address,
 			      FXOS8700_REG_CTRLREG1,
@@ -265,7 +265,7 @@ static int fxos8700_init(struct device *dev)
 {
 	const struct fxos8700_config *config = dev->config->config_info;
 	struct fxos8700_data *data = dev->driver_data;
-	uint8_t whoami;
+	u8_t whoami;
 
 	/* Get the I2C device */
 	data->i2c = device_get_binding(config->i2c_name);
diff --git a/drivers/sensor/fxos8700/fxos8700.h b/drivers/sensor/fxos8700/fxos8700.h
index d2e3b2a4afe..40056780919 100644
--- a/drivers/sensor/fxos8700/fxos8700.h
+++ b/drivers/sensor/fxos8700/fxos8700.h
@@ -92,21 +92,21 @@ struct fxos8700_config {
 	char *i2c_name;
 #ifdef CONFIG_FXOS8700_TRIGGER
 	char *gpio_name;
-	uint8_t gpio_pin;
+	u8_t gpio_pin;
 #endif
-	uint8_t i2c_address;
-	uint8_t whoami;
+	u8_t i2c_address;
+	u8_t whoami;
 	enum fxos8700_mode mode;
 	enum fxos8700_range range;
-	uint8_t start_addr;
-	uint8_t start_channel;
-	uint8_t num_channels;
+	u8_t start_addr;
+	u8_t start_channel;
+	u8_t num_channels;
 #ifdef CONFIG_FXOS8700_PULSE
-	uint8_t pulse_cfg;
-	uint8_t pulse_ths[3];
-	uint8_t pulse_tmlt;
-	uint8_t pulse_ltcy;
-	uint8_t pulse_wind;
+	u8_t pulse_cfg;
+	u8_t pulse_ths[3];
+	u8_t pulse_tmlt;
+	u8_t pulse_ltcy;
+	u8_t pulse_wind;
 #endif
 };
 
@@ -115,7 +115,7 @@ struct fxos8700_data {
 	struct k_sem sem;
 #ifdef CONFIG_FXOS8700_TRIGGER
 	struct device *gpio;
-	uint8_t gpio_pin;
+	u8_t gpio_pin;
 	struct gpio_callback gpio_cb;
 	sensor_trigger_handler_t drdy_handler;
 #endif
@@ -131,9 +131,9 @@ struct fxos8700_data {
 	struct k_work work;
 	struct device *dev;
 #endif
-	int16_t raw[FXOS8700_MAX_NUM_CHANNELS];
+	s16_t raw[FXOS8700_MAX_NUM_CHANNELS];
 #ifdef CONFIG_FXOS8700_TEMP
-	int8_t temp;
+	s8_t temp;
 #endif
 };
 
diff --git a/drivers/sensor/fxos8700/fxos8700_trigger.c b/drivers/sensor/fxos8700/fxos8700_trigger.c
index f885ac87f15..964d8ffac45 100644
--- a/drivers/sensor/fxos8700/fxos8700_trigger.c
+++ b/drivers/sensor/fxos8700/fxos8700_trigger.c
@@ -8,7 +8,7 @@
 
 static void fxos8700_gpio_callback(struct device *dev,
 				   struct gpio_callback *cb,
-				   uint32_t pin_mask)
+				   u32_t pin_mask)
 {
 	struct fxos8700_data *data =
 		CONTAINER_OF(cb, struct fxos8700_data, gpio_cb);
@@ -48,7 +48,7 @@ static int fxos8700_handle_pulse_int(struct device *dev)
 	const struct fxos8700_config *config = dev->config->config_info;
 	struct fxos8700_data *data = dev->driver_data;
 	sensor_trigger_handler_t handler = NULL;
-	uint8_t pulse_source;
+	u8_t pulse_source;
 
 	struct sensor_trigger pulse_trig = {
 		.chan = SENSOR_CHAN_ALL,
@@ -85,7 +85,7 @@ static void fxos8700_handle_int(void *arg)
 	struct device *dev = (struct device *)arg;
 	const struct fxos8700_config *config = dev->config->config_info;
 	struct fxos8700_data *data = dev->driver_data;
-	uint8_t int_source;
+	u8_t int_source;
 
 	k_sem_take(&data->sem, K_FOREVER);
 
@@ -143,7 +143,7 @@ int fxos8700_trigger_set(struct device *dev,
 	const struct fxos8700_config *config = dev->config->config_info;
 	struct fxos8700_data *data = dev->driver_data;
 	enum fxos8700_power power = FXOS8700_POWER_STANDBY;
-	uint8_t mask;
+	u8_t mask;
 	int ret = 0;
 
 	k_sem_take(&data->sem, K_FOREVER);
@@ -258,7 +258,7 @@ int fxos8700_trigger_init(struct device *dev)
 {
 	const struct fxos8700_config *config = dev->config->config_info;
 	struct fxos8700_data *data = dev->driver_data;
-	uint8_t ctrl_reg5;
+	u8_t ctrl_reg5;
 
 #if defined(CONFIG_FXOS8700_TRIGGER_OWN_THREAD)
 	k_sem_init(&data->trig_sem, 0, UINT_MAX);
diff --git a/drivers/sensor/hdc1008/hdc1008.c b/drivers/sensor/hdc1008/hdc1008.c
index 0caab402986..dd5f69f554e 100644
--- a/drivers/sensor/hdc1008/hdc1008.c
+++ b/drivers/sensor/hdc1008/hdc1008.c
@@ -15,7 +15,7 @@
 #include "hdc1008.h"
 
 static void hdc1008_gpio_callback(struct device *dev,
-				  struct gpio_callback *cb, uint32_t pins)
+				  struct gpio_callback *cb, u32_t pins)
 {
 	struct hdc1008_data *drv_data =
 		CONTAINER_OF(cb, struct hdc1008_data, gpio_cb);
@@ -29,7 +29,7 @@ static void hdc1008_gpio_callback(struct device *dev,
 static int hdc1008_sample_fetch(struct device *dev, enum sensor_channel chan)
 {
 	struct hdc1008_data *drv_data = dev->driver_data;
-	uint8_t buf[4];
+	u8_t buf[4];
 
 	__ASSERT_NO_MSG(chan == SENSOR_CHAN_ALL);
 
@@ -60,7 +60,7 @@ static int hdc1008_channel_get(struct device *dev,
 			       struct sensor_value *val)
 {
 	struct hdc1008_data *drv_data = dev->driver_data;
-	uint64_t tmp;
+	u64_t tmp;
 
 	/*
 	 * See datasheet "Temperature Register" and "Humidity
@@ -69,12 +69,12 @@ static int hdc1008_channel_get(struct device *dev,
 	 */
 	if (chan == SENSOR_CHAN_TEMP) {
 		/* val = -40 + 165 * sample / 2^16 */
-		tmp = 165 * (uint64_t)drv_data->t_sample;
-		val->val1 = (int32_t)(tmp >> 16) - 40;
+		tmp = 165 * (u64_t)drv_data->t_sample;
+		val->val1 = (s32_t)(tmp >> 16) - 40;
 		val->val2 = (1000000 * (tmp & 0xFFFF)) >> 16;
 	} else if (chan == SENSOR_CHAN_HUMIDITY) {
 		/* val = 100000 * sample / 2^16 */
-		tmp = 100000 * (uint64_t)drv_data->rh_sample;
+		tmp = 100000 * (u64_t)drv_data->rh_sample;
 		val->val1 = tmp >> 16;
 		val->val2 = (1000000 * (tmp & 0xFFFF)) >> 16;
 	} else {
@@ -89,10 +89,10 @@ static const struct sensor_driver_api hdc1008_driver_api = {
 	.channel_get = hdc1008_channel_get,
 };
 
-static uint16_t read16(struct device *dev, uint8_t a, uint8_t d)
+static u16_t read16(struct device *dev, u8_t a, u8_t d)
 {
-	uint8_t buf[2];
-	if (i2c_burst_read(dev, a, d, (uint8_t *)buf, 2) < 0) {
+	u8_t buf[2];
+	if (i2c_burst_read(dev, a, d, (u8_t *)buf, 2) < 0) {
 		SYS_LOG_ERR("Error reading register.");
 	}
 	return (buf[0] << 8 | buf[1]);
diff --git a/drivers/sensor/hdc1008/hdc1008.h b/drivers/sensor/hdc1008/hdc1008.h
index 399b03db0ae..47cac3b5264 100644
--- a/drivers/sensor/hdc1008/hdc1008.h
+++ b/drivers/sensor/hdc1008/hdc1008.h
@@ -20,8 +20,8 @@ struct hdc1008_data {
 	struct device *i2c;
 	struct device *gpio;
 	struct gpio_callback gpio_cb;
-	uint16_t t_sample;
-	uint16_t rh_sample;
+	u16_t t_sample;
+	u16_t rh_sample;
 	struct k_sem data_sem;
 };
 
diff --git a/drivers/sensor/hmc5883l/hmc5883l.c b/drivers/sensor/hmc5883l/hmc5883l.c
index 232209746a4..7765dcdb997 100644
--- a/drivers/sensor/hmc5883l/hmc5883l.c
+++ b/drivers/sensor/hmc5883l/hmc5883l.c
@@ -13,12 +13,12 @@
 
 #include "hmc5883l.h"
 
-static void hmc5883l_convert(struct sensor_value *val, int16_t raw_val,
-			     uint16_t divider)
+static void hmc5883l_convert(struct sensor_value *val, s16_t raw_val,
+			     u16_t divider)
 {
 	/* val = raw_val / divider */
 	val->val1 = raw_val / divider;
-	val->val2 = (((int64_t)raw_val % divider) * 1000000L) / divider;
+	val->val2 = (((s64_t)raw_val % divider) * 1000000L) / divider;
 }
 
 static int hmc5883l_channel_get(struct device *dev,
@@ -51,13 +51,13 @@ static int hmc5883l_channel_get(struct device *dev,
 static int hmc5883l_sample_fetch(struct device *dev, enum sensor_channel chan)
 {
 	struct hmc5883l_data *drv_data = dev->driver_data;
-	int16_t buf[3];
+	s16_t buf[3];
 
 	__ASSERT_NO_MSG(chan == SENSOR_CHAN_ALL);
 
 	/* fetch magnetometer sample */
 	if (i2c_burst_read(drv_data->i2c, HMC5883L_I2C_ADDR,
-			   HMC5883L_REG_DATA_START, (uint8_t *)buf, 6) < 0) {
+			   HMC5883L_REG_DATA_START, (u8_t *)buf, 6) < 0) {
 		SYS_LOG_ERR("Failed to fetch megnetometer sample.");
 		return -EIO;
 	}
@@ -80,7 +80,7 @@ static const struct sensor_driver_api hmc5883l_driver_api = {
 int hmc5883l_init(struct device *dev)
 {
 	struct hmc5883l_data *drv_data = dev->driver_data;
-	uint8_t chip_cfg[3], id[3], idx;
+	u8_t chip_cfg[3], id[3], idx;
 
 	drv_data->i2c = device_get_binding(CONFIG_HMC5883L_I2C_MASTER_DEV_NAME);
 	if (drv_data->i2c == NULL) {
diff --git a/drivers/sensor/hmc5883l/hmc5883l.h b/drivers/sensor/hmc5883l/hmc5883l.h
index feb5f6b803c..41650e85e39 100644
--- a/drivers/sensor/hmc5883l/hmc5883l.h
+++ b/drivers/sensor/hmc5883l/hmc5883l.h
@@ -42,16 +42,16 @@ static const char * const hmc5883l_fs_strings[] = {
 	"0.88", "1.3", "1.9", "2.5", "4", "4.7", "5.6", "8.1"
 };
 
-static const uint16_t hmc5883l_gain[] = {
+static const u16_t hmc5883l_gain[] = {
 	1370, 1090, 820, 660, 440, 390, 330, 230
 };
 
 struct hmc5883l_data {
 	struct device *i2c;
-	int16_t x_sample;
-	int16_t y_sample;
-	int16_t z_sample;
-	uint8_t gain_idx;
+	s16_t x_sample;
+	s16_t y_sample;
+	s16_t z_sample;
+	u8_t gain_idx;
 
 #ifdef CONFIG_HMC5883L_TRIGGER
 	struct device *gpio;
diff --git a/drivers/sensor/hmc5883l/hmc5883l_trigger.c b/drivers/sensor/hmc5883l/hmc5883l_trigger.c
index 799d7ac1168..19ef86f2da0 100644
--- a/drivers/sensor/hmc5883l/hmc5883l_trigger.c
+++ b/drivers/sensor/hmc5883l/hmc5883l_trigger.c
@@ -36,7 +36,7 @@ int hmc5883l_trigger_set(struct device *dev,
 }
 
 static void hmc5883l_gpio_callback(struct device *dev,
-				   struct gpio_callback *cb, uint32_t pins)
+				   struct gpio_callback *cb, u32_t pins)
 {
 	struct hmc5883l_data *drv_data =
 		CONTAINER_OF(cb, struct hmc5883l_data, gpio_cb);
diff --git a/drivers/sensor/hp206c/hp206c.c b/drivers/sensor/hp206c/hp206c.c
index 84a13711df4..7a46a07d56d 100644
--- a/drivers/sensor/hp206c/hp206c.c
+++ b/drivers/sensor/hp206c/hp206c.c
@@ -29,8 +29,8 @@ static inline int hp206c_bus_config(struct device *dev)
 	return i2c_configure(hp206c->i2c, i2c_cfg.raw);
 }
 
-static int hp206c_read(struct device *dev, uint8_t cmd, uint8_t *data,
-		       uint8_t len)
+static int hp206c_read(struct device *dev, u8_t cmd, u8_t *data,
+		       u8_t len)
 {
 	struct hp206c_device_data *hp206c = dev->driver_data;
 
@@ -44,16 +44,16 @@ static int hp206c_read(struct device *dev, uint8_t cmd, uint8_t *data,
 	return 0;
 }
 
-static int hp206c_read_reg(struct device *dev, uint8_t reg_addr,
-			   uint8_t *reg_val)
+static int hp206c_read_reg(struct device *dev, u8_t reg_addr,
+			   u8_t *reg_val)
 {
-	uint8_t cmd = HP206C_CMD_READ_REG | (reg_addr & HP206C_REG_ADDR_MASK);
+	u8_t cmd = HP206C_CMD_READ_REG | (reg_addr & HP206C_REG_ADDR_MASK);
 
 	return hp206c_read(dev, cmd, reg_val, 1);
 }
 
-static int hp206c_write(struct device *dev, uint8_t cmd, uint8_t *data,
-			uint8_t len)
+static int hp206c_write(struct device *dev, u8_t cmd, u8_t *data,
+			u8_t len)
 {
 	struct hp206c_device_data *hp206c = dev->driver_data;
 
@@ -67,15 +67,15 @@ static int hp206c_write(struct device *dev, uint8_t cmd, uint8_t *data,
 	return 0;
 }
 
-static int hp206c_write_reg(struct device *dev, uint8_t reg_addr,
-			    uint8_t reg_val)
+static int hp206c_write_reg(struct device *dev, u8_t reg_addr,
+			    u8_t reg_val)
 {
-	uint8_t cmd = HP206C_CMD_WRITE_REG | (reg_addr & HP206C_REG_ADDR_MASK);
+	u8_t cmd = HP206C_CMD_WRITE_REG | (reg_addr & HP206C_REG_ADDR_MASK);
 
 	return hp206c_write(dev, cmd, &reg_val, 1);
 }
 
-static int hp206c_cmd_send(struct device *dev, uint8_t cmd)
+static int hp206c_cmd_send(struct device *dev, u8_t cmd)
 {
 	struct hp206c_device_data *hp206c = dev->driver_data;
 
@@ -91,7 +91,7 @@ static int hp206c_cmd_send(struct device *dev, uint8_t cmd)
  * conversion wait time which looks like a good compromise provided the highest
  * precision computation takes 131.1ms.
  */
-static uint8_t hp206c_adc_time_ms[] = {
+static u8_t hp206c_adc_time_ms[] = {
 /*	conversion time(ms),   OSR  */
 	132,		    /* 4096 */
 	66,		    /* 2048 */
@@ -101,10 +101,10 @@ static uint8_t hp206c_adc_time_ms[] = {
 	5,		    /* 128  */
 };
 
-static int hp206c_osr_set(struct device *dev, uint16_t osr)
+static int hp206c_osr_set(struct device *dev, u16_t osr)
 {
 	struct hp206c_device_data *hp206c = dev->driver_data;
-	uint8_t i;
+	u8_t i;
 
 	/* the following code translates OSR values to an index */
 	for (i = 0; i < 6 && BIT(12 - i) != osr; i++) {
@@ -120,9 +120,9 @@ static int hp206c_osr_set(struct device *dev, uint16_t osr)
 	return 0;
 }
 
-static int hp206c_altitude_offs_set(struct device *dev, int16_t offs)
+static int hp206c_altitude_offs_set(struct device *dev, s16_t offs)
 {
-	uint8_t reg_val;
+	u8_t reg_val;
 
 	reg_val = offs & 0xff;
 
@@ -161,10 +161,10 @@ static int hp206c_attr_set(struct device *dev, enum sensor_channel chan,
 	return -ENOTSUP;
 }
 
-static int hp206c_wait_dev_ready(struct device *dev, uint32_t timeout_ms)
+static int hp206c_wait_dev_ready(struct device *dev, u32_t timeout_ms)
 {
 	struct hp206c_device_data *hp206c = dev->driver_data;
-	uint8_t int_src;
+	u8_t int_src;
 
 	k_timer_start(&hp206c->tmr, timeout_ms, 0);
 	k_timer_status_sync(&hp206c->tmr);
@@ -191,9 +191,9 @@ static int hp206c_adc_aquire(struct device *dev, enum sensor_channel chan)
 	return hp206c_wait_dev_ready(dev, hp206c_adc_time_ms[hp206c->osr]);
 }
 
-static int32_t hp206c_buf_convert(uint8_t *buf, bool signed_val)
+static s32_t hp206c_buf_convert(u8_t *buf, bool signed_val)
 {
-	int32_t tmp = 0;
+	s32_t tmp = 0;
 
 	if (signed_val && (buf[0] & 0x08)) {
 		tmp |= (0xff << 24) | (0xf0 << 16);
@@ -205,10 +205,10 @@ static int32_t hp206c_buf_convert(uint8_t *buf, bool signed_val)
 }
 
 static int hp206c_val_get(struct device *dev,
-			  uint8_t cmd, struct sensor_value *val)
+			  u8_t cmd, struct sensor_value *val)
 {
-	uint8_t buf[3];
-	int32_t temp = 0;
+	u8_t buf[3];
+	s32_t temp = 0;
 
 	if (hp206c_read(dev, cmd, buf, 3) < 0) {
 		return -EIO;
diff --git a/drivers/sensor/hp206c/hp206c.h b/drivers/sensor/hp206c/hp206c.h
index a6d95e34e24..06a0d0a82bc 100644
--- a/drivers/sensor/hp206c/hp206c.h
+++ b/drivers/sensor/hp206c/hp206c.h
@@ -78,7 +78,7 @@ struct hp206c_device_data {
 #error "driver needs millisecond tick granularity"
 #endif
 	struct k_timer tmr;
-	uint8_t osr;
+	u8_t osr;
 };
 
 #define SYS_LOG_DOMAIN "HP206C"
diff --git a/drivers/sensor/hts221/hts221.c b/drivers/sensor/hts221/hts221.c
index cb3c36a86a9..f672bea0b29 100644
--- a/drivers/sensor/hts221/hts221.c
+++ b/drivers/sensor/hts221/hts221.c
@@ -18,7 +18,7 @@ static int hts221_channel_get(struct device *dev,
 			       struct sensor_value *val)
 {
 	struct hts221_data *drv_data = dev->driver_data;
-	int32_t conv_val;
+	s32_t conv_val;
 
 	__ASSERT_NO_MSG(chan == SENSOR_CHAN_TEMP || SENSOR_CHAN_HUMIDITY);
 
@@ -27,7 +27,7 @@ static int hts221_channel_get(struct device *dev,
 	 * for more details
 	 */
 	if (chan == SENSOR_CHAN_TEMP) {
-		conv_val = (int32_t)(drv_data->t1_degc_x8 -
+		conv_val = (s32_t)(drv_data->t1_degc_x8 -
 				     drv_data->t0_degc_x8) *
 			   (drv_data->t_sample - drv_data->t0_out) /
 			   (drv_data->t1_out - drv_data->t0_out) +
@@ -37,7 +37,7 @@ static int hts221_channel_get(struct device *dev,
 		val->val1 = conv_val / 8;
 		val->val2 = (conv_val % 8) * (1000000 / 8);
 	} else { /* SENSOR_CHAN_HUMIDITY */
-		conv_val = (int32_t)(drv_data->h1_rh_x2 - drv_data->h0_rh_x2) *
+		conv_val = (s32_t)(drv_data->h1_rh_x2 - drv_data->h0_rh_x2) *
 			   (drv_data->rh_sample - drv_data->h0_t0_out) /
 			   (drv_data->h1_t0_out - drv_data->h0_t0_out) +
 			   drv_data->h0_rh_x2;
@@ -53,7 +53,7 @@ static int hts221_channel_get(struct device *dev,
 static int hts221_sample_fetch(struct device *dev, enum sensor_channel chan)
 {
 	struct hts221_data *drv_data = dev->driver_data;
-	uint8_t buf[4];
+	u8_t buf[4];
 
 	__ASSERT_NO_MSG(chan == SENSOR_CHAN_ALL);
 
@@ -72,7 +72,7 @@ static int hts221_sample_fetch(struct device *dev, enum sensor_channel chan)
 
 static int hts221_read_conversion_data(struct hts221_data *drv_data)
 {
-	uint8_t buf[16];
+	u8_t buf[16];
 
 	if (i2c_burst_read(drv_data->i2c, HTS221_I2C_ADDR,
 			   HTS221_REG_CONVERSION_START |
@@ -104,7 +104,7 @@ static const struct sensor_driver_api hts221_driver_api = {
 int hts221_init(struct device *dev)
 {
 	struct hts221_data *drv_data = dev->driver_data;
-	uint8_t id, idx;
+	u8_t id, idx;
 
 	drv_data->i2c = device_get_binding(CONFIG_HTS221_I2C_MASTER_DEV_NAME);
 	if (drv_data->i2c == NULL) {
diff --git a/drivers/sensor/hts221/hts221.h b/drivers/sensor/hts221/hts221.h
index ab418db7af4..827a18baaa9 100644
--- a/drivers/sensor/hts221/hts221.h
+++ b/drivers/sensor/hts221/hts221.h
@@ -39,17 +39,17 @@ static const char * const hts221_odr_strings[] = {
 
 struct hts221_data {
 	struct device *i2c;
-	int16_t rh_sample;
-	int16_t t_sample;
+	s16_t rh_sample;
+	s16_t t_sample;
 
-	uint8_t h0_rh_x2;
-	uint8_t h1_rh_x2;
-	uint16_t t0_degc_x8;
-	uint16_t t1_degc_x8;
-	int16_t h0_t0_out;
-	int16_t h1_t0_out;
-	int16_t t0_out;
-	int16_t t1_out;
+	u8_t h0_rh_x2;
+	u8_t h1_rh_x2;
+	u16_t t0_degc_x8;
+	u16_t t1_degc_x8;
+	s16_t h0_t0_out;
+	s16_t h1_t0_out;
+	s16_t t0_out;
+	s16_t t1_out;
 
 #ifdef CONFIG_HTS221_TRIGGER
 	struct device *gpio;
diff --git a/drivers/sensor/hts221/hts221_trigger.c b/drivers/sensor/hts221/hts221_trigger.c
index be46996a255..feaf6a3a3d2 100644
--- a/drivers/sensor/hts221/hts221_trigger.c
+++ b/drivers/sensor/hts221/hts221_trigger.c
@@ -36,7 +36,7 @@ int hts221_trigger_set(struct device *dev,
 }
 
 static void hts221_gpio_callback(struct device *dev,
-				  struct gpio_callback *cb, uint32_t pins)
+				  struct gpio_callback *cb, u32_t pins)
 {
 	struct hts221_data *drv_data =
 		CONTAINER_OF(cb, struct hts221_data, gpio_cb);
diff --git a/drivers/sensor/isl29035/isl29035.c b/drivers/sensor/isl29035/isl29035.c
index d8dc61ad71d..66f7f8eb6f8 100644
--- a/drivers/sensor/isl29035/isl29035.c
+++ b/drivers/sensor/isl29035/isl29035.c
@@ -17,7 +17,7 @@
 static int isl29035_sample_fetch(struct device *dev, enum sensor_channel chan)
 {
 	struct isl29035_driver_data *drv_data = dev->driver_data;
-	uint8_t msb, lsb;
+	u8_t msb, lsb;
 
 	__ASSERT_NO_MSG(chan == SENSOR_CHAN_ALL);
 
@@ -41,11 +41,11 @@ static int isl29035_channel_get(struct device *dev,
 				struct sensor_value *val)
 {
 	struct isl29035_driver_data *drv_data = dev->driver_data;
-	uint64_t tmp;
+	u64_t tmp;
 
 #if CONFIG_ISL29035_MODE_ALS
 	/* val = sample_val * lux_range / (2 ^ adc_data_bits) */
-	tmp = (uint64_t)drv_data->data_sample * ISL29035_LUX_RANGE;
+	tmp = (u64_t)drv_data->data_sample * ISL29035_LUX_RANGE;
 	val->val1 = tmp >> ISL29035_ADC_DATA_BITS;
 	tmp = (tmp & ISL29035_ADC_DATA_MASK) * 1000000;
 	val->val2 = tmp >> ISL29035_ADC_DATA_BITS;
diff --git a/drivers/sensor/isl29035/isl29035.h b/drivers/sensor/isl29035/isl29035.h
index 0d6b0a06c3f..424a1fe0960 100644
--- a/drivers/sensor/isl29035/isl29035.h
+++ b/drivers/sensor/isl29035/isl29035.h
@@ -112,7 +112,7 @@
 
 struct isl29035_driver_data {
 	struct device *i2c;
-	uint16_t data_sample;
+	u16_t data_sample;
 
 #if CONFIG_ISL29035_TRIGGER
 	struct device *gpio;
diff --git a/drivers/sensor/isl29035/isl29035_trigger.c b/drivers/sensor/isl29035/isl29035_trigger.c
index 16129db783b..20710b602e7 100644
--- a/drivers/sensor/isl29035/isl29035_trigger.c
+++ b/drivers/sensor/isl29035/isl29035_trigger.c
@@ -14,13 +14,13 @@
 
 extern struct isl29035_driver_data isl29035_data;
 
-static uint16_t isl29035_lux_processed_to_raw(struct sensor_value const *val)
+static u16_t isl29035_lux_processed_to_raw(struct sensor_value const *val)
 {
-	uint64_t raw_val;
+	u64_t raw_val;
 
 	/* raw_val = val * (2 ^ adc_data_bits) / lux_range */
-	raw_val = (((uint64_t)val->val1) << ISL29035_ADC_DATA_BITS) +
-		  (((uint64_t)val->val2) << ISL29035_ADC_DATA_BITS) / 1000000;
+	raw_val = (((u64_t)val->val1) << ISL29035_ADC_DATA_BITS) +
+		  (((u64_t)val->val2) << ISL29035_ADC_DATA_BITS) / 1000000;
 
 	return raw_val / ISL29035_LUX_RANGE;
 }
@@ -31,8 +31,8 @@ int isl29035_attr_set(struct device *dev,
 		      const struct sensor_value *val)
 {
 	struct isl29035_driver_data *drv_data = dev->driver_data;
-	uint8_t lsb_reg, msb_reg;
-	uint16_t raw_val;
+	u8_t lsb_reg, msb_reg;
+	u16_t raw_val;
 
 	if (attr == SENSOR_ATTR_UPPER_THRESH) {
 		lsb_reg = ISL29035_INT_HT_LSB_REG;
@@ -58,7 +58,7 @@ int isl29035_attr_set(struct device *dev,
 }
 
 static void isl29035_gpio_callback(struct device *dev,
-				   struct gpio_callback *cb, uint32_t pins)
+				   struct gpio_callback *cb, u32_t pins)
 {
 	struct isl29035_driver_data *drv_data =
 		CONTAINER_OF(cb, struct isl29035_driver_data, gpio_cb);
@@ -77,7 +77,7 @@ static void isl29035_gpio_callback(struct device *dev,
 static void isl29035_thread_cb(struct device *dev)
 {
 	struct isl29035_driver_data *drv_data = dev->driver_data;
-	uint8_t val;
+	u8_t val;
 
 	/* clear interrupt */
 	i2c_reg_read_byte(drv_data->i2c, ISL29035_I2C_ADDRESS,
diff --git a/drivers/sensor/lis3dh/lis3dh.c b/drivers/sensor/lis3dh/lis3dh.c
index 9e429fecec8..7db3b95ace6 100644
--- a/drivers/sensor/lis3dh/lis3dh.c
+++ b/drivers/sensor/lis3dh/lis3dh.c
@@ -11,7 +11,7 @@
 
 #include "lis3dh.h"
 
-static void lis3dh_convert(struct sensor_value *val, int64_t raw_val)
+static void lis3dh_convert(struct sensor_value *val, s64_t raw_val)
 {
 	/* val = raw_val * LIS3DH_ACCEL_SCALE / (10^6 * (2^16 - 1)) */
 	raw_val = raw_val * LIS3DH_ACCEL_SCALE / 1000000;
@@ -51,7 +51,7 @@ static int lis3dh_channel_get(struct device *dev,
 int lis3dh_sample_fetch(struct device *dev, enum sensor_channel chan)
 {
 	struct lis3dh_data *drv_data = dev->driver_data;
-	uint8_t buf[6];
+	u8_t buf[6];
 
 	__ASSERT_NO_MSG(chan == SENSOR_CHAN_ALL ||
 			chan == SENSOR_CHAN_ACCEL_XYZ);
diff --git a/drivers/sensor/lis3dh/lis3dh.h b/drivers/sensor/lis3dh/lis3dh.h
index 7aad91ab07f..60669350db5 100644
--- a/drivers/sensor/lis3dh/lis3dh.h
+++ b/drivers/sensor/lis3dh/lis3dh.h
@@ -81,9 +81,9 @@
 
 struct lis3dh_data {
 	struct device *i2c;
-	int16_t x_sample;
-	int16_t y_sample;
-	int16_t z_sample;
+	s16_t x_sample;
+	s16_t y_sample;
+	s16_t z_sample;
 
 #ifdef CONFIG_LIS3DH_TRIGGER
 	struct device *gpio;
diff --git a/drivers/sensor/lis3dh/lis3dh_trigger.c b/drivers/sensor/lis3dh/lis3dh_trigger.c
index 7adf7843e9d..3562c3e50d7 100644
--- a/drivers/sensor/lis3dh/lis3dh_trigger.c
+++ b/drivers/sensor/lis3dh/lis3dh_trigger.c
@@ -36,7 +36,7 @@ int lis3dh_trigger_set(struct device *dev,
 }
 
 static void lis3dh_gpio_callback(struct device *dev,
-				 struct gpio_callback *cb, uint32_t pins)
+				 struct gpio_callback *cb, u32_t pins)
 {
 	struct lis3dh_data *drv_data =
 		CONTAINER_OF(cb, struct lis3dh_data, gpio_cb);
diff --git a/drivers/sensor/lis3mdl/lis3mdl.c b/drivers/sensor/lis3mdl/lis3mdl.c
index 993cd4501b8..726514c1819 100644
--- a/drivers/sensor/lis3mdl/lis3mdl.c
+++ b/drivers/sensor/lis3mdl/lis3mdl.c
@@ -13,12 +13,12 @@
 
 #include "lis3mdl.h"
 
-static void lis3mdl_convert(struct sensor_value *val, int16_t raw_val,
-			    uint16_t divider)
+static void lis3mdl_convert(struct sensor_value *val, s16_t raw_val,
+			    u16_t divider)
 {
 	/* val = raw_val / divider */
 	val->val1 = raw_val / divider;
-	val->val2 = (((int64_t)raw_val % divider) * 1000000L) / divider;
+	val->val2 = (((s64_t)raw_val % divider) * 1000000L) / divider;
 }
 
 static int lis3mdl_channel_get(struct device *dev,
@@ -56,13 +56,13 @@ static int lis3mdl_channel_get(struct device *dev,
 int lis3mdl_sample_fetch(struct device *dev, enum sensor_channel chan)
 {
 	struct lis3mdl_data *drv_data = dev->driver_data;
-	int16_t buf[4];
+	s16_t buf[4];
 
 	__ASSERT_NO_MSG(chan == SENSOR_CHAN_ALL);
 
 	/* fetch magnetometer sample */
 	if (i2c_burst_read(drv_data->i2c, CONFIG_LIS3MDL_I2C_ADDR,
-			   LIS3MDL_REG_SAMPLE_START, (uint8_t *)buf, 8) < 0) {
+			   LIS3MDL_REG_SAMPLE_START, (u8_t *)buf, 8) < 0) {
 		SYS_LOG_DBG("Failed to fetch megnetometer sample.");
 		return -EIO;
 	}
@@ -74,7 +74,7 @@ int lis3mdl_sample_fetch(struct device *dev, enum sensor_channel chan)
 	 */
 	if (i2c_burst_read(drv_data->i2c, CONFIG_LIS3MDL_I2C_ADDR,
 			   LIS3MDL_REG_SAMPLE_START + 6,
-			   (uint8_t *)(buf + 3), 2) < 0) {
+			   (u8_t *)(buf + 3), 2) < 0) {
 		SYS_LOG_DBG("Failed to fetch temperature sample.");
 		return -EIO;
 	};
@@ -98,8 +98,8 @@ static const struct sensor_driver_api lis3mdl_driver_api = {
 int lis3mdl_init(struct device *dev)
 {
 	struct lis3mdl_data *drv_data = dev->driver_data;
-	uint8_t chip_cfg[5];
-	uint8_t id, idx;
+	u8_t chip_cfg[5];
+	u8_t id, idx;
 
 	drv_data->i2c = device_get_binding(CONFIG_LIS3MDL_I2C_MASTER_DEV_NAME);
 	if (drv_data->i2c == NULL) {
diff --git a/drivers/sensor/lis3mdl/lis3mdl.h b/drivers/sensor/lis3mdl/lis3mdl.h
index 667414ee51f..1117eb9f5c8 100644
--- a/drivers/sensor/lis3mdl/lis3mdl.h
+++ b/drivers/sensor/lis3mdl/lis3mdl.h
@@ -73,7 +73,7 @@ static const char * const lis3mdl_odr_strings[] = {
 	"40", "80", "155", "300", "560", "1000"
 };
 
-static const uint8_t lis3mdl_odr_bits[] = {
+static const u8_t lis3mdl_odr_bits[] = {
 	LIS3MDL_ODR_BITS(0, 0, 0), /* 0.625 Hz */
 	LIS3MDL_ODR_BITS(0, 1, 0), /* 1.25 Hz */
 	LIS3MDL_ODR_BITS(0, 2, 0), /* 2.5 Hz */
@@ -88,16 +88,16 @@ static const uint8_t lis3mdl_odr_bits[] = {
 	LIS3MDL_ODR_BITS(0, 0, 1)  /* 1000 Hz */
 };
 
-static const uint16_t lis3mdl_magn_gain[] = {
+static const u16_t lis3mdl_magn_gain[] = {
 	6842, 3421, 2281, 1711
 };
 
 struct lis3mdl_data {
 	struct device *i2c;
-	int16_t x_sample;
-	int16_t y_sample;
-	int16_t z_sample;
-	int16_t temp_sample;
+	s16_t x_sample;
+	s16_t y_sample;
+	s16_t z_sample;
+	s16_t temp_sample;
 
 #ifdef CONFIG_LIS3MDL_TRIGGER
 	struct device *gpio;
diff --git a/drivers/sensor/lis3mdl/lis3mdl_trigger.c b/drivers/sensor/lis3mdl/lis3mdl_trigger.c
index 8fa48f89107..12069761399 100644
--- a/drivers/sensor/lis3mdl/lis3mdl_trigger.c
+++ b/drivers/sensor/lis3mdl/lis3mdl_trigger.c
@@ -36,7 +36,7 @@ int lis3mdl_trigger_set(struct device *dev,
 }
 
 static void lis3mdl_gpio_callback(struct device *dev,
-				  struct gpio_callback *cb, uint32_t pins)
+				  struct gpio_callback *cb, u32_t pins)
 {
 	struct lis3mdl_data *drv_data =
 		CONTAINER_OF(cb, struct lis3mdl_data, gpio_cb);
diff --git a/drivers/sensor/lps25hb/lps25hb.c b/drivers/sensor/lps25hb/lps25hb.c
index 89bf368f909..d3cf01ec051 100644
--- a/drivers/sensor/lps25hb/lps25hb.c
+++ b/drivers/sensor/lps25hb/lps25hb.c
@@ -15,7 +15,7 @@
 
 #include "lps25hb.h"
 
-static inline int lps25hb_power_ctrl(struct device *dev, uint8_t value)
+static inline int lps25hb_power_ctrl(struct device *dev, u8_t value)
 {
 	struct lps25hb_data *data = dev->driver_data;
 	const struct lps25hb_config *config = dev->config->config_info;
@@ -26,7 +26,7 @@ static inline int lps25hb_power_ctrl(struct device *dev, uint8_t value)
 				   value << LPS25HB_SHIFT_CTRL_REG1_PD);
 }
 
-static inline int lps25hb_set_odr_raw(struct device *dev, uint8_t odr)
+static inline int lps25hb_set_odr_raw(struct device *dev, u8_t odr)
 {
 	struct lps25hb_data *data = dev->driver_data;
 	const struct lps25hb_config *config = dev->config->config_info;
@@ -42,7 +42,7 @@ static int lps25hb_sample_fetch(struct device *dev,
 {
 	struct lps25hb_data *data = dev->driver_data;
 	const struct lps25hb_config *config = dev->config->config_info;
-	uint8_t out[5];
+	u8_t out[5];
 	int offset;
 
 	__ASSERT_NO_MSG(chan == SENSOR_CHAN_ALL);
@@ -56,30 +56,30 @@ static int lps25hb_sample_fetch(struct device *dev,
 		}
 	}
 
-	data->sample_press = (int32_t)((uint32_t)(out[0]) |
-					((uint32_t)(out[1]) << 8) |
-					((uint32_t)(out[2]) << 16));
-	data->sample_temp = (int16_t)((uint16_t)(out[3]) |
-					((uint16_t)(out[4]) << 8));
+	data->sample_press = (s32_t)((u32_t)(out[0]) |
+					((u32_t)(out[1]) << 8) |
+					((u32_t)(out[2]) << 16));
+	data->sample_temp = (s16_t)((u16_t)(out[3]) |
+					((u16_t)(out[4]) << 8));
 
 	return 0;
 }
 
 static inline void lps25hb_press_convert(struct sensor_value *val,
-					 int32_t raw_val)
+					 s32_t raw_val)
 {
 	/* val = raw_val / 40960 */
 	val->val1 = raw_val / 40960;
-	val->val2 = ((int32_t)raw_val * 1000000 / 40960) % 1000000;
+	val->val2 = ((s32_t)raw_val * 1000000 / 40960) % 1000000;
 }
 
 static inline void lps25hb_temp_convert(struct sensor_value *val,
-					int16_t raw_val)
+					s16_t raw_val)
 {
-	int32_t uval;
+	s32_t uval;
 
 	/* val = raw_val / 480 + 42.5 */
-	uval = (int32_t)raw_val * 1000000 / 480 + 42500000;
+	uval = (s32_t)raw_val * 1000000 / 480 + 42500000;
 	val->val1 = (raw_val * 10 / 480 + 425) / 10;
 	val->val2 = uval % 1000000;
 }
@@ -110,7 +110,7 @@ static int lps25hb_init_chip(struct device *dev)
 {
 	struct lps25hb_data *data = dev->driver_data;
 	const struct lps25hb_config *config = dev->config->config_info;
-	uint8_t chip_id;
+	u8_t chip_id;
 
 	lps25hb_power_ctrl(dev, 0);
 	k_busy_wait(50 * USEC_PER_MSEC);
diff --git a/drivers/sensor/lps25hb/lps25hb.h b/drivers/sensor/lps25hb/lps25hb.h
index 215b499e80e..61412bde5da 100644
--- a/drivers/sensor/lps25hb/lps25hb.h
+++ b/drivers/sensor/lps25hb/lps25hb.h
@@ -148,14 +148,14 @@
 
 struct lps25hb_config {
 	char *i2c_master_dev_name;
-	uint16_t i2c_slave_addr;
+	u16_t i2c_slave_addr;
 };
 
 struct lps25hb_data {
 	struct device *i2c_master;
 
-	int32_t sample_press;
-	int16_t sample_temp;
+	s32_t sample_press;
+	s16_t sample_temp;
 };
 
 #define SYS_LOG_DOMAIN "LPS25HB"
diff --git a/drivers/sensor/lsm6ds0/lsm6ds0.c b/drivers/sensor/lsm6ds0/lsm6ds0.c
index 046c2e81e0a..1b91e45224e 100644
--- a/drivers/sensor/lsm6ds0/lsm6ds0.c
+++ b/drivers/sensor/lsm6ds0/lsm6ds0.c
@@ -39,7 +39,7 @@ static inline int lsm6ds0_accel_axis_ctrl(struct device *dev, int x_en,
 {
 	struct lsm6ds0_data *data = dev->driver_data;
 	const struct lsm6ds0_config *config = dev->config->config_info;
-	uint8_t state = (x_en << LSM6DS0_SHIFT_CTRL_REG5_XL_XEN_XL) |
+	u8_t state = (x_en << LSM6DS0_SHIFT_CTRL_REG5_XL_XEN_XL) |
 			(y_en << LSM6DS0_SHIFT_CTRL_REG5_XL_YEN_XL) |
 			(z_en << LSM6DS0_SHIFT_CTRL_REG5_XL_ZEN_XL);
 
@@ -51,7 +51,7 @@ static inline int lsm6ds0_accel_axis_ctrl(struct device *dev, int x_en,
 				   state);
 }
 
-static int lsm6ds0_accel_set_fs_raw(struct device *dev, uint8_t fs)
+static int lsm6ds0_accel_set_fs_raw(struct device *dev, u8_t fs)
 {
 	struct lsm6ds0_data *data = dev->driver_data;
 	const struct lsm6ds0_config *config = dev->config->config_info;
@@ -66,7 +66,7 @@ static int lsm6ds0_accel_set_fs_raw(struct device *dev, uint8_t fs)
 	return 0;
 }
 
-static int lsm6ds0_accel_set_odr_raw(struct device *dev, uint8_t odr)
+static int lsm6ds0_accel_set_odr_raw(struct device *dev, u8_t odr)
 {
 	struct lsm6ds0_data *data = dev->driver_data;
 	const struct lsm6ds0_config *config = dev->config->config_info;
@@ -86,7 +86,7 @@ static inline int lsm6ds0_gyro_axis_ctrl(struct device *dev, int x_en, int y_en,
 {
 	struct lsm6ds0_data *data = dev->driver_data;
 	const struct lsm6ds0_config *config = dev->config->config_info;
-	uint8_t state = (x_en << LSM6DS0_SHIFT_CTRL_REG4_XEN_G) |
+	u8_t state = (x_en << LSM6DS0_SHIFT_CTRL_REG4_XEN_G) |
 			(y_en << LSM6DS0_SHIFT_CTRL_REG4_YEN_G) |
 			(z_en << LSM6DS0_SHIFT_CTRL_REG4_ZEN_G);
 
@@ -98,7 +98,7 @@ static inline int lsm6ds0_gyro_axis_ctrl(struct device *dev, int x_en, int y_en,
 				   state);
 }
 
-static int lsm6ds0_gyro_set_fs_raw(struct device *dev, uint8_t fs)
+static int lsm6ds0_gyro_set_fs_raw(struct device *dev, u8_t fs)
 {
 	struct lsm6ds0_data *data = dev->driver_data;
 	const struct lsm6ds0_config *config = dev->config->config_info;
@@ -113,7 +113,7 @@ static int lsm6ds0_gyro_set_fs_raw(struct device *dev, uint8_t fs)
 	return 0;
 }
 
-static int lsm6ds0_gyro_set_odr_raw(struct device *dev, uint8_t odr)
+static int lsm6ds0_gyro_set_odr_raw(struct device *dev, u8_t odr)
 {
 	struct lsm6ds0_data *data = dev->driver_data;
 	const struct lsm6ds0_config *config = dev->config->config_info;
@@ -132,7 +132,7 @@ static int lsm6ds0_sample_fetch_accel(struct device *dev)
 {
 	struct lsm6ds0_data *data = dev->driver_data;
 	const struct lsm6ds0_config *config = dev->config->config_info;
-	uint8_t buf[6];
+	u8_t buf[6];
 
 	if (i2c_burst_read(data->i2c_master, config->i2c_slave_addr,
 			   LSM6DS0_REG_OUT_X_L_XL, buf, sizeof(buf)) < 0) {
@@ -141,16 +141,16 @@ static int lsm6ds0_sample_fetch_accel(struct device *dev)
 	}
 
 #if defined(CONFIG_LSM6DS0_ACCEL_ENABLE_X_AXIS)
-	data->accel_sample_x = (int16_t)((uint16_t)(buf[0]) |
-				((uint16_t)(buf[1]) << 8));
+	data->accel_sample_x = (s16_t)((u16_t)(buf[0]) |
+				((u16_t)(buf[1]) << 8));
 #endif
 #if defined(CONFIG_LSM6DS0_ACCEL_ENABLE_Y_AXIS)
-	data->accel_sample_y = (int16_t)((uint16_t)(buf[2]) |
-				((uint16_t)(buf[3]) << 8));
+	data->accel_sample_y = (s16_t)((u16_t)(buf[2]) |
+				((u16_t)(buf[3]) << 8));
 #endif
 #if defined(CONFIG_LSM6DS0_ACCEL_ENABLE_Z_AXIS)
-	data->accel_sample_z = (int16_t)((uint16_t)(buf[4]) |
-				((uint16_t)(buf[5]) << 8));
+	data->accel_sample_z = (s16_t)((u16_t)(buf[4]) |
+				((u16_t)(buf[5]) << 8));
 #endif
 
 	return 0;
@@ -160,7 +160,7 @@ static int lsm6ds0_sample_fetch_gyro(struct device *dev)
 {
 	struct lsm6ds0_data *data = dev->driver_data;
 	const struct lsm6ds0_config *config = dev->config->config_info;
-	uint8_t buf[6];
+	u8_t buf[6];
 
 	if (i2c_burst_read(data->i2c_master, config->i2c_slave_addr,
 			   LSM6DS0_REG_OUT_X_L_G, buf, sizeof(buf)) < 0) {
@@ -169,16 +169,16 @@ static int lsm6ds0_sample_fetch_gyro(struct device *dev)
 	}
 
 #if defined(CONFIG_LSM6DS0_GYRO_ENABLE_X_AXIS)
-	data->gyro_sample_x = (int16_t)((uint16_t)(buf[0]) |
-				((uint16_t)(buf[1]) << 8));
+	data->gyro_sample_x = (s16_t)((u16_t)(buf[0]) |
+				((u16_t)(buf[1]) << 8));
 #endif
 #if defined(CONFIG_LSM6DS0_GYRO_ENABLE_Y_AXIS)
-	data->gyro_sample_y = (int16_t)((uint16_t)(buf[2]) |
-				((uint16_t)(buf[3]) << 8));
+	data->gyro_sample_y = (s16_t)((u16_t)(buf[2]) |
+				((u16_t)(buf[3]) << 8));
 #endif
 #if defined(CONFIG_LSM6DS0_GYRO_ENABLE_Z_AXIS)
-	data->gyro_sample_z = (int16_t)((uint16_t)(buf[4]) |
-				((uint16_t)(buf[5]) << 8));
+	data->gyro_sample_z = (s16_t)((u16_t)(buf[4]) |
+				((u16_t)(buf[5]) << 8));
 #endif
 
 	return 0;
@@ -189,7 +189,7 @@ static int lsm6ds0_sample_fetch_temp(struct device *dev)
 {
 	struct lsm6ds0_data *data = dev->driver_data;
 	const struct lsm6ds0_config *config = dev->config->config_info;
-	uint8_t buf[2];
+	u8_t buf[2];
 
 	if (i2c_burst_read(data->i2c_master, config->i2c_slave_addr,
 			   LSM6DS0_REG_OUT_TEMP_L, buf, sizeof(buf)) < 0) {
@@ -197,8 +197,8 @@ static int lsm6ds0_sample_fetch_temp(struct device *dev)
 		return -EIO;
 	}
 
-	data->temp_sample = (int16_t)((uint16_t)(buf[0]) |
-				((uint16_t)(buf[1]) << 8));
+	data->temp_sample = (s16_t)((u16_t)(buf[0]) |
+				((u16_t)(buf[1]) << 8));
 
 	return 0;
 }
@@ -241,8 +241,8 @@ static inline void lsm6ds0_accel_convert(struct sensor_value *val, int raw_val,
 	double dval;
 
 	dval = (double)(raw_val) * scale / 32767.0;
-	val->val1 = (int32_t)dval;
-	val->val2 = ((int32_t)(dval * 1000000)) % 1000000;
+	val->val1 = (s32_t)dval;
+	val->val2 = ((s32_t)(dval * 1000000)) % 1000000;
 }
 
 static inline int lsm6ds0_accel_get_channel(enum sensor_channel chan,
@@ -298,8 +298,8 @@ static inline void lsm6ds0_gyro_convert(struct sensor_value *val, int raw_val,
 	double dval;
 
 	dval = (double)(raw_val) * numerator / 1000.0 * SENSOR_DEG2RAD_DOUBLE;
-	val->val1 = (int32_t)dval;
-	val->val2 = ((int32_t)(dval * 1000000)) % 1000000;
+	val->val1 = (s32_t)dval;
+	val->val2 = ((s32_t)(dval * 1000000)) % 1000000;
 }
 
 static inline int lsm6ds0_gyro_get_channel(enum sensor_channel chan,
@@ -399,7 +399,7 @@ static int lsm6ds0_init_chip(struct device *dev)
 {
 	struct lsm6ds0_data *data = dev->driver_data;
 	const struct lsm6ds0_config *config = dev->config->config_info;
-	uint8_t chip_id;
+	u8_t chip_id;
 
 	if (lsm6ds0_reboot(dev) < 0) {
 		SYS_LOG_DBG("failed to reboot device");
diff --git a/drivers/sensor/lsm6ds0/lsm6ds0.h b/drivers/sensor/lsm6ds0/lsm6ds0.h
index 788533c5132..e71bb55d391 100644
--- a/drivers/sensor/lsm6ds0/lsm6ds0.h
+++ b/drivers/sensor/lsm6ds0/lsm6ds0.h
@@ -461,7 +461,7 @@
 
 struct lsm6ds0_config {
 	char *i2c_master_dev_name;
-	uint16_t i2c_slave_addr;
+	u16_t i2c_slave_addr;
 };
 
 struct lsm6ds0_data {
diff --git a/drivers/sensor/lsm9ds0_gyro/lsm9ds0_gyro.c b/drivers/sensor/lsm9ds0_gyro/lsm9ds0_gyro.c
index 8740fe27f32..c70259e8248 100644
--- a/drivers/sensor/lsm9ds0_gyro/lsm9ds0_gyro.c
+++ b/drivers/sensor/lsm9ds0_gyro/lsm9ds0_gyro.c
@@ -22,7 +22,7 @@ static inline int lsm9ds0_gyro_power_ctrl(struct device *dev, int power,
 {
 	struct lsm9ds0_gyro_data *data = dev->driver_data;
 	const struct lsm9ds0_gyro_config *config = dev->config->config_info;
-	uint8_t state = (power << LSM9DS0_GYRO_SHIFT_CTRL_REG1_G_PD) |
+	u8_t state = (power << LSM9DS0_GYRO_SHIFT_CTRL_REG1_G_PD) |
 			(x_en << LSM9DS0_GYRO_SHIFT_CTRL_REG1_G_XEN) |
 			(y_en << LSM9DS0_GYRO_SHIFT_CTRL_REG1_G_YEN) |
 			(z_en << LSM9DS0_GYRO_SHIFT_CTRL_REG1_G_ZEN);
@@ -36,7 +36,7 @@ static inline int lsm9ds0_gyro_power_ctrl(struct device *dev, int power,
 				   state);
 }
 
-static int lsm9ds0_gyro_set_fs_raw(struct device *dev, uint8_t fs)
+static int lsm9ds0_gyro_set_fs_raw(struct device *dev, u8_t fs)
 {
 	struct lsm9ds0_gyro_data *data = dev->driver_data;
 	const struct lsm9ds0_gyro_config *config = dev->config->config_info;
@@ -58,7 +58,7 @@ static int lsm9ds0_gyro_set_fs_raw(struct device *dev, uint8_t fs)
 #if defined(CONFIG_LSM9DS0_GYRO_FULLSCALE_RUNTIME)
 static const struct {
 	int fs;
-	uint8_t reg_val;
+	u8_t reg_val;
 } lsm9ds0_gyro_fs_table[] = { {245, 0},
 			      {500, 1},
 			      {2000, 2} };
@@ -77,7 +77,7 @@ static int lsm9ds0_gyro_set_fs(struct device *dev, int fs)
 }
 #endif
 
-static inline int lsm9ds0_gyro_set_odr_raw(struct device *dev, uint8_t odr)
+static inline int lsm9ds0_gyro_set_odr_raw(struct device *dev, u8_t odr)
 {
 	struct lsm9ds0_gyro_data *data = dev->driver_data;
 	const struct lsm9ds0_gyro_config *config = dev->config->config_info;
@@ -91,7 +91,7 @@ static inline int lsm9ds0_gyro_set_odr_raw(struct device *dev, uint8_t odr)
 #if defined(CONFIG_LSM9DS0_GYRO_SAMPLING_RATE_RUNTIME)
 static const struct {
 	int freq;
-	uint8_t reg_val;
+	u8_t reg_val;
 } lsm9ds0_gyro_samp_freq_table[] = { {95, 0},
 				     {190, 1},
 				     {380, 2},
@@ -118,7 +118,7 @@ static int lsm9ds0_gyro_sample_fetch(struct device *dev,
 {
 	struct lsm9ds0_gyro_data *data = dev->driver_data;
 	const struct lsm9ds0_gyro_config *config = dev->config->config_info;
-	uint8_t x_l, x_h, y_l, y_h, z_l, z_h;
+	u8_t x_l, x_h, y_l, y_h, z_l, z_h;
 
 	__ASSERT_NO_MSG(chan == SENSOR_CHAN_ALL ||
 			chan == SENSOR_CHAN_GYRO_XYZ);
@@ -139,9 +139,9 @@ static int lsm9ds0_gyro_sample_fetch(struct device *dev,
 		return -EIO;
 	}
 
-	data->sample_x = (int16_t)((uint16_t)(x_l) | ((uint16_t)(x_h) << 8));
-	data->sample_y = (int16_t)((uint16_t)(y_l) | ((uint16_t)(y_h) << 8));
-	data->sample_z = (int16_t)((uint16_t)(z_l) | ((uint16_t)(z_h) << 8));
+	data->sample_x = (s16_t)((u16_t)(x_l) | ((u16_t)(x_h) << 8));
+	data->sample_y = (s16_t)((u16_t)(y_l) | ((u16_t)(y_h) << 8));
+	data->sample_z = (s16_t)((u16_t)(z_l) | ((u16_t)(z_h) << 8));
 
 #if defined(CONFIG_LSM9DS0_GYRO_FULLSCALE_RUNTIME)
 	data->sample_fs = data->fs;
@@ -156,8 +156,8 @@ static inline void lsm9ds0_gyro_convert(struct sensor_value *val, int raw_val,
 	double dval;
 
 	dval = (double)(raw_val) * numerator / 1000.0 * DEG2RAD;
-	val->val1 = (int32_t)dval;
-	val->val2 = ((int32_t)(dval * 1000000)) % 1000000;
+	val->val1 = (s32_t)dval;
+	val->val2 = ((s32_t)(dval * 1000000)) % 1000000;
 }
 
 static inline int lsm9ds0_gyro_get_channel(enum sensor_channel chan,
@@ -258,7 +258,7 @@ static int lsm9ds0_gyro_init_chip(struct device *dev)
 {
 	struct lsm9ds0_gyro_data *data = dev->driver_data;
 	const struct lsm9ds0_gyro_config *config = dev->config->config_info;
-	uint8_t chip_id;
+	u8_t chip_id;
 
 	if (lsm9ds0_gyro_power_ctrl(dev, 0, 0, 0, 0) < 0) {
 		SYS_LOG_DBG("failed to power off device");
diff --git a/drivers/sensor/lsm9ds0_gyro/lsm9ds0_gyro.h b/drivers/sensor/lsm9ds0_gyro/lsm9ds0_gyro.h
index 7cb86c70879..40ed650bba1 100644
--- a/drivers/sensor/lsm9ds0_gyro/lsm9ds0_gyro.h
+++ b/drivers/sensor/lsm9ds0_gyro/lsm9ds0_gyro.h
@@ -213,11 +213,11 @@
 
 struct lsm9ds0_gyro_config {
 	char *i2c_master_dev_name;
-	uint16_t i2c_slave_addr;
+	u16_t i2c_slave_addr;
 
 #if CONFIG_LSM9DS0_GYRO_TRIGGER_DRDY
 	char *gpio_drdy_dev_name;
-	uint8_t gpio_drdy_int_pin;
+	u8_t gpio_drdy_int_pin;
 #endif
 };
 
@@ -240,8 +240,8 @@ struct lsm9ds0_gyro_data {
 
 	int sample_x, sample_y, sample_z;
 #if defined(CONFIG_LSM9DS0_GYRO_FULLSCALE_RUNTIME)
-	uint8_t sample_fs;
-	uint8_t fs;
+	u8_t sample_fs;
+	u8_t fs;
 #endif
 };
 
diff --git a/drivers/sensor/lsm9ds0_gyro/lsm9ds0_gyro_trigger.c b/drivers/sensor/lsm9ds0_gyro/lsm9ds0_gyro_trigger.c
index da4a27a33fd..276248d4cb0 100644
--- a/drivers/sensor/lsm9ds0_gyro/lsm9ds0_gyro_trigger.c
+++ b/drivers/sensor/lsm9ds0_gyro/lsm9ds0_gyro_trigger.c
@@ -25,7 +25,7 @@ int lsm9ds0_gyro_trigger_set(struct device *dev,
 	struct lsm9ds0_gyro_data *data = dev->driver_data;
 	const struct lsm9ds0_gyro_config * const config =
 					 dev->config->config_info;
-	uint8_t state;
+	u8_t state;
 
 	if (trig->type == SENSOR_TRIG_DATA_READY) {
 		gpio_pin_disable_callback(data->gpio_drdy,
@@ -58,7 +58,7 @@ int lsm9ds0_gyro_trigger_set(struct device *dev,
 }
 
 static void lsm9ds0_gyro_gpio_drdy_callback(struct device *dev,
-					    struct gpio_callback *cb, uint32_t pins)
+					    struct gpio_callback *cb, u32_t pins)
 {
 	struct lsm9ds0_gyro_data *data =
 		CONTAINER_OF(cb, struct lsm9ds0_gyro_data, gpio_cb);
diff --git a/drivers/sensor/lsm9ds0_mfd/lsm9ds0_mfd.c b/drivers/sensor/lsm9ds0_mfd/lsm9ds0_mfd.c
index dc390c2f61a..d0439d8669a 100644
--- a/drivers/sensor/lsm9ds0_mfd/lsm9ds0_mfd.c
+++ b/drivers/sensor/lsm9ds0_mfd/lsm9ds0_mfd.c
@@ -38,7 +38,7 @@ static inline int lsm9ds0_mfd_reboot_memory(struct device *dev)
 }
 
 #if !defined(LSM9DS0_MFD_ACCEL_DISABLED)
-static inline int lsm9ds0_mfd_accel_set_odr_raw(struct device *dev, uint8_t odr)
+static inline int lsm9ds0_mfd_accel_set_odr_raw(struct device *dev, u8_t odr)
 {
 	struct lsm9ds0_mfd_data *data = dev->driver_data;
 	const struct lsm9ds0_mfd_config *config = dev->config->config_info;
@@ -68,7 +68,7 @@ static const struct {
 static int lsm9ds0_mfd_accel_set_odr(struct device *dev,
 				     const struct sensor_value *val)
 {
-	uint8_t i;
+	u8_t i;
 
 	for (i = 0; i < ARRAY_SIZE(lsm9ds0_mfd_accel_odr_map); ++i) {
 		if (val->val1 < lsm9ds0_mfd_accel_odr_map[i].freq_int ||
@@ -82,7 +82,7 @@ static int lsm9ds0_mfd_accel_set_odr(struct device *dev,
 }
 #endif
 
-static inline int lsm9ds0_mfd_accel_set_fs_raw(struct device *dev, uint8_t fs)
+static inline int lsm9ds0_mfd_accel_set_fs_raw(struct device *dev, u8_t fs)
 {
 	struct lsm9ds0_mfd_data *data = dev->driver_data;
 	const struct lsm9ds0_mfd_config *config = dev->config->config_info;
@@ -113,7 +113,7 @@ static const struct {
 
 static int lsm9ds0_mfd_accel_set_fs(struct device *dev, int val)
 {
-	uint8_t i;
+	u8_t i;
 
 	for (i = 0; i < ARRAY_SIZE(lsm9ds0_mfd_accel_fs_map); ++i) {
 		if (val <= lsm9ds0_mfd_accel_fs_map[i].fs) {
@@ -127,7 +127,7 @@ static int lsm9ds0_mfd_accel_set_fs(struct device *dev, int val)
 #endif
 
 #if !defined(LSM9DS0_MFD_MAGN_DISABLED)
-static inline int lsm9ds0_mfd_magn_set_odr_raw(struct device *dev, uint8_t odr)
+static inline int lsm9ds0_mfd_magn_set_odr_raw(struct device *dev, u8_t odr)
 {
 	struct lsm9ds0_mfd_data *data = dev->driver_data;
 	const struct lsm9ds0_mfd_config *config = dev->config->config_info;
@@ -153,7 +153,7 @@ static const struct {
 static int lsm9ds0_mfd_magn_set_odr(struct device *dev,
 				    const struct sensor_value *val)
 {
-	uint8_t i;
+	u8_t i;
 
 	for (i = 0; i < ARRAY_SIZE(lsm9ds0_mfd_accel_odr_map); ++i) {
 		if (val->val1 < lsm9ds0_mfd_accel_odr_map[i].freq_int ||
@@ -167,7 +167,7 @@ static int lsm9ds0_mfd_magn_set_odr(struct device *dev,
 }
 #endif
 
-static inline int lsm9ds0_mfd_magn_set_fs_raw(struct device *dev, uint8_t fs)
+static inline int lsm9ds0_mfd_magn_set_fs_raw(struct device *dev, u8_t fs)
 {
 	struct lsm9ds0_mfd_data *data = dev->driver_data;
 	const struct lsm9ds0_mfd_config *config = dev->config->config_info;
@@ -198,7 +198,7 @@ static const struct {
 static int lsm9ds0_mfd_magn_set_fs(struct device *dev,
 				   const struct sensor_value *val)
 {
-	uint8_t i;
+	u8_t i;
 
 	for (i = 0; i < ARRAY_SIZE(lsm9ds0_mfd_magn_fs_map); ++i) {
 		if (val->val1 <= lsm9ds0_mfd_magn_fs_map[i].fs) {
@@ -216,7 +216,7 @@ static inline int lsm9ds0_mfd_sample_fetch_accel(struct device *dev)
 {
 	struct lsm9ds0_mfd_data *data = dev->driver_data;
 	const struct lsm9ds0_mfd_config *config = dev->config->config_info;
-	uint8_t out_l, out_h;
+	u8_t out_l, out_h;
 
 #if defined(CONFIG_LSM9DS0_MFD_ACCEL_ENABLE_X)
 	if (i2c_reg_read_byte(data->i2c_master, config->i2c_slave_addr,
@@ -227,8 +227,8 @@ static inline int lsm9ds0_mfd_sample_fetch_accel(struct device *dev)
 		return -EIO;
 	}
 
-	data->sample_accel_x = (int16_t)((uint16_t)(out_l) |
-			       ((uint16_t)(out_h) << 8));
+	data->sample_accel_x = (s16_t)((u16_t)(out_l) |
+			       ((u16_t)(out_h) << 8));
 #endif
 
 #if defined(CONFIG_LSM9DS0_MFD_ACCEL_ENABLE_Y)
@@ -240,8 +240,8 @@ static inline int lsm9ds0_mfd_sample_fetch_accel(struct device *dev)
 		return -EIO;
 	}
 
-	data->sample_accel_y = (int16_t)((uint16_t)(out_l) |
-			       ((uint16_t)(out_h) << 8));
+	data->sample_accel_y = (s16_t)((u16_t)(out_l) |
+			       ((u16_t)(out_h) << 8));
 #endif
 
 #if defined(CONFIG_LSM9DS0_MFD_ACCEL_ENABLE_Z)
@@ -253,8 +253,8 @@ static inline int lsm9ds0_mfd_sample_fetch_accel(struct device *dev)
 		return -EIO;
 	}
 
-	data->sample_accel_z = (int16_t)((uint16_t)(out_l) |
-			       ((uint16_t)(out_h) << 8));
+	data->sample_accel_z = (s16_t)((u16_t)(out_l) |
+			       ((u16_t)(out_h) << 8));
 #endif
 
 #if defined(CONFIG_LSM9DS0_MFD_ACCEL_FULL_SCALE_RUNTIME)
@@ -270,7 +270,7 @@ static inline int lsm9ds0_mfd_sample_fetch_magn(struct device *dev)
 {
 	struct lsm9ds0_mfd_data *data = dev->driver_data;
 	const struct lsm9ds0_mfd_config *config = dev->config->config_info;
-	uint8_t out_l, out_h;
+	u8_t out_l, out_h;
 
 	if (i2c_reg_read_byte(data->i2c_master, config->i2c_slave_addr,
 			      LSM9DS0_MFD_REG_OUT_X_L_M, &out_l) < 0 ||
@@ -280,8 +280,8 @@ static inline int lsm9ds0_mfd_sample_fetch_magn(struct device *dev)
 		return -EIO;
 	}
 
-	data->sample_magn_x = (int16_t)((uint16_t)(out_l) |
-			      ((uint16_t)(out_h) << 8));
+	data->sample_magn_x = (s16_t)((u16_t)(out_l) |
+			      ((u16_t)(out_h) << 8));
 
 	if (i2c_reg_read_byte(data->i2c_master, config->i2c_slave_addr,
 			      LSM9DS0_MFD_REG_OUT_Y_L_M, &out_l) < 0 ||
@@ -291,8 +291,8 @@ static inline int lsm9ds0_mfd_sample_fetch_magn(struct device *dev)
 		return -EIO;
 	}
 
-	data->sample_magn_y = (int16_t)((uint16_t)(out_l) |
-			      ((uint16_t)(out_h) << 8));
+	data->sample_magn_y = (s16_t)((u16_t)(out_l) |
+			      ((u16_t)(out_h) << 8));
 
 	if (i2c_reg_read_byte(data->i2c_master, config->i2c_slave_addr,
 			      LSM9DS0_MFD_REG_OUT_Z_L_M, &out_l) < 0 ||
@@ -302,8 +302,8 @@ static inline int lsm9ds0_mfd_sample_fetch_magn(struct device *dev)
 		return -EIO;
 	}
 
-	data->sample_magn_z = (int16_t)((uint16_t)(out_l) |
-			      ((uint16_t)(out_h) << 8));
+	data->sample_magn_z = (s16_t)((u16_t)(out_l) |
+			      ((u16_t)(out_h) << 8));
 
 #if defined(CONFIG_LSM9DS0_MFD_MAGN_FULL_SCALE_RUNTIME)
 	data->sample_magn_fs = data->magn_fs;
@@ -318,7 +318,7 @@ static inline int lsm9ds0_mfd_sample_fetch_temp(struct device *dev)
 {
 	struct lsm9ds0_mfd_data *data = dev->driver_data;
 	const struct lsm9ds0_mfd_config *config = dev->config->config_info;
-	uint8_t out_l, out_h;
+	u8_t out_l, out_h;
 
 	if (i2c_reg_read_byte(data->i2c_master, config->i2c_slave_addr,
 			      LSM9DS0_MFD_REG_OUT_TEMP_L_XM, &out_l) < 0 ||
@@ -328,8 +328,8 @@ static inline int lsm9ds0_mfd_sample_fetch_temp(struct device *dev)
 		return -EIO;
 	}
 
-	data->sample_temp = (int16_t)((uint16_t)(out_l) |
-			    ((uint16_t)(out_h) << 8));
+	data->sample_temp = (s16_t)((u16_t)(out_l) |
+			    ((u16_t)(out_h) << 8));
 
 	return 0;
 }
@@ -391,8 +391,8 @@ static inline void lsm9ds0_mfd_convert_accel(struct sensor_value *val,
 	double dval;
 
 	dval = (double)(raw_val) * scale;
-	val->val1 = (int32_t)dval;
-	val->val2 = ((int32_t)(dval * 1000000)) % 1000000;
+	val->val1 = (s32_t)dval;
+	val->val2 = ((s32_t)(dval * 1000000)) % 1000000;
 }
 
 static inline int lsm9ds0_mfd_get_accel_channel(enum sensor_channel chan,
@@ -477,8 +477,8 @@ static inline void lsm9ds0_mfd_convert_magn(struct sensor_value *val,
 	double dval;
 
 	dval = (double)(raw_val) * scale;
-	val->val1 = (int32_t)dval;
-	val->val2 = ((int32_t)(dval * 1000000)) % 1000000;
+	val->val1 = (s32_t)dval;
+	val->val2 = ((s32_t)(dval * 1000000)) % 1000000;
 }
 
 static inline int lsm9ds0_mfd_get_magn_channel(enum sensor_channel chan,
@@ -665,7 +665,7 @@ static int lsm9ds0_mfd_init_chip(struct device *dev)
 {
 	struct lsm9ds0_mfd_data *data = dev->driver_data;
 	const struct lsm9ds0_mfd_config *config = dev->config->config_info;
-	uint8_t chip_id;
+	u8_t chip_id;
 
 	if (lsm9ds0_mfd_reboot_memory(dev) < 0) {
 		SYS_LOG_DBG("failed to reset device");
diff --git a/drivers/sensor/lsm9ds0_mfd/lsm9ds0_mfd.h b/drivers/sensor/lsm9ds0_mfd/lsm9ds0_mfd.h
index 7a022a2918b..2e117a589de 100644
--- a/drivers/sensor/lsm9ds0_mfd/lsm9ds0_mfd.h
+++ b/drivers/sensor/lsm9ds0_mfd/lsm9ds0_mfd.h
@@ -526,7 +526,7 @@
 
 struct lsm9ds0_mfd_config {
 	char *i2c_master_dev_name;
-	uint16_t i2c_slave_addr;
+	u16_t i2c_slave_addr;
 };
 
 struct lsm9ds0_mfd_data {
@@ -546,13 +546,13 @@ struct lsm9ds0_mfd_data {
 
 #if defined(CONFIG_LSM9DS0_MFD_ACCEL_FULL_SCALE_RUNTIME)
 #if !defined(LSM9DS0_MFD_ACCEL_DISABLED)
-	uint8_t accel_fs, sample_accel_fs;
+	u8_t accel_fs, sample_accel_fs;
 #endif
 #endif
 
 #if defined(CONFIG_LSM9DS0_MFD_MAGN_FULL_SCALE_RUNTIME)
 #if !defined(LSM9DS0_MFD_MAGN_DISABLED)
-	uint8_t magn_fs, sample_magn_fs;
+	u8_t magn_fs, sample_magn_fs;
 #endif
 #endif
 };
diff --git a/drivers/sensor/max30101/max30101.c b/drivers/sensor/max30101/max30101.c
index 99d797353bb..f67152c5d9e 100644
--- a/drivers/sensor/max30101/max30101.c
+++ b/drivers/sensor/max30101/max30101.c
@@ -9,8 +9,8 @@
 static int max30101_sample_fetch(struct device *dev, enum sensor_channel chan)
 {
 	struct max30101_data *data = dev->driver_data;
-	uint8_t buffer[MAX30101_MAX_BYTES_PER_SAMPLE];
-	uint32_t fifo_data;
+	u8_t buffer[MAX30101_MAX_BYTES_PER_SAMPLE];
+	u32_t fifo_data;
 	int fifo_chan;
 	int num_bytes;
 	int i;
@@ -88,9 +88,9 @@ static int max30101_init(struct device *dev)
 {
 	const struct max30101_config *config = dev->config->config_info;
 	struct max30101_data *data = dev->driver_data;
-	uint8_t part_id;
-	uint8_t mode_cfg;
-	uint32_t led_chan;
+	u8_t part_id;
+	u8_t mode_cfg;
+	u32_t led_chan;
 	int fifo_chan;
 
 	/* Get the I2C device */
@@ -161,7 +161,7 @@ static int max30101_init(struct device *dev)
 	}
 
 #ifdef CONFIG_MAX30101_MULTI_LED_MODE
-	uint8_t multi_led[2];
+	u8_t multi_led[2];
 
 	/* Write the multi-LED mode control registers */
 	multi_led[0] = (config->slot[1] << 4) | (config->slot[0]);
diff --git a/drivers/sensor/max30101/max30101.h b/drivers/sensor/max30101/max30101.h
index 9d4728c7da8..eac0f51675a 100644
--- a/drivers/sensor/max30101/max30101.h
+++ b/drivers/sensor/max30101/max30101.h
@@ -92,16 +92,16 @@ enum max30101_pw {
 };
 
 struct max30101_config {
-	uint8_t fifo;
-	uint8_t spo2;
-	uint8_t led_pa[MAX30101_MAX_NUM_CHANNELS];
+	u8_t fifo;
+	u8_t spo2;
+	u8_t led_pa[MAX30101_MAX_NUM_CHANNELS];
 	enum max30101_mode mode;
 	enum max30101_slot slot[4];
 };
 
 struct max30101_data {
 	struct device *i2c;
-	uint32_t raw[MAX30101_MAX_NUM_CHANNELS];
-	uint8_t map[MAX30101_MAX_NUM_CHANNELS];
-	uint8_t num_channels;
+	u32_t raw[MAX30101_MAX_NUM_CHANNELS];
+	u8_t map[MAX30101_MAX_NUM_CHANNELS];
+	u8_t num_channels;
 };
diff --git a/drivers/sensor/max44009/max44009.c b/drivers/sensor/max44009/max44009.c
index 12fb5e62272..a707727b4b6 100644
--- a/drivers/sensor/max44009/max44009.c
+++ b/drivers/sensor/max44009/max44009.c
@@ -11,8 +11,8 @@
 
 #include "max44009.h"
 
-static int max44009_reg_read(struct max44009_data *drv_data, uint8_t reg,
-			     uint8_t *val, bool send_stop)
+static int max44009_reg_read(struct max44009_data *drv_data, u8_t reg,
+			     u8_t *val, bool send_stop)
 {
 	struct i2c_msg msgs[2] = {
 		{
@@ -38,20 +38,20 @@ static int max44009_reg_read(struct max44009_data *drv_data, uint8_t reg,
 	return 0;
 }
 
-static int max44009_reg_write(struct max44009_data *drv_data, uint8_t reg,
-			      uint8_t val)
+static int max44009_reg_write(struct max44009_data *drv_data, u8_t reg,
+			      u8_t val)
 {
-	uint8_t tx_buf[2] = {reg, val};
+	u8_t tx_buf[2] = {reg, val};
 
 	return i2c_write(drv_data->i2c, tx_buf, sizeof(tx_buf),
 			 MAX44009_I2C_ADDRESS);
 }
 
-static int max44009_reg_update(struct max44009_data *drv_data, uint8_t reg,
-			       uint8_t mask, uint8_t val)
+static int max44009_reg_update(struct max44009_data *drv_data, u8_t reg,
+			       u8_t mask, u8_t val)
 {
-	uint8_t old_val = 0;
-	uint8_t new_val = 0;
+	u8_t old_val = 0;
+	u8_t new_val = 0;
 
 	if (max44009_reg_read(drv_data, reg, &old_val, true) != 0) {
 		return -EIO;
@@ -68,8 +68,8 @@ static int max44009_attr_set(struct device *dev, enum sensor_channel chan,
 			     const struct sensor_value *val)
 {
 	struct max44009_data *drv_data = dev->driver_data;
-	uint8_t value;
-	uint32_t cr;
+	u8_t value;
+	u32_t cr;
 
 	if (chan != SENSOR_CHAN_LIGHT) {
 		return -ENOTSUP;
@@ -108,7 +108,7 @@ static int max44009_attr_set(struct device *dev, enum sensor_channel chan,
 static int max44009_sample_fetch(struct device *dev, enum sensor_channel chan)
 {
 	struct max44009_data *drv_data = dev->driver_data;
-	uint8_t val_h, val_l;
+	u8_t val_h, val_l;
 
 	__ASSERT_NO_MSG(chan == SENSOR_CHAN_ALL || chan == SENSOR_CHAN_LIGHT);
 
@@ -124,7 +124,7 @@ static int max44009_sample_fetch(struct device *dev, enum sensor_channel chan)
 		return -EIO;
 	}
 
-	drv_data->sample = ((uint16_t)val_h) << 8;
+	drv_data->sample = ((u16_t)val_h) << 8;
 	drv_data->sample += val_l;
 
 	return 0;
@@ -134,7 +134,7 @@ static int max44009_channel_get(struct device *dev, enum sensor_channel chan,
 				struct sensor_value *val)
 {
 	struct max44009_data *drv_data = dev->driver_data;
-	uint32_t uval;
+	u32_t uval;
 
 	if (chan != SENSOR_CHAN_LIGHT) {
 		return -ENOTSUP;
diff --git a/drivers/sensor/max44009/max44009.h b/drivers/sensor/max44009/max44009.h
index bfbceb58d75..6f75775641c 100644
--- a/drivers/sensor/max44009/max44009.h
+++ b/drivers/sensor/max44009/max44009.h
@@ -27,7 +27,7 @@
 
 struct max44009_data {
 	struct device *i2c;
-	uint16_t sample;
+	u16_t sample;
 };
 
 #endif /* _SENSOR_MAX44009_ */
diff --git a/drivers/sensor/mcp9808/mcp9808.c b/drivers/sensor/mcp9808/mcp9808.c
index 107d3ec1fc3..de4ad9a253f 100644
--- a/drivers/sensor/mcp9808/mcp9808.c
+++ b/drivers/sensor/mcp9808/mcp9808.c
@@ -17,7 +17,7 @@
 #include "mcp9808.h"
 
 
-int mcp9808_reg_read(struct mcp9808_data *data, uint8_t reg, uint16_t *val)
+int mcp9808_reg_read(struct mcp9808_data *data, u8_t reg, u16_t *val)
 {
 	struct i2c_msg msgs[2] = {
 		{
@@ -26,7 +26,7 @@ int mcp9808_reg_read(struct mcp9808_data *data, uint8_t reg, uint16_t *val)
 			.flags = I2C_MSG_WRITE | I2C_MSG_RESTART,
 		},
 		{
-			.buf = (uint8_t *)val,
+			.buf = (u8_t *)val,
 			.len = 2,
 			.flags = I2C_MSG_READ | I2C_MSG_STOP,
 		},
diff --git a/drivers/sensor/mcp9808/mcp9808.h b/drivers/sensor/mcp9808/mcp9808.h
index 3e9a25240e6..18fb17ad3c0 100644
--- a/drivers/sensor/mcp9808/mcp9808.h
+++ b/drivers/sensor/mcp9808/mcp9808.h
@@ -34,9 +34,9 @@
 
 struct mcp9808_data {
 	struct device *i2c_master;
-	uint16_t i2c_slave_addr;
+	u16_t i2c_slave_addr;
 
-	uint16_t reg_val;
+	u16_t reg_val;
 
 	struct gpio_callback gpio_cb;
 
@@ -55,7 +55,7 @@ struct mcp9808_data {
 #endif
 };
 
-int mcp9808_reg_read(struct mcp9808_data *data, uint8_t reg, uint16_t *val);
+int mcp9808_reg_read(struct mcp9808_data *data, u8_t reg, u16_t *val);
 
 #ifdef CONFIG_MCP9808_TRIGGER
 int mcp9808_attr_set(struct device *dev, enum sensor_channel chan,
diff --git a/drivers/sensor/mcp9808/mcp9808_trigger.c b/drivers/sensor/mcp9808/mcp9808_trigger.c
index 59a57882734..96e653bd73e 100644
--- a/drivers/sensor/mcp9808/mcp9808_trigger.c
+++ b/drivers/sensor/mcp9808/mcp9808_trigger.c
@@ -14,9 +14,9 @@
 
 #include "mcp9808.h"
 
-static int mcp9808_reg_write(struct mcp9808_data *data, uint8_t reg, uint16_t val)
+static int mcp9808_reg_write(struct mcp9808_data *data, u8_t reg, u16_t val)
 {
-	uint16_t be_val = sys_cpu_to_be16(val);
+	u16_t be_val = sys_cpu_to_be16(val);
 
 	struct i2c_msg msgs[2] = {
 		{
@@ -25,7 +25,7 @@ static int mcp9808_reg_write(struct mcp9808_data *data, uint8_t reg, uint16_t va
 			.flags = I2C_MSG_WRITE | I2C_MSG_RESTART,
 		},
 		{
-			.buf = (uint8_t *) &be_val,
+			.buf = (u8_t *) &be_val,
 			.len = 2,
 			.flags = I2C_MSG_WRITE | I2C_MSG_STOP,
 		},
@@ -34,10 +34,10 @@ static int mcp9808_reg_write(struct mcp9808_data *data, uint8_t reg, uint16_t va
 	return i2c_transfer(data->i2c_master, msgs, 2, data->i2c_slave_addr);
 }
 
-static int mcp9808_reg_update(struct mcp9808_data *data, uint8_t reg,
-			      uint16_t mask, uint16_t val)
+static int mcp9808_reg_update(struct mcp9808_data *data, u8_t reg,
+			      u16_t mask, u16_t val)
 {
-	uint16_t old_val, new_val;
+	u16_t old_val, new_val;
 
 	if (mcp9808_reg_read(data, reg, &old_val) < 0) {
 		return -EIO;
@@ -58,9 +58,9 @@ int mcp9808_attr_set(struct device *dev, enum sensor_channel chan,
 		     const struct sensor_value *val)
 {
 	struct mcp9808_data *data = dev->driver_data;
-	uint16_t reg_val = 0;
-	uint8_t reg_addr;
-	int32_t val2;
+	u16_t reg_val = 0;
+	u8_t reg_addr;
+	s32_t val2;
 
 	__ASSERT_NO_MSG(chan == SENSOR_CHAN_TEMP);
 
@@ -101,7 +101,7 @@ int mcp9808_trigger_set(struct device *dev,
 #ifdef CONFIG_MCP9808_TRIGGER_OWN_THREAD
 
 static void mcp9808_gpio_cb(struct device *dev,
-			    struct gpio_callback *cb, uint32_t pins)
+			    struct gpio_callback *cb, u32_t pins)
 {
 	struct mcp9808_data *data =
 		CONTAINER_OF(cb, struct mcp9808_data, gpio_cb);
@@ -131,7 +131,7 @@ static char __stack mcp9808_thread_stack[CONFIG_MCP9808_THREAD_STACK_SIZE];
 #else /* CONFIG_MCP9808_TRIGGER_GLOBAL_THREAD */
 
 static void mcp9808_gpio_cb(struct device *dev,
-			    struct gpio_callback *cb, uint32_t pins)
+			    struct gpio_callback *cb, u32_t pins)
 {
 	struct mcp9808_data *data =
 		CONTAINER_OF(cb, struct mcp9808_data, gpio_cb);
diff --git a/drivers/sensor/mpu6050/mpu6050.c b/drivers/sensor/mpu6050/mpu6050.c
index a8c6e15e150..36981139bfe 100644
--- a/drivers/sensor/mpu6050/mpu6050.c
+++ b/drivers/sensor/mpu6050/mpu6050.c
@@ -12,23 +12,23 @@
 #include "mpu6050.h"
 
 /* see "Accelerometer Measurements" section from register map description */
-static void mpu6050_convert_accel(struct sensor_value *val, int16_t raw_val,
-				  uint16_t sensitivity_shift)
+static void mpu6050_convert_accel(struct sensor_value *val, s16_t raw_val,
+				  u16_t sensitivity_shift)
 {
-	int64_t conv_val;
+	s64_t conv_val;
 
-	conv_val = ((int64_t)raw_val * SENSOR_G) >> sensitivity_shift;
+	conv_val = ((s64_t)raw_val * SENSOR_G) >> sensitivity_shift;
 	val->val1 = conv_val / 1000000;
 	val->val2 = conv_val % 1000000;
 }
 
 /* see "Gyroscope Measurements" section from register map description */
-static void mpu6050_convert_gyro(struct sensor_value *val, int16_t raw_val,
-				 uint16_t sensitivity_x10)
+static void mpu6050_convert_gyro(struct sensor_value *val, s16_t raw_val,
+				 u16_t sensitivity_x10)
 {
-	int64_t conv_val;
+	s64_t conv_val;
 
-	conv_val = ((int64_t)raw_val * SENSOR_PI * 10) /
+	conv_val = ((s64_t)raw_val * SENSOR_PI * 10) /
 		   (180 * sensitivity_x10);
 	val->val1 = conv_val / 1000000;
 	val->val2 = conv_val % 1000000;
@@ -36,10 +36,10 @@ static void mpu6050_convert_gyro(struct sensor_value *val, int16_t raw_val,
 
 /* see "Temperature Measurement" section from register map description */
 static inline void mpu6050_convert_temp(struct sensor_value *val,
-					int16_t raw_val)
+					s16_t raw_val)
 {
 	val->val1 = raw_val / 340 + 36;
-	val->val2 = ((int64_t)(raw_val % 340) * 1000000) / 340 + 530000;
+	val->val2 = ((s64_t)(raw_val % 340) * 1000000) / 340 + 530000;
 
 	if (val->val2 < 0) {
 		val->val1--;
@@ -107,10 +107,10 @@ static int mpu6050_channel_get(struct device *dev,
 static int mpu6050_sample_fetch(struct device *dev, enum sensor_channel chan)
 {
 	struct mpu6050_data *drv_data = dev->driver_data;
-	int16_t buf[7];
+	s16_t buf[7];
 
 	if (i2c_burst_read(drv_data->i2c, CONFIG_MPU6050_I2C_ADDR,
-			   MPU6050_REG_DATA_START, (uint8_t *)buf, 14) < 0) {
+			   MPU6050_REG_DATA_START, (u8_t *)buf, 14) < 0) {
 		SYS_LOG_ERR("Failed to read data sample.");
 		return -EIO;
 	}
@@ -137,7 +137,7 @@ static const struct sensor_driver_api mpu6050_driver_api = {
 int mpu6050_init(struct device *dev)
 {
 	struct mpu6050_data *drv_data = dev->driver_data;
-	uint8_t id, i;
+	u8_t id, i;
 
 	drv_data->i2c = device_get_binding(CONFIG_MPU6050_I2C_MASTER_DEV_NAME);
 	if (drv_data->i2c == NULL) {
diff --git a/drivers/sensor/mpu6050/mpu6050.h b/drivers/sensor/mpu6050/mpu6050.h
index c4f6ad7837a..c3bb8e5506e 100644
--- a/drivers/sensor/mpu6050/mpu6050.h
+++ b/drivers/sensor/mpu6050/mpu6050.h
@@ -34,24 +34,24 @@
 #define MPU6050_SLEEP_EN		BIT(6)
 
 /* measured in degrees/sec x10 to avoid floating point */
-static const uint16_t mpu6050_gyro_sensitivity_x10[] = {
+static const u16_t mpu6050_gyro_sensitivity_x10[] = {
 	1310, 655, 328, 164
 };
 
 struct mpu6050_data {
 	struct device *i2c;
 
-	int16_t accel_x;
-	int16_t accel_y;
-	int16_t accel_z;
-	uint16_t accel_sensitivity_shift;
+	s16_t accel_x;
+	s16_t accel_y;
+	s16_t accel_z;
+	u16_t accel_sensitivity_shift;
 
-	int16_t temp;
+	s16_t temp;
 
-	int16_t gyro_x;
-	int16_t gyro_y;
-	int16_t gyro_z;
-	uint16_t gyro_sensitivity_x10;
+	s16_t gyro_x;
+	s16_t gyro_y;
+	s16_t gyro_z;
+	u16_t gyro_sensitivity_x10;
 
 #ifdef CONFIG_MPU6050_TRIGGER
 	struct device *gpio;
diff --git a/drivers/sensor/mpu6050/mpu6050_trigger.c b/drivers/sensor/mpu6050/mpu6050_trigger.c
index c7da001b46c..01b4333fa28 100644
--- a/drivers/sensor/mpu6050/mpu6050_trigger.c
+++ b/drivers/sensor/mpu6050/mpu6050_trigger.c
@@ -37,7 +37,7 @@ int mpu6050_trigger_set(struct device *dev,
 }
 
 static void mpu6050_gpio_callback(struct device *dev,
-				  struct gpio_callback *cb, uint32_t pins)
+				  struct gpio_callback *cb, u32_t pins)
 {
 	struct mpu6050_data *drv_data =
 		CONTAINER_OF(cb, struct mpu6050_data, gpio_cb);
diff --git a/drivers/sensor/nrf5/temp_nrf5.c b/drivers/sensor/nrf5/temp_nrf5.c
index 89be757e543..c1e5ebf39a7 100644
--- a/drivers/sensor/nrf5/temp_nrf5.c
+++ b/drivers/sensor/nrf5/temp_nrf5.c
@@ -23,7 +23,7 @@
 
 struct temp_nrf5_data {
 	struct k_sem device_sync_sem;
-	int32_t sample;
+	s32_t sample;
 	struct device *clk_m16_dev;
 };
 
@@ -65,7 +65,7 @@ static int temp_nrf5_channel_get(struct device *dev,
 				struct sensor_value *val)
 {
 	struct temp_nrf5_data *data = dev->driver_data;
-	int32_t uval;
+	s32_t uval;
 
 	SYS_LOG_DBG("");
 
diff --git a/drivers/sensor/sht3xd/sht3xd.c b/drivers/sensor/sht3xd/sht3xd.c
index 5011ee09aeb..63b72f52807 100644
--- a/drivers/sensor/sht3xd/sht3xd.c
+++ b/drivers/sensor/sht3xd/sht3xd.c
@@ -16,11 +16,11 @@
  * CRC algorithm parameters were taken from the
  * "Checksum Calculation" section of the datasheet.
  */
-static uint8_t sht3xd_compute_crc(uint16_t value)
+static u8_t sht3xd_compute_crc(u16_t value)
 {
-	uint8_t buf[2] = {value >> 8, value & 0xFF};
-	uint8_t crc = 0xFF;
-	uint8_t polynom = 0x31;
+	u8_t buf[2] = {value >> 8, value & 0xFF};
+	u8_t crc = 0xFF;
+	u8_t polynom = 0x31;
 	int i, j;
 
 	for (i = 0; i < 2; ++i) {
@@ -37,18 +37,18 @@ static uint8_t sht3xd_compute_crc(uint16_t value)
 	return crc;
 }
 
-int sht3xd_write_command(struct sht3xd_data *drv_data, uint16_t cmd)
+int sht3xd_write_command(struct sht3xd_data *drv_data, u16_t cmd)
 {
-	uint8_t tx_buf[2] = {cmd >> 8, cmd & 0xFF};
+	u8_t tx_buf[2] = {cmd >> 8, cmd & 0xFF};
 
 	return i2c_write(drv_data->i2c, tx_buf, sizeof(tx_buf),
 			 SHT3XD_I2C_ADDRESS);
 }
 
-int sht3xd_write_reg(struct sht3xd_data *drv_data, uint16_t cmd,
-		     uint16_t val)
+int sht3xd_write_reg(struct sht3xd_data *drv_data, u16_t cmd,
+		     u16_t val)
 {
-	uint8_t tx_buf[5];
+	u8_t tx_buf[5];
 
 	tx_buf[0] = cmd >> 8;
 	tx_buf[1] = cmd & 0xFF;
@@ -63,12 +63,12 @@ int sht3xd_write_reg(struct sht3xd_data *drv_data, uint16_t cmd,
 static int sht3xd_sample_fetch(struct device *dev, enum sensor_channel chan)
 {
 	struct sht3xd_data *drv_data = dev->driver_data;
-	uint8_t rx_buf[6];
-	uint16_t t_sample, rh_sample;
+	u8_t rx_buf[6];
+	u16_t t_sample, rh_sample;
 
 	__ASSERT_NO_MSG(chan == SENSOR_CHAN_ALL);
 
-	uint8_t tx_buf[2] = {
+	u8_t tx_buf[2] = {
 		SHT3XD_CMD_FETCH >> 8,
 		SHT3XD_CMD_FETCH & 0xFF
 	};
@@ -114,7 +114,7 @@ static int sht3xd_channel_get(struct device *dev,
 			      struct sensor_value *val)
 {
 	struct sht3xd_data *drv_data = dev->driver_data;
-	uint64_t tmp;
+	u64_t tmp;
 
 	/*
 	 * See datasheet "Conversion of Signal Output" section
@@ -122,12 +122,12 @@ static int sht3xd_channel_get(struct device *dev,
 	 */
 	if (chan == SENSOR_CHAN_TEMP) {
 		/* val = -45 + 175 * sample / (2^16 -1) */
-		tmp = 175 * (uint64_t)drv_data->t_sample;
-		val->val1 = (int32_t)(tmp / 0xFFFF) - 45;
+		tmp = 175 * (u64_t)drv_data->t_sample;
+		val->val1 = (s32_t)(tmp / 0xFFFF) - 45;
 		val->val2 = (1000000 * (tmp % 0xFFFF)) / 0xFFFF;
 	} else if (chan == SENSOR_CHAN_HUMIDITY) {
 		/* val = 100000 * sample / (2^16 -1) */
-		tmp = 100000 * (uint64_t)drv_data->rh_sample;
+		tmp = 100000 * (u64_t)drv_data->rh_sample;
 		val->val1 = tmp / 0xFFFF;
 		val->val2 = (1000000 * (tmp % 0xFFFF)) / 0xFFFF;
 	} else {
diff --git a/drivers/sensor/sht3xd/sht3xd.h b/drivers/sensor/sht3xd/sht3xd.h
index 91c777f3137..02563875c4a 100644
--- a/drivers/sensor/sht3xd/sht3xd.h
+++ b/drivers/sensor/sht3xd/sht3xd.h
@@ -45,7 +45,7 @@
 
 #define SHT3XD_CLEAR_STATUS_WAIT_USEC	1000
 
-static const uint16_t sht3xd_measure_cmd[5][3] = {
+static const u16_t sht3xd_measure_cmd[5][3] = {
 	{0x202F, 0x2024, 0x2032},
 	{0x212D, 0x2126, 0x2130},
 	{0x222B, 0x2220, 0x2236},
@@ -59,17 +59,17 @@ static const int sht3xd_measure_wait[3] = {
 
 struct sht3xd_data {
 	struct device *i2c;
-	uint16_t t_sample;
-	uint16_t rh_sample;
+	u16_t t_sample;
+	u16_t rh_sample;
 
 #ifdef CONFIG_SHT3XD_TRIGGER
 	struct device *gpio;
 	struct gpio_callback gpio_cb;
 
-	uint16_t t_low;
-	uint16_t t_high;
-	uint16_t rh_low;
-	uint16_t rh_high;
+	u16_t t_low;
+	u16_t t_high;
+	u16_t rh_low;
+	u16_t rh_high;
 
 	sensor_trigger_handler_t handler;
 	struct sensor_trigger trigger;
@@ -86,10 +86,10 @@ struct sht3xd_data {
 };
 
 #ifdef CONFIG_SHT3XD_TRIGGER
-int sht3xd_write_command(struct sht3xd_data *drv_data, uint16_t cmd);
+int sht3xd_write_command(struct sht3xd_data *drv_data, u16_t cmd);
 
-int sht3xd_write_reg(struct sht3xd_data *drv_data, uint16_t cmd,
-		     uint16_t val);
+int sht3xd_write_reg(struct sht3xd_data *drv_data, u16_t cmd,
+		     u16_t val);
 
 int sht3xd_attr_set(struct device *dev,
 		    enum sensor_channel chan,
diff --git a/drivers/sensor/sht3xd/sht3xd_trigger.c b/drivers/sensor/sht3xd/sht3xd_trigger.c
index ae173b1ae23..8fb4c1d65cb 100644
--- a/drivers/sensor/sht3xd/sht3xd_trigger.c
+++ b/drivers/sensor/sht3xd/sht3xd_trigger.c
@@ -11,21 +11,21 @@
 
 #include "sht3xd.h"
 
-static uint16_t sht3xd_temp_processed_to_raw(const struct sensor_value *val)
+static u16_t sht3xd_temp_processed_to_raw(const struct sensor_value *val)
 {
-	uint64_t uval;
+	u64_t uval;
 
 	/* ret = (val + 45) * (2^16 - 1) / 175 */
-	uval = (uint64_t)(val->val1 + 45) * 1000000 + val->val2;
+	uval = (u64_t)(val->val1 + 45) * 1000000 + val->val2;
 	return ((uval * 0xFFFF) / 175) / 1000000;
 }
 
 static int sht3xd_rh_processed_to_raw(const struct sensor_value *val)
 {
-	uint64_t uval;
+	u64_t uval;
 
 	/* ret = val * (2^16 -1) / 100000 */
-	uval = (uint64_t)val->val1 * 1000000 + val->val2;
+	uval = (u64_t)val->val1 * 1000000 + val->val2;
 	return ((uval * 0xFFFF) / 100000) / 1000000;
 }
 
@@ -35,7 +35,7 @@ int sht3xd_attr_set(struct device *dev,
 		    const struct sensor_value *val)
 {
 	struct sht3xd_data *drv_data = dev->driver_data;
-	uint16_t set_cmd, clear_cmd, reg_val, temp, rh;
+	u16_t set_cmd, clear_cmd, reg_val, temp, rh;
 
 	if (attr == SENSOR_ATTR_LOWER_THRESH) {
 		if (chan == SENSOR_CHAN_TEMP) {
@@ -79,7 +79,7 @@ int sht3xd_attr_set(struct device *dev,
 }
 
 static void sht3xd_gpio_callback(struct device *dev,
-				 struct gpio_callback *cb, uint32_t pins)
+				 struct gpio_callback *cb, u32_t pins)
 {
 	struct sht3xd_data *drv_data =
 		CONTAINER_OF(cb, struct sht3xd_data, gpio_cb);
diff --git a/drivers/sensor/sx9500/sx9500.c b/drivers/sensor/sx9500/sx9500.c
index fd038289bbe..b77dc028701 100644
--- a/drivers/sensor/sx9500/sx9500.c
+++ b/drivers/sensor/sx9500/sx9500.c
@@ -17,7 +17,7 @@
 
 #include "sx9500.h"
 
-static uint8_t sx9500_reg_defaults[] = {
+static u8_t sx9500_reg_defaults[] = {
 	/*
 	 * First number is register address to write to.  The chip
 	 * auto-increments the address for subsequent values in a single
@@ -76,7 +76,7 @@ static const struct sensor_driver_api sx9500_api_funcs = {
 static int sx9500_init_chip(struct device *dev)
 {
 	struct sx9500_data *data = (struct sx9500_data *) dev->driver_data;
-	uint8_t val;
+	u8_t val;
 
 	if (i2c_write(data->i2c_master, sx9500_reg_defaults,
 		      sizeof(sx9500_reg_defaults), data->i2c_slave_addr)
diff --git a/drivers/sensor/sx9500/sx9500.h b/drivers/sensor/sx9500/sx9500.h
index d66f14bb646..a190a60d6cb 100644
--- a/drivers/sensor/sx9500/sx9500.h
+++ b/drivers/sensor/sx9500/sx9500.h
@@ -26,8 +26,8 @@
 
 struct sx9500_data {
 	struct device *i2c_master;
-	uint16_t i2c_slave_addr;
-	uint8_t prox_stat;
+	u16_t i2c_slave_addr;
+	u8_t prox_stat;
 
 	struct gpio_callback gpio_cb;
 
diff --git a/drivers/sensor/sx9500/sx9500_trigger.c b/drivers/sensor/sx9500/sx9500_trigger.c
index f94789e693a..ecc0ce652d0 100644
--- a/drivers/sensor/sx9500/sx9500_trigger.c
+++ b/drivers/sensor/sx9500/sx9500_trigger.c
@@ -58,7 +58,7 @@ int sx9500_trigger_set(struct device *dev,
 #ifdef CONFIG_SX9500_TRIGGER_OWN_THREAD
 
 static void sx9500_gpio_cb(struct device *port,
-			   struct gpio_callback *cb, uint32_t pins)
+			   struct gpio_callback *cb, u32_t pins)
 {
 	struct sx9500_data *data =
 		CONTAINER_OF(cb, struct sx9500_data, gpio_cb);
@@ -72,7 +72,7 @@ static void sx9500_thread_main(int arg1, int unused)
 {
 	struct device *dev = INT_TO_POINTER(arg1);
 	struct sx9500_data *data = dev->driver_data;
-	uint8_t reg_val;
+	u8_t reg_val;
 
 	ARG_UNUSED(unused);
 
@@ -98,7 +98,7 @@ static void sx9500_thread_main(int arg1, int unused)
 #else /* CONFIG_SX9500_TRIGGER_GLOBAL_THREAD */
 
 static void sx9500_gpio_cb(struct device *port,
-			   struct gpio_callback *cb, uint32_t pins)
+			   struct gpio_callback *cb, u32_t pins)
 {
 	struct sx9500_data *data =
 		CONTAINER_OF(cb, struct sx9500_data, gpio_cb);
@@ -112,7 +112,7 @@ static void sx9500_gpio_thread_cb(void *arg)
 {
 	struct device *dev = arg;
 	struct sx9500_data *data = dev->driver_data;
-	uint8_t reg_val;
+	u8_t reg_val;
 
 	if (i2c_reg_read_byte(data->i2c_master, data->i2c_slave_addr,
 			      SX9500_REG_IRQ_SRC, &reg_val) < 0) {
diff --git a/drivers/sensor/th02/th02.c b/drivers/sensor/th02/th02.c
index a6f1438087b..8c085cfb85e 100644
--- a/drivers/sensor/th02/th02.c
+++ b/drivers/sensor/th02/th02.c
@@ -14,9 +14,9 @@
 
 #include "th02.h"
 
-static uint8_t read8(struct device *dev, uint8_t d)
+static u8_t read8(struct device *dev, u8_t d)
 {
-	uint8_t buf;
+	u8_t buf;
 
 	if (i2c_reg_read_byte(dev, TH02_I2C_DEV_ID, d, &buf) < 0) {
 		SYS_LOG_ERR("Error reading register.");
@@ -27,7 +27,7 @@ static uint8_t read8(struct device *dev, uint8_t d)
 static int is_ready(struct device *dev)
 {
 
-	uint8_t status;
+	u8_t status;
 
 	if (i2c_reg_read_byte(dev, TH02_I2C_DEV_ID,
 			      TH02_REG_STATUS, &status) < 0) {
@@ -41,9 +41,9 @@ static int is_ready(struct device *dev)
 	}
 }
 
-static uint16_t get_humi(struct device *dev)
+static u16_t get_humi(struct device *dev)
 {
-	uint16_t humidity = 0;
+	u16_t humidity = 0;
 
 	if (i2c_reg_write_byte(dev, TH02_I2C_DEV_ID,
 			       TH02_REG_CONFIG, TH02_CMD_MEASURE_HUMI) < 0) {
@@ -61,9 +61,9 @@ static uint16_t get_humi(struct device *dev)
 	return humidity;
 }
 
-uint16_t get_temp(struct device *dev)
+u16_t get_temp(struct device *dev)
 {
-	uint16_t temperature = 0;
+	u16_t temperature = 0;
 
 	if (i2c_reg_write_byte(dev, TH02_I2C_DEV_ID,
 			       TH02_REG_CONFIG, TH02_CMD_MEASURE_TEMP) < 0) {
diff --git a/drivers/sensor/th02/th02.h b/drivers/sensor/th02/th02.h
index 74f9e2bd2b8..304a1478fb6 100644
--- a/drivers/sensor/th02/th02.h
+++ b/drivers/sensor/th02/th02.h
@@ -27,8 +27,8 @@
 
 struct th02_data {
 	struct device *i2c;
-	uint16_t t_sample;
-	uint16_t rh_sample;
+	u16_t t_sample;
+	u16_t rh_sample;
 };
 
 #define SYS_LOG_DOMAIN "TH02"
diff --git a/drivers/sensor/tmp007/tmp007.c b/drivers/sensor/tmp007/tmp007.c
index 3e088c26c6b..baa2d6ff6ff 100644
--- a/drivers/sensor/tmp007/tmp007.c
+++ b/drivers/sensor/tmp007/tmp007.c
@@ -15,7 +15,7 @@
 
 #include "tmp007.h"
 
-int tmp007_reg_read(struct tmp007_data *drv_data, uint8_t reg, uint16_t *val)
+int tmp007_reg_read(struct tmp007_data *drv_data, u8_t reg, u16_t *val)
 {
 	struct i2c_msg msgs[2] = {
 		{
@@ -24,7 +24,7 @@ int tmp007_reg_read(struct tmp007_data *drv_data, uint8_t reg, uint16_t *val)
 			.flags = I2C_MSG_WRITE | I2C_MSG_RESTART,
 		},
 		{
-			.buf = (uint8_t *)val,
+			.buf = (u8_t *)val,
 			.len = 2,
 			.flags = I2C_MSG_READ | I2C_MSG_STOP,
 		},
@@ -39,19 +39,19 @@ int tmp007_reg_read(struct tmp007_data *drv_data, uint8_t reg, uint16_t *val)
 	return 0;
 }
 
-int tmp007_reg_write(struct tmp007_data *drv_data, uint8_t reg, uint16_t val)
+int tmp007_reg_write(struct tmp007_data *drv_data, u8_t reg, u16_t val)
 {
-	uint8_t tx_buf[3] = {reg, val >> 8, val & 0xFF};
+	u8_t tx_buf[3] = {reg, val >> 8, val & 0xFF};
 
 	return i2c_write(drv_data->i2c, tx_buf, sizeof(tx_buf),
 			 TMP007_I2C_ADDRESS);
 }
 
-int tmp007_reg_update(struct tmp007_data *drv_data, uint8_t reg,
-		      uint16_t mask, uint16_t val)
+int tmp007_reg_update(struct tmp007_data *drv_data, u8_t reg,
+		      u16_t mask, u16_t val)
 {
-	uint16_t old_val = 0;
-	uint16_t new_val;
+	u16_t old_val = 0;
+	u16_t new_val;
 
 	if (tmp007_reg_read(drv_data, reg, &old_val) < 0) {
 		return -EIO;
@@ -66,7 +66,7 @@ int tmp007_reg_update(struct tmp007_data *drv_data, uint8_t reg,
 static int tmp007_sample_fetch(struct device *dev, enum sensor_channel chan)
 {
 	struct tmp007_data *drv_data = dev->driver_data;
-	uint16_t val;
+	u16_t val;
 
 	__ASSERT_NO_MSG(chan == SENSOR_CHAN_ALL || chan == SENSOR_CHAN_TEMP);
 
@@ -78,7 +78,7 @@ static int tmp007_sample_fetch(struct device *dev, enum sensor_channel chan)
 		return -EIO;
 	}
 
-	drv_data->sample = arithmetic_shift_right((int16_t)val, 2);
+	drv_data->sample = arithmetic_shift_right((s16_t)val, 2);
 
 	return 0;
 }
@@ -88,13 +88,13 @@ static int tmp007_channel_get(struct device *dev,
 			       struct sensor_value *val)
 {
 	struct tmp007_data *drv_data = dev->driver_data;
-	int32_t uval;
+	s32_t uval;
 
 	if (chan != SENSOR_CHAN_TEMP) {
 		return -ENOTSUP;
 	}
 
-	uval = (int32_t)drv_data->sample * TMP007_TEMP_SCALE;
+	uval = (s32_t)drv_data->sample * TMP007_TEMP_SCALE;
 	val->val1 = uval / 1000000;
 	val->val2 = uval % 1000000;
 
diff --git a/drivers/sensor/tmp007/tmp007.h b/drivers/sensor/tmp007/tmp007.h
index 5cc465c5ba8..cfa744daa68 100644
--- a/drivers/sensor/tmp007/tmp007.h
+++ b/drivers/sensor/tmp007/tmp007.h
@@ -35,7 +35,7 @@
 
 struct tmp007_data {
 	struct device *i2c;
-	int16_t sample;
+	s16_t sample;
 
 #ifdef CONFIG_TMP007_TRIGGER
 	struct device *gpio;
@@ -59,12 +59,12 @@ struct tmp007_data {
 };
 
 #ifdef CONFIG_TMP007_TRIGGER
-int tmp007_reg_read(struct tmp007_data *drv_data, uint8_t reg, uint16_t *val);
+int tmp007_reg_read(struct tmp007_data *drv_data, u8_t reg, u16_t *val);
 
-int tmp007_reg_write(struct tmp007_data *drv_data, uint8_t reg, uint16_t val);
+int tmp007_reg_write(struct tmp007_data *drv_data, u8_t reg, u16_t val);
 
-int tmp007_reg_update(struct tmp007_data *drv_data, uint8_t reg,
-		      uint16_t mask, uint16_t val);
+int tmp007_reg_update(struct tmp007_data *drv_data, u8_t reg,
+		      u16_t mask, u16_t val);
 
 int tmp007_attr_set(struct device *dev,
 		    enum sensor_channel chan,
diff --git a/drivers/sensor/tmp007/tmp007_trigger.c b/drivers/sensor/tmp007/tmp007_trigger.c
index 1dac3b91e67..d99acff4ad2 100644
--- a/drivers/sensor/tmp007/tmp007_trigger.c
+++ b/drivers/sensor/tmp007/tmp007_trigger.c
@@ -20,8 +20,8 @@ int tmp007_attr_set(struct device *dev,
 		    const struct sensor_value *val)
 {
 	struct tmp007_data *drv_data = dev->driver_data;
-	int64_t value;
-	uint8_t reg;
+	s64_t value;
+	u8_t reg;
 
 	if (chan != SENSOR_CHAN_TEMP) {
 		return -ENOTSUP;
@@ -35,7 +35,7 @@ int tmp007_attr_set(struct device *dev,
 		return -ENOTSUP;
 	}
 
-	value = (int64_t)val->val1 * 1000000 + val->val2;
+	value = (s64_t)val->val1 * 1000000 + val->val2;
 	value = (value / TMP007_TEMP_TH_SCALE) << 6;
 
 	if (tmp007_reg_write(drv_data, reg, value) < 0) {
@@ -47,7 +47,7 @@ int tmp007_attr_set(struct device *dev,
 }
 
 static void tmp007_gpio_callback(struct device *dev,
-				 struct gpio_callback *cb, uint32_t pins)
+				 struct gpio_callback *cb, u32_t pins)
 {
 	struct tmp007_data *drv_data =
 		CONTAINER_OF(cb, struct tmp007_data, gpio_cb);
@@ -65,7 +65,7 @@ static void tmp007_thread_cb(void *arg)
 {
 	struct device *dev = arg;
 	struct tmp007_data *drv_data = dev->driver_data;
-	uint16_t status;
+	u16_t status;
 
 	if (tmp007_reg_read(drv_data, TMP007_REG_STATUS, &status) < 0) {
 		return;
diff --git a/drivers/sensor/tmp112/tmp112.c b/drivers/sensor/tmp112/tmp112.c
index 347a43318d9..1e4d29e0a7f 100644
--- a/drivers/sensor/tmp112/tmp112.c
+++ b/drivers/sensor/tmp112/tmp112.c
@@ -31,11 +31,11 @@
 
 struct tmp112_data {
 	struct device *i2c;
-	int16_t sample;
+	s16_t sample;
 };
 
 static int tmp112_reg_read(struct tmp112_data *drv_data,
-			   uint8_t reg, uint16_t *val)
+			   u8_t reg, u16_t *val)
 {
 	struct i2c_msg msgs[2] = {
 		{
@@ -44,7 +44,7 @@ static int tmp112_reg_read(struct tmp112_data *drv_data,
 			.flags = I2C_MSG_WRITE | I2C_MSG_RESTART,
 		},
 		{
-			.buf = (uint8_t *)val,
+			.buf = (u8_t *)val,
 			.len = 2,
 			.flags = I2C_MSG_READ | I2C_MSG_STOP,
 		},
@@ -60,19 +60,19 @@ static int tmp112_reg_read(struct tmp112_data *drv_data,
 }
 
 static int tmp112_reg_write(struct tmp112_data *drv_data,
-			    uint8_t reg, uint16_t val)
+			    u8_t reg, u16_t val)
 {
-	uint8_t tx_buf[3] = {reg, val >> 8, val & 0xFF};
+	u8_t tx_buf[3] = {reg, val >> 8, val & 0xFF};
 
 	return i2c_write(drv_data->i2c, tx_buf, sizeof(tx_buf),
 			 TMP112_I2C_ADDRESS);
 }
 
-static int tmp112_reg_update(struct tmp112_data *drv_data, uint8_t reg,
-			     uint16_t mask, uint16_t val)
+static int tmp112_reg_update(struct tmp112_data *drv_data, u8_t reg,
+			     u16_t mask, u16_t val)
 {
-	uint16_t old_val = 0;
-	uint16_t new_val;
+	u16_t old_val = 0;
+	u16_t new_val;
 
 	if (tmp112_reg_read(drv_data, reg, &old_val) < 0) {
 		return -EIO;
@@ -90,8 +90,8 @@ static int tmp112_attr_set(struct device *dev,
 			   const struct sensor_value *val)
 {
 	struct tmp112_data *drv_data = dev->driver_data;
-	int64_t value;
-	uint16_t cr;
+	s64_t value;
+	u16_t cr;
 
 	if (chan != SENSOR_CHAN_TEMP) {
 		return -ENOTSUP;
@@ -163,7 +163,7 @@ static int tmp112_attr_set(struct device *dev,
 static int tmp112_sample_fetch(struct device *dev, enum sensor_channel chan)
 {
 	struct tmp112_data *drv_data = dev->driver_data;
-	uint16_t val;
+	u16_t val;
 
 	__ASSERT_NO_MSG(chan == SENSOR_CHAN_ALL || chan == SENSOR_CHAN_TEMP);
 
@@ -172,9 +172,9 @@ static int tmp112_sample_fetch(struct device *dev, enum sensor_channel chan)
 	}
 
 	if (val & TMP112_D0_BIT) {
-		drv_data->sample = arithmetic_shift_right((int16_t)val, 3);
+		drv_data->sample = arithmetic_shift_right((s16_t)val, 3);
 	} else {
-		drv_data->sample = arithmetic_shift_right((int16_t)val, 4);
+		drv_data->sample = arithmetic_shift_right((s16_t)val, 4);
 	}
 
 	return 0;
@@ -185,13 +185,13 @@ static int tmp112_channel_get(struct device *dev,
 		struct sensor_value *val)
 {
 	struct tmp112_data *drv_data = dev->driver_data;
-	int32_t uval;
+	s32_t uval;
 
 	if (chan != SENSOR_CHAN_TEMP) {
 		return -ENOTSUP;
 	}
 
-	uval = (int32_t)drv_data->sample * TMP112_TEMP_SCALE;
+	uval = (s32_t)drv_data->sample * TMP112_TEMP_SCALE;
 	val->val1 = uval / 1000000;
 	val->val2 = uval % 1000000;
 
diff --git a/drivers/serial/uart_altera_jtag.c b/drivers/serial/uart_altera_jtag.c
index bfa514edb13..c15ac00fb05 100644
--- a/drivers/serial/uart_altera_jtag.c
+++ b/drivers/serial/uart_altera_jtag.c
@@ -36,19 +36,19 @@
 #define DEV_CFG(dev) \
 	((const struct uart_device_config * const)(dev)->config->config_info)
 
-static uint32_t control_reg_read(void *base)
+static u32_t control_reg_read(void *base)
 {
 	return _nios2_reg_read(base, UART_ALTERA_JTAG_CONTROL_REG);
 }
 
 
-static void control_reg_write(void *base, uint32_t data)
+static void control_reg_write(void *base, u32_t data)
 {
 	return _nios2_reg_write(base, UART_ALTERA_JTAG_CONTROL_REG, data);
 }
 
 
-static void data_reg_write(void *base, uint32_t data)
+static void data_reg_write(void *base, u32_t data)
 {
 	return _nios2_reg_write(base, UART_ALTERA_JTAG_DATA_REG, data);
 }
diff --git a/drivers/serial/uart_atmel_sam3.c b/drivers/serial/uart_atmel_sam3.c
index 087698afa09..8a5db9d3e9d 100644
--- a/drivers/serial/uart_atmel_sam3.c
+++ b/drivers/serial/uart_atmel_sam3.c
@@ -29,34 +29,34 @@
 /* UART registers struct */
 struct _uart {
 	/* UART registers */
-	uint32_t	cr;	/* 0x00 Control Register */
-	uint32_t	mr;	/* 0x04 Mode Register */
-	uint32_t	ier;	/* 0x08 Interrupt Enable Register */
-	uint32_t	idr;	/* 0x0C Interrupt Disable Register */
-	uint32_t	imr;	/* 0x10 Interrupt Mask Register */
-	uint32_t	sr;	/* 0x14 Status Register */
-	uint32_t	rhr;	/* 0x18 Receive Holding Register */
-	uint32_t	thr;	/* 0x1C Transmit Holding Register */
-	uint32_t	brgr;	/* 0x20 Baud Rate Generator Register */
+	u32_t	cr;	/* 0x00 Control Register */
+	u32_t	mr;	/* 0x04 Mode Register */
+	u32_t	ier;	/* 0x08 Interrupt Enable Register */
+	u32_t	idr;	/* 0x0C Interrupt Disable Register */
+	u32_t	imr;	/* 0x10 Interrupt Mask Register */
+	u32_t	sr;	/* 0x14 Status Register */
+	u32_t	rhr;	/* 0x18 Receive Holding Register */
+	u32_t	thr;	/* 0x1C Transmit Holding Register */
+	u32_t	brgr;	/* 0x20 Baud Rate Generator Register */
 
-	uint32_t	reserved[55];	/* 0x24 - 0xFF */
+	u32_t	reserved[55];	/* 0x24 - 0xFF */
 
 	/* PDC related registers */
-	uint32_t	pdc_rpr;	/* 0x100 Receive Pointer Reg */
-	uint32_t	pdc_rcr;	/* 0x104 Receive Counter Reg */
-	uint32_t	pdc_tpr;	/* 0x108 Transmit Pointer Reg */
-	uint32_t	pdc_tcr;	/* 0x10C Transmit Counter Reg */
-	uint32_t	pdc_rnpr;	/* 0x110 Receive Next Pointer */
-	uint32_t	pdc_rncr;	/* 0x114 Receive Next Counter */
-	uint32_t	pdc_tnpr;	/* 0x118 Transmit Next Pointer */
-	uint32_t	pdc_tncr;	/* 0x11C Transmit Next Counter */
-	uint32_t	pdc_ptcr;	/* 0x120 Transfer Control Reg */
-	uint32_t	pdc_ptsr;	/* 0x124 Transfer Status Reg */
+	u32_t	pdc_rpr;	/* 0x100 Receive Pointer Reg */
+	u32_t	pdc_rcr;	/* 0x104 Receive Counter Reg */
+	u32_t	pdc_tpr;	/* 0x108 Transmit Pointer Reg */
+	u32_t	pdc_tcr;	/* 0x10C Transmit Counter Reg */
+	u32_t	pdc_rnpr;	/* 0x110 Receive Next Pointer */
+	u32_t	pdc_rncr;	/* 0x114 Receive Next Counter */
+	u32_t	pdc_tnpr;	/* 0x118 Transmit Next Pointer */
+	u32_t	pdc_tncr;	/* 0x11C Transmit Next Counter */
+	u32_t	pdc_ptcr;	/* 0x120 Transfer Control Reg */
+	u32_t	pdc_ptsr;	/* 0x124 Transfer Status Reg */
 };
 
 /* Device data structure */
 struct uart_sam3_dev_data_t {
-	uint32_t baud_rate;	/* Baud rate */
+	u32_t baud_rate;	/* Baud rate */
 };
 
 /* convenience defines */
@@ -68,15 +68,15 @@ struct uart_sam3_dev_data_t {
 	((volatile struct _uart *)(DEV_CFG(dev))->base)
 
 /* Registers */
-#define UART_CR(dev)	(*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x00)))
-#define UART_MR(dev)	(*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x04)))
-#define UART_IER(dev)	(*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x08)))
-#define UART_IDR(dev)	(*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x0C)))
-#define UART_IMR(dev)	(*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x10)))
-#define UART_SR(dev)	(*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x14)))
-#define UART_RHR(dev)	(*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x18)))
-#define UART_THR(dev)	(*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x1C)))
-#define UART_BRGR(dev)	(*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x20)))
+#define UART_CR(dev)	(*((volatile u32_t *)(DEV_CFG(dev)->base + 0x00)))
+#define UART_MR(dev)	(*((volatile u32_t *)(DEV_CFG(dev)->base + 0x04)))
+#define UART_IER(dev)	(*((volatile u32_t *)(DEV_CFG(dev)->base + 0x08)))
+#define UART_IDR(dev)	(*((volatile u32_t *)(DEV_CFG(dev)->base + 0x0C)))
+#define UART_IMR(dev)	(*((volatile u32_t *)(DEV_CFG(dev)->base + 0x10)))
+#define UART_SR(dev)	(*((volatile u32_t *)(DEV_CFG(dev)->base + 0x14)))
+#define UART_RHR(dev)	(*((volatile u32_t *)(DEV_CFG(dev)->base + 0x18)))
+#define UART_THR(dev)	(*((volatile u32_t *)(DEV_CFG(dev)->base + 0x1C)))
+#define UART_BRGR(dev)	(*((volatile u32_t *)(DEV_CFG(dev)->base + 0x20)))
 
 /* bits */
 #define UART_CR_RSTRX	(1 << 2)
@@ -128,12 +128,12 @@ static const struct uart_driver_api uart_sam3_driver_api;
  * @return N/A
  */
 static void baudrate_set(struct device *dev,
-			 uint32_t baudrate, uint32_t sys_clk_freq_hz)
+			 u32_t baudrate, u32_t sys_clk_freq_hz)
 {
 	volatile struct _uart *uart = UART_STRUCT(dev);
 	const struct uart_device_config * const dev_cfg = DEV_CFG(dev);
 	struct uart_sam3_dev_data_t * const dev_data = DEV_DATA(dev);
-	uint32_t divisor; /* baud rate divisor */
+	u32_t divisor; /* baud rate divisor */
 
 	ARG_UNUSED(sys_clk_freq_hz);
 
@@ -231,7 +231,7 @@ static unsigned char uart_sam3_poll_out(struct device *dev,
 		;
 
 	/* send a character */
-	uart->thr = (uint32_t)c;
+	uart->thr = (u32_t)c;
 	return c;
 }
 
@@ -241,7 +241,7 @@ static const struct uart_driver_api uart_sam3_driver_api = {
 };
 
 static const struct uart_device_config uart_sam3_dev_cfg_0 = {
-	.base = (uint8_t *)UART_ADDR,
+	.base = (u8_t *)UART_ADDR,
 	.sys_clk_freq = CONFIG_UART_ATMEL_SAM3_CLK_FREQ,
 };
 
diff --git a/drivers/serial/uart_cc32xx.c b/drivers/serial/uart_cc32xx.c
index 6fb07e009b1..232a74c6c28 100644
--- a/drivers/serial/uart_cc32xx.c
+++ b/drivers/serial/uart_cc32xx.c
@@ -127,7 +127,7 @@ static int uart_cc32xx_err_check(struct device *dev)
 
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
 
-static int uart_cc32xx_fifo_fill(struct device *dev, const uint8_t *tx_data,
+static int uart_cc32xx_fifo_fill(struct device *dev, const u8_t *tx_data,
 				 int size)
 {
 	const struct uart_device_config *config = DEV_CFG(dev);
@@ -146,7 +146,7 @@ static int uart_cc32xx_fifo_fill(struct device *dev, const uint8_t *tx_data,
 	return (int)num_tx;
 }
 
-static int uart_cc32xx_fifo_read(struct device *dev, uint8_t *rx_data,
+static int uart_cc32xx_fifo_read(struct device *dev, u8_t *rx_data,
 				 const int size)
 {
 	const struct uart_device_config *config = DEV_CFG(dev);
diff --git a/drivers/serial/uart_cmsdk_apb.c b/drivers/serial/uart_cmsdk_apb.c
index 8e7b405a9d7..d02dfca9488 100644
--- a/drivers/serial/uart_cmsdk_apb.c
+++ b/drivers/serial/uart_cmsdk_apb.c
@@ -22,19 +22,19 @@
 /* UART registers struct */
 struct uart_cmsdk_apb {
 	/* offset: 0x000 (r/w) data register    */
-	volatile uint32_t  data;
+	volatile u32_t  data;
 	/* offset: 0x004 (r/w) status register  */
-	volatile uint32_t  state;
+	volatile u32_t  state;
 	/* offset: 0x008 (r/w) control register */
-	volatile uint32_t  ctrl;
+	volatile u32_t  ctrl;
 	union {
 		/* offset: 0x00c (r/ ) interrupt status register */
-		volatile uint32_t  intstatus;
+		volatile u32_t  intstatus;
 		/* offset: 0x00c ( /w) interrupt clear register  */
-		volatile uint32_t  intclear;
+		volatile u32_t  intclear;
 	};
 	/* offset: 0x010 (r/w) baudrate divider register */
-	volatile uint32_t  bauddiv;
+	volatile u32_t  bauddiv;
 };
 
 /* UART Bits */
@@ -61,7 +61,7 @@ struct uart_cmsdk_apb {
 
 /* Device data structure */
 struct uart_cmsdk_apb_dev_data {
-	uint32_t baud_rate;	/* Baud rate */
+	u32_t baud_rate;	/* Baud rate */
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
 	uart_irq_callback_t irq_cb;
 #endif
@@ -198,7 +198,7 @@ static unsigned char uart_cmsdk_apb_poll_out(struct device *dev,
 	}
 
 	/* Send a character */
-	uart->data = (uint32_t)c;
+	uart->data = (u32_t)c;
 	return c;
 }
 
@@ -213,7 +213,7 @@ static unsigned char uart_cmsdk_apb_poll_out(struct device *dev,
  * @return the number of characters that have been read
  */
 static int uart_cmsdk_apb_fifo_fill(struct device *dev,
-				    const uint8_t *tx_data, int len)
+				    const u8_t *tx_data, int len)
 {
 	volatile struct uart_cmsdk_apb *uart = UART_STRUCT(dev);
 
@@ -236,7 +236,7 @@ static int uart_cmsdk_apb_fifo_fill(struct device *dev,
  * @return the number of characters that have been read
  */
 static int uart_cmsdk_apb_fifo_read(struct device *dev,
-				    uint8_t *rx_data, const int size)
+				    u8_t *rx_data, const int size)
 {
 	volatile struct uart_cmsdk_apb *uart = UART_STRUCT(dev);
 
@@ -452,7 +452,7 @@ static void uart_cmsdk_apb_irq_config_func_0(struct device *dev);
 #endif
 
 static const struct uart_device_config uart_cmsdk_apb_dev_cfg_0 = {
-	.base = (uint8_t *)CMSDK_APB_UART0,
+	.base = (u8_t *)CMSDK_APB_UART0,
 	.sys_clk_freq = CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC,
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
 	.irq_config_func = uart_cmsdk_apb_irq_config_func_0,
@@ -517,7 +517,7 @@ static void uart_cmsdk_apb_irq_config_func_1(struct device *dev);
 #endif
 
 static const struct uart_device_config uart_cmsdk_apb_dev_cfg_1 = {
-	.base = (uint8_t *)CMSDK_APB_UART1,
+	.base = (u8_t *)CMSDK_APB_UART1,
 	.sys_clk_freq = CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC,
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
 	.irq_config_func = uart_cmsdk_apb_irq_config_func_1,
@@ -582,7 +582,7 @@ static void uart_cmsdk_apb_irq_config_func_2(struct device *dev);
 #endif
 
 static const struct uart_device_config uart_cmsdk_apb_dev_cfg_2 = {
-	.base = (uint8_t *)CMSDK_APB_UART2,
+	.base = (u8_t *)CMSDK_APB_UART2,
 	.sys_clk_freq = CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC,
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
 	.irq_config_func = uart_cmsdk_apb_irq_config_func_2,
@@ -647,7 +647,7 @@ static void uart_cmsdk_apb_irq_config_func_3(struct device *dev);
 #endif
 
 static const struct uart_device_config uart_cmsdk_apb_dev_cfg_3 = {
-	.base = (uint8_t *)CMSDK_APB_UART3,
+	.base = (u8_t *)CMSDK_APB_UART3,
 	.sys_clk_freq = CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC,
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
 	.irq_config_func = uart_cmsdk_apb_irq_config_func_3,
@@ -712,7 +712,7 @@ static void uart_cmsdk_apb_irq_config_func_4(struct device *dev);
 #endif
 
 static const struct uart_device_config uart_cmsdk_apb_dev_cfg_4 = {
-	.base = (uint8_t *)CMSDK_APB_UART4,
+	.base = (u8_t *)CMSDK_APB_UART4,
 	.sys_clk_freq = CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC,
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
 	.irq_config_func = uart_cmsdk_apb_irq_config_func_4,
diff --git a/drivers/serial/uart_fe310.c b/drivers/serial/uart_fe310.c
index 91f0b526865..0adf616859d 100644
--- a/drivers/serial/uart_fe310.c
+++ b/drivers/serial/uart_fe310.c
@@ -32,13 +32,13 @@
 #define CTRL_CNT(x)    (((x) & 0x07) << 16)
 
 struct uart_fe310_regs_t {
-	uint32_t tx;
-	uint32_t rx;
-	uint32_t txctrl;
-	uint32_t rxctrl;
-	uint32_t ie;
-	uint32_t ip;
-	uint32_t div;
+	u32_t tx;
+	u32_t rx;
+	u32_t txctrl;
+	u32_t rxctrl;
+	u32_t ie;
+	u32_t ip;
+	u32_t div;
 };
 
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
@@ -46,11 +46,11 @@ typedef void (*irq_cfg_func_t)(void);
 #endif
 
 struct uart_fe310_device_config {
-	uint32_t       port;
-	uint32_t       sys_clk_freq;
-	uint32_t       baud_rate;
-	uint32_t       rxcnt_irq;
-	uint32_t       txcnt_irq;
+	u32_t       port;
+	u32_t       sys_clk_freq;
+	u32_t       baud_rate;
+	u32_t       rxcnt_irq;
+	u32_t       txcnt_irq;
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
 	irq_cfg_func_t cfg_func;
 #endif
@@ -105,7 +105,7 @@ static unsigned char uart_fe310_poll_out(struct device *dev,
 static int uart_fe310_poll_in(struct device *dev, unsigned char *c)
 {
 	volatile struct uart_fe310_regs_t *uart = DEV_UART(dev);
-	uint32_t val = uart->rx;
+	u32_t val = uart->rx;
 
 	if (val & RXDATA_EMPTY)
 		return -1;
@@ -127,7 +127,7 @@ static int uart_fe310_poll_in(struct device *dev, unsigned char *c)
  * @return Number of bytes sent
  */
 static int uart_fe310_fifo_fill(struct device *dev,
-				const uint8_t *tx_data,
+				const u8_t *tx_data,
 				int size)
 {
 	volatile struct uart_fe310_regs_t *uart = DEV_UART(dev);
@@ -149,12 +149,12 @@ static int uart_fe310_fifo_fill(struct device *dev,
  * @return Number of bytes read
  */
 static int uart_fe310_fifo_read(struct device *dev,
-				uint8_t *rx_data,
+				u8_t *rx_data,
 				const int size)
 {
 	volatile struct uart_fe310_regs_t *uart = DEV_UART(dev);
 	int i;
-	uint32_t val;
+	u32_t val;
 
 	for (i = 0; i < size; i++) {
 		val = uart->rx;
@@ -162,7 +162,7 @@ static int uart_fe310_fifo_read(struct device *dev,
 		if (val & RXDATA_EMPTY)
 			break;
 
-		rx_data[i] = (uint8_t)(val & RXDATA_MASK);
+		rx_data[i] = (u8_t)(val & RXDATA_MASK);
 	}
 
 	return i;
diff --git a/drivers/serial/uart_mcux.c b/drivers/serial/uart_mcux.c
index ea5d463e193..cb8da3d0644 100644
--- a/drivers/serial/uart_mcux.c
+++ b/drivers/serial/uart_mcux.c
@@ -14,7 +14,7 @@
 struct uart_mcux_config {
 	UART_Type *base;
 	clock_name_t clock_source;
-	uint32_t baud_rate;
+	u32_t baud_rate;
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
 	void (*irq_config_func)(struct device *dev);
 #endif
@@ -29,7 +29,7 @@ struct uart_mcux_data {
 static int uart_mcux_poll_in(struct device *dev, unsigned char *c)
 {
 	const struct uart_mcux_config *config = dev->config->config_info;
-	uint32_t flags = UART_GetStatusFlags(config->base);
+	u32_t flags = UART_GetStatusFlags(config->base);
 	int ret = -1;
 
 	if (flags & kUART_RxDataRegFullFlag) {
@@ -55,7 +55,7 @@ static unsigned char uart_mcux_poll_out(struct device *dev, unsigned char c)
 static int uart_mcux_err_check(struct device *dev)
 {
 	const struct uart_mcux_config *config = dev->config->config_info;
-	uint32_t flags = UART_GetStatusFlags(config->base);
+	u32_t flags = UART_GetStatusFlags(config->base);
 	int err = 0;
 
 	if (flags & kUART_RxOverrunFlag) {
@@ -78,11 +78,11 @@ static int uart_mcux_err_check(struct device *dev)
 }
 
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
-static int uart_mcux_fifo_fill(struct device *dev, const uint8_t *tx_data,
+static int uart_mcux_fifo_fill(struct device *dev, const u8_t *tx_data,
 			       int len)
 {
 	const struct uart_mcux_config *config = dev->config->config_info;
-	uint8_t num_tx = 0;
+	u8_t num_tx = 0;
 
 	while ((len - num_tx > 0) &&
 	       (UART_GetStatusFlags(config->base) & kUART_TxDataRegEmptyFlag)) {
@@ -93,11 +93,11 @@ static int uart_mcux_fifo_fill(struct device *dev, const uint8_t *tx_data,
 	return num_tx;
 }
 
-static int uart_mcux_fifo_read(struct device *dev, uint8_t *rx_data,
+static int uart_mcux_fifo_read(struct device *dev, u8_t *rx_data,
 			       const int len)
 {
 	const struct uart_mcux_config *config = dev->config->config_info;
-	uint8_t num_rx = 0;
+	u8_t num_rx = 0;
 
 	while ((len - num_rx > 0) &&
 	       (UART_GetStatusFlags(config->base) & kUART_RxDataRegFullFlag)) {
@@ -111,7 +111,7 @@ static int uart_mcux_fifo_read(struct device *dev, uint8_t *rx_data,
 static void uart_mcux_irq_tx_enable(struct device *dev)
 {
 	const struct uart_mcux_config *config = dev->config->config_info;
-	uint32_t mask = kUART_TxDataRegEmptyInterruptEnable;
+	u32_t mask = kUART_TxDataRegEmptyInterruptEnable;
 
 	UART_EnableInterrupts(config->base, mask);
 }
@@ -119,7 +119,7 @@ static void uart_mcux_irq_tx_enable(struct device *dev)
 static void uart_mcux_irq_tx_disable(struct device *dev)
 {
 	const struct uart_mcux_config *config = dev->config->config_info;
-	uint32_t mask = kUART_TxDataRegEmptyInterruptEnable;
+	u32_t mask = kUART_TxDataRegEmptyInterruptEnable;
 
 	UART_DisableInterrupts(config->base, mask);
 }
@@ -127,7 +127,7 @@ static void uart_mcux_irq_tx_disable(struct device *dev)
 static int uart_mcux_irq_tx_empty(struct device *dev)
 {
 	const struct uart_mcux_config *config = dev->config->config_info;
-	uint32_t flags = UART_GetStatusFlags(config->base);
+	u32_t flags = UART_GetStatusFlags(config->base);
 
 	return (flags & kUART_TxDataRegEmptyFlag) != 0;
 }
@@ -135,7 +135,7 @@ static int uart_mcux_irq_tx_empty(struct device *dev)
 static int uart_mcux_irq_tx_ready(struct device *dev)
 {
 	const struct uart_mcux_config *config = dev->config->config_info;
-	uint32_t mask = kUART_TxDataRegEmptyInterruptEnable;
+	u32_t mask = kUART_TxDataRegEmptyInterruptEnable;
 
 	return (UART_GetEnabledInterrupts(config->base) & mask)
 		&& uart_mcux_irq_tx_empty(dev);
@@ -144,7 +144,7 @@ static int uart_mcux_irq_tx_ready(struct device *dev)
 static void uart_mcux_irq_rx_enable(struct device *dev)
 {
 	const struct uart_mcux_config *config = dev->config->config_info;
-	uint32_t mask = kUART_RxDataRegFullInterruptEnable;
+	u32_t mask = kUART_RxDataRegFullInterruptEnable;
 
 	UART_EnableInterrupts(config->base, mask);
 }
@@ -152,7 +152,7 @@ static void uart_mcux_irq_rx_enable(struct device *dev)
 static void uart_mcux_irq_rx_disable(struct device *dev)
 {
 	const struct uart_mcux_config *config = dev->config->config_info;
-	uint32_t mask = kUART_RxDataRegFullInterruptEnable;
+	u32_t mask = kUART_RxDataRegFullInterruptEnable;
 
 	UART_DisableInterrupts(config->base, mask);
 }
@@ -160,7 +160,7 @@ static void uart_mcux_irq_rx_disable(struct device *dev)
 static int uart_mcux_irq_rx_full(struct device *dev)
 {
 	const struct uart_mcux_config *config = dev->config->config_info;
-	uint32_t flags = UART_GetStatusFlags(config->base);
+	u32_t flags = UART_GetStatusFlags(config->base);
 
 	return (flags & kUART_RxDataRegFullFlag) != 0;
 }
@@ -168,7 +168,7 @@ static int uart_mcux_irq_rx_full(struct device *dev)
 static int uart_mcux_irq_rx_ready(struct device *dev)
 {
 	const struct uart_mcux_config *config = dev->config->config_info;
-	uint32_t mask = kUART_RxDataRegFullInterruptEnable;
+	u32_t mask = kUART_RxDataRegFullInterruptEnable;
 
 	return (UART_GetEnabledInterrupts(config->base) & mask)
 		&& uart_mcux_irq_rx_full(dev);
@@ -177,7 +177,7 @@ static int uart_mcux_irq_rx_ready(struct device *dev)
 static void uart_mcux_irq_err_enable(struct device *dev)
 {
 	const struct uart_mcux_config *config = dev->config->config_info;
-	uint32_t mask = kUART_NoiseErrorInterruptEnable |
+	u32_t mask = kUART_NoiseErrorInterruptEnable |
 			kUART_FramingErrorInterruptEnable |
 			kUART_ParityErrorInterruptEnable;
 
@@ -187,7 +187,7 @@ static void uart_mcux_irq_err_enable(struct device *dev)
 static void uart_mcux_irq_err_disable(struct device *dev)
 {
 	const struct uart_mcux_config *config = dev->config->config_info;
-	uint32_t mask = kUART_NoiseErrorInterruptEnable |
+	u32_t mask = kUART_NoiseErrorInterruptEnable |
 			kUART_FramingErrorInterruptEnable |
 			kUART_ParityErrorInterruptEnable;
 
@@ -227,7 +227,7 @@ static int uart_mcux_init(struct device *dev)
 {
 	const struct uart_mcux_config *config = dev->config->config_info;
 	uart_config_t uart_config;
-	uint32_t clock_freq;
+	u32_t clock_freq;
 
 	clock_freq = CLOCK_GetFreq(config->clock_source);
 
diff --git a/drivers/serial/uart_mcux_lpuart.c b/drivers/serial/uart_mcux_lpuart.c
index 133c22f6bd9..fa50fc27adf 100644
--- a/drivers/serial/uart_mcux_lpuart.c
+++ b/drivers/serial/uart_mcux_lpuart.c
@@ -14,7 +14,7 @@
 struct mcux_lpuart_config {
 	LPUART_Type *base;
 	clock_name_t clock_source;
-	uint32_t baud_rate;
+	u32_t baud_rate;
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
 	void (*irq_config_func)(struct device *dev);
 #endif
@@ -29,7 +29,7 @@ struct mcux_lpuart_data {
 static int mcux_lpuart_poll_in(struct device *dev, unsigned char *c)
 {
 	const struct mcux_lpuart_config *config = dev->config->config_info;
-	uint32_t flags = LPUART_GetStatusFlags(config->base);
+	u32_t flags = LPUART_GetStatusFlags(config->base);
 	int ret = -1;
 
 	if (flags & kLPUART_RxDataRegFullFlag) {
@@ -56,7 +56,7 @@ static unsigned char mcux_lpuart_poll_out(struct device *dev, unsigned char c)
 static int mcux_lpuart_err_check(struct device *dev)
 {
 	const struct mcux_lpuart_config *config = dev->config->config_info;
-	uint32_t flags = LPUART_GetStatusFlags(config->base);
+	u32_t flags = LPUART_GetStatusFlags(config->base);
 	int err = 0;
 
 	if (flags & kLPUART_RxOverrunFlag) {
@@ -79,11 +79,11 @@ static int mcux_lpuart_err_check(struct device *dev)
 }
 
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
-static int mcux_lpuart_fifo_fill(struct device *dev, const uint8_t *tx_data,
+static int mcux_lpuart_fifo_fill(struct device *dev, const u8_t *tx_data,
 			       int len)
 {
 	const struct mcux_lpuart_config *config = dev->config->config_info;
-	uint8_t num_tx = 0;
+	u8_t num_tx = 0;
 
 	while ((len - num_tx > 0) &&
 	       (LPUART_GetStatusFlags(config->base)
@@ -95,11 +95,11 @@ static int mcux_lpuart_fifo_fill(struct device *dev, const uint8_t *tx_data,
 	return num_tx;
 }
 
-static int mcux_lpuart_fifo_read(struct device *dev, uint8_t *rx_data,
+static int mcux_lpuart_fifo_read(struct device *dev, u8_t *rx_data,
 			       const int len)
 {
 	const struct mcux_lpuart_config *config = dev->config->config_info;
-	uint8_t num_rx = 0;
+	u8_t num_rx = 0;
 
 	while ((len - num_rx > 0) &&
 	       (LPUART_GetStatusFlags(config->base)
@@ -114,7 +114,7 @@ static int mcux_lpuart_fifo_read(struct device *dev, uint8_t *rx_data,
 static void mcux_lpuart_irq_tx_enable(struct device *dev)
 {
 	const struct mcux_lpuart_config *config = dev->config->config_info;
-	uint32_t mask = kLPUART_TxDataRegEmptyInterruptEnable;
+	u32_t mask = kLPUART_TxDataRegEmptyInterruptEnable;
 
 	LPUART_EnableInterrupts(config->base, mask);
 }
@@ -122,7 +122,7 @@ static void mcux_lpuart_irq_tx_enable(struct device *dev)
 static void mcux_lpuart_irq_tx_disable(struct device *dev)
 {
 	const struct mcux_lpuart_config *config = dev->config->config_info;
-	uint32_t mask = kLPUART_TxDataRegEmptyInterruptEnable;
+	u32_t mask = kLPUART_TxDataRegEmptyInterruptEnable;
 
 	LPUART_DisableInterrupts(config->base, mask);
 }
@@ -130,7 +130,7 @@ static void mcux_lpuart_irq_tx_disable(struct device *dev)
 static int mcux_lpuart_irq_tx_empty(struct device *dev)
 {
 	const struct mcux_lpuart_config *config = dev->config->config_info;
-	uint32_t flags = LPUART_GetStatusFlags(config->base);
+	u32_t flags = LPUART_GetStatusFlags(config->base);
 
 	return (flags & kLPUART_TxDataRegEmptyFlag) != 0;
 }
@@ -138,7 +138,7 @@ static int mcux_lpuart_irq_tx_empty(struct device *dev)
 static int mcux_lpuart_irq_tx_ready(struct device *dev)
 {
 	const struct mcux_lpuart_config *config = dev->config->config_info;
-	uint32_t mask = kLPUART_TxDataRegEmptyInterruptEnable;
+	u32_t mask = kLPUART_TxDataRegEmptyInterruptEnable;
 
 	return (LPUART_GetEnabledInterrupts(config->base) & mask)
 		&& mcux_lpuart_irq_tx_empty(dev);
@@ -147,7 +147,7 @@ static int mcux_lpuart_irq_tx_ready(struct device *dev)
 static void mcux_lpuart_irq_rx_enable(struct device *dev)
 {
 	const struct mcux_lpuart_config *config = dev->config->config_info;
-	uint32_t mask = kLPUART_RxDataRegFullInterruptEnable;
+	u32_t mask = kLPUART_RxDataRegFullInterruptEnable;
 
 	LPUART_EnableInterrupts(config->base, mask);
 }
@@ -155,7 +155,7 @@ static void mcux_lpuart_irq_rx_enable(struct device *dev)
 static void mcux_lpuart_irq_rx_disable(struct device *dev)
 {
 	const struct mcux_lpuart_config *config = dev->config->config_info;
-	uint32_t mask = kLPUART_RxDataRegFullInterruptEnable;
+	u32_t mask = kLPUART_RxDataRegFullInterruptEnable;
 
 	LPUART_DisableInterrupts(config->base, mask);
 }
@@ -163,7 +163,7 @@ static void mcux_lpuart_irq_rx_disable(struct device *dev)
 static int mcux_lpuart_irq_rx_full(struct device *dev)
 {
 	const struct mcux_lpuart_config *config = dev->config->config_info;
-	uint32_t flags = LPUART_GetStatusFlags(config->base);
+	u32_t flags = LPUART_GetStatusFlags(config->base);
 
 	return (flags & kLPUART_RxDataRegFullFlag) != 0;
 }
@@ -171,7 +171,7 @@ static int mcux_lpuart_irq_rx_full(struct device *dev)
 static int mcux_lpuart_irq_rx_ready(struct device *dev)
 {
 	const struct mcux_lpuart_config *config = dev->config->config_info;
-	uint32_t mask = kLPUART_RxDataRegFullInterruptEnable;
+	u32_t mask = kLPUART_RxDataRegFullInterruptEnable;
 
 	return (LPUART_GetEnabledInterrupts(config->base) & mask)
 		&& mcux_lpuart_irq_rx_full(dev);
@@ -180,7 +180,7 @@ static int mcux_lpuart_irq_rx_ready(struct device *dev)
 static void mcux_lpuart_irq_err_enable(struct device *dev)
 {
 	const struct mcux_lpuart_config *config = dev->config->config_info;
-	uint32_t mask = kLPUART_NoiseErrorInterruptEnable |
+	u32_t mask = kLPUART_NoiseErrorInterruptEnable |
 			kLPUART_FramingErrorInterruptEnable |
 			kLPUART_ParityErrorInterruptEnable;
 
@@ -190,7 +190,7 @@ static void mcux_lpuart_irq_err_enable(struct device *dev)
 static void mcux_lpuart_irq_err_disable(struct device *dev)
 {
 	const struct mcux_lpuart_config *config = dev->config->config_info;
-	uint32_t mask = kLPUART_NoiseErrorInterruptEnable |
+	u32_t mask = kLPUART_NoiseErrorInterruptEnable |
 			kLPUART_FramingErrorInterruptEnable |
 			kLPUART_ParityErrorInterruptEnable;
 
@@ -231,7 +231,7 @@ static int mcux_lpuart_init(struct device *dev)
 {
 	const struct mcux_lpuart_config *config = dev->config->config_info;
 	lpuart_config_t uart_config;
-	uint32_t clock_freq;
+	u32_t clock_freq;
 
 	clock_freq = CLOCK_GetFreq(config->clock_source);
 
diff --git a/drivers/serial/uart_nrf5.c b/drivers/serial/uart_nrf5.c
index a458ed98657..03444ed8786 100644
--- a/drivers/serial/uart_nrf5.c
+++ b/drivers/serial/uart_nrf5.c
@@ -35,51 +35,51 @@
 
 /* UART structure for nRF5X. More detailed description of each register can be found in nrf5X.h */
 struct _uart {
-	__O uint32_t  TASKS_STARTRX;
-	__O uint32_t  TASKS_STOPRX;
-	__O uint32_t  TASKS_STARTTX;
-	__O uint32_t  TASKS_STOPTX;
+	__O u32_t  TASKS_STARTRX;
+	__O u32_t  TASKS_STOPRX;
+	__O u32_t  TASKS_STARTTX;
+	__O u32_t  TASKS_STOPTX;
 
-	__I uint32_t  RESERVED0[3];
-	__O uint32_t  TASKS_SUSPEND;
+	__I u32_t  RESERVED0[3];
+	__O u32_t  TASKS_SUSPEND;
 
-	__I uint32_t  RESERVED1[56];
-	__IO uint32_t EVENTS_CTS;
-	__IO uint32_t EVENTS_NCTS;
-	__IO uint32_t EVENTS_RXDRDY;
+	__I u32_t  RESERVED1[56];
+	__IO u32_t EVENTS_CTS;
+	__IO u32_t EVENTS_NCTS;
+	__IO u32_t EVENTS_RXDRDY;
 
-	__I uint32_t  RESERVED2[4];
-	__IO uint32_t EVENTS_TXDRDY;
+	__I u32_t  RESERVED2[4];
+	__IO u32_t EVENTS_TXDRDY;
 
-	__I uint32_t  RESERVED3;
-	__IO uint32_t EVENTS_ERROR;
-	__I uint32_t  RESERVED4[7];
-	__IO uint32_t EVENTS_RXTO;
-	__I uint32_t  RESERVED5[46];
-	__IO uint32_t SHORTS;
-	__I uint32_t  RESERVED6[64];
-	__IO uint32_t INTENSET;
-	__IO uint32_t INTENCLR;
-	__I uint32_t  RESERVED7[93];
-	__IO uint32_t ERRORSRC;
-	__I uint32_t  RESERVED8[31];
-	__IO uint32_t ENABLE;
-	__I uint32_t  RESERVED9;
-	__IO uint32_t PSELRTS;
-	__IO uint32_t PSELTXD;
-	__IO uint32_t PSELCTS;
-	__IO uint32_t PSELRXD;
-	__I uint32_t  RXD;
-	__O uint32_t  TXD;
-	__I uint32_t  RESERVED10;
-	__IO uint32_t BAUDRATE;
-	__I uint32_t  RESERVED11[17];
-	__IO uint32_t CONFIG;
+	__I u32_t  RESERVED3;
+	__IO u32_t EVENTS_ERROR;
+	__I u32_t  RESERVED4[7];
+	__IO u32_t EVENTS_RXTO;
+	__I u32_t  RESERVED5[46];
+	__IO u32_t SHORTS;
+	__I u32_t  RESERVED6[64];
+	__IO u32_t INTENSET;
+	__IO u32_t INTENCLR;
+	__I u32_t  RESERVED7[93];
+	__IO u32_t ERRORSRC;
+	__I u32_t  RESERVED8[31];
+	__IO u32_t ENABLE;
+	__I u32_t  RESERVED9;
+	__IO u32_t PSELRTS;
+	__IO u32_t PSELTXD;
+	__IO u32_t PSELCTS;
+	__IO u32_t PSELRXD;
+	__I u32_t  RXD;
+	__O u32_t  TXD;
+	__I u32_t  RESERVED10;
+	__IO u32_t BAUDRATE;
+	__I u32_t  RESERVED11[17];
+	__IO u32_t CONFIG;
 };
 
 /* Device data structure */
 struct uart_nrf5_dev_data_t {
-	uint32_t baud_rate;	        /**< Baud rate */
+	u32_t baud_rate;	        /**< Baud rate */
 
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
 	uart_irq_callback_t     cb;     /**< Callback function pointer */
@@ -113,11 +113,11 @@ static const struct uart_driver_api uart_nrf5_driver_api;
  */
 
 static int baudrate_set(struct device *dev,
-			 uint32_t baudrate, uint32_t sys_clk_freq_hz)
+			 u32_t baudrate, u32_t sys_clk_freq_hz)
 {
 	volatile struct _uart *uart = UART_STRUCT(dev);
 
-	uint32_t divisor; /* baud rate divisor */
+	u32_t divisor; /* baud rate divisor */
 
 	/* Use the common nRF5 macros */
 	switch (baudrate) {
@@ -291,7 +291,7 @@ static unsigned char uart_nrf5_poll_out(struct device *dev,
 	volatile struct _uart *uart = UART_STRUCT(dev);
 
 	/* send a character */
-	uart->TXD = (uint8_t)c;
+	uart->TXD = (u8_t)c;
 
 	/* Wait for transmitter to be ready */
 	while (!uart->EVENTS_TXDRDY) {
@@ -306,7 +306,7 @@ static unsigned char uart_nrf5_poll_out(struct device *dev,
 static int uart_nrf5_err_check(struct device *dev)
 {
 	volatile struct _uart *uart = UART_STRUCT(dev);
-	uint32_t error = 0;
+	u32_t error = 0;
 
 	if (uart->EVENTS_ERROR) {
 		/* register bitfields maps to the defines in uart.h */
@@ -324,34 +324,34 @@ static int uart_nrf5_err_check(struct device *dev)
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
 
 /** Interrupt driven FIFO fill function */
-static int uart_nrf5_fifo_fill(struct device *dev, const uint8_t *tx_data, int len)
+static int uart_nrf5_fifo_fill(struct device *dev, const u8_t *tx_data, int len)
 {
 	volatile struct _uart *uart = UART_STRUCT(dev);
-	uint8_t num_tx = 0;
+	u8_t num_tx = 0;
 
 	while ((len - num_tx > 0) && uart->EVENTS_TXDRDY) {
 		/* Clear the interrupt */
 		uart->EVENTS_TXDRDY = 0;
 
 		/* Send a character */
-		uart->TXD = (uint8_t)tx_data[num_tx++];
+		uart->TXD = (u8_t)tx_data[num_tx++];
 	}
 
 	return (int)num_tx;
 }
 
 /** Interrupt driven FIFO read function */
-static int uart_nrf5_fifo_read(struct device *dev, uint8_t *rx_data, const int size)
+static int uart_nrf5_fifo_read(struct device *dev, u8_t *rx_data, const int size)
 {
 	volatile struct _uart *uart = UART_STRUCT(dev);
-	uint8_t num_rx = 0;
+	u8_t num_rx = 0;
 
 	while ((size - num_rx > 0) && uart->EVENTS_RXDRDY) {
 		/* Clear the interrupt */
 		uart->EVENTS_RXDRDY = 0;
 
 		/* Receive a character */
-		rx_data[num_rx++] = (uint8_t)uart->RXD;
+		rx_data[num_rx++] = (u8_t)uart->RXD;
 	}
 
 	return num_rx;
@@ -497,7 +497,7 @@ static void uart_nrf5_irq_config(struct device *port);
 #endif /* CONFIG_UART_INTERRUPT_DRIVEN */
 
 static const struct uart_device_config uart_nrf5_dev_cfg_0 = {
-	.base = (uint8_t *)NRF_UART0_BASE,
+	.base = (u8_t *)NRF_UART0_BASE,
 	.sys_clk_freq = CONFIG_UART_NRF5_CLK_FREQ,
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
 	.irq_config_func = uart_nrf5_irq_config,
diff --git a/drivers/serial/uart_ns16550.c b/drivers/serial/uart_ns16550.c
index 25a1f870028..66af0ea2658 100644
--- a/drivers/serial/uart_ns16550.c
+++ b/drivers/serial/uart_ns16550.c
@@ -202,7 +202,7 @@
 
 
 struct uart_ns16550_device_config {
-	uint32_t sys_clk_freq;
+	u32_t sys_clk_freq;
 
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
 	uart_irq_config_func_t	irq_config_func;
@@ -211,28 +211,28 @@ struct uart_ns16550_device_config {
 
 /** Device data structure */
 struct uart_ns16550_dev_data_t {
-	uint32_t port;
-	uint32_t baud_rate;	/**< Baud rate */
-	uint8_t options;	/**< Serial port options */
+	u32_t port;
+	u32_t baud_rate;	/**< Baud rate */
+	u8_t options;	/**< Serial port options */
 
 #ifdef CONFIG_PCI
 	struct pci_dev_info  pci_dev;
 #endif /* CONFIG_PCI */
 
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
-	uint8_t iir_cache;	/**< cache of IIR since it clears when read */
+	u8_t iir_cache;	/**< cache of IIR since it clears when read */
 	uart_irq_callback_t	cb;	/**< Callback function pointer */
 #endif
 
 #ifdef CONFIG_UART_NS16550_DLF
-	uint8_t dlf;		/**< DLF value */
+	u8_t dlf;		/**< DLF value */
 #endif
 };
 
 static const struct uart_driver_api uart_ns16550_driver_api;
 
 #ifdef CONFIG_UART_NS16550_DLF
-static inline void set_dlf(struct device *dev, uint32_t val)
+static inline void set_dlf(struct device *dev, u32_t val)
 {
 	struct uart_ns16550_dev_data_t * const dev_data = DEV_DATA(dev);
 
@@ -241,12 +241,12 @@ static inline void set_dlf(struct device *dev, uint32_t val)
 }
 #endif
 
-static void set_baud_rate(struct device *dev, uint32_t baud_rate)
+static void set_baud_rate(struct device *dev, u32_t baud_rate)
 {
 	const struct uart_ns16550_device_config * const dev_cfg = DEV_CFG(dev);
 	struct uart_ns16550_dev_data_t * const dev_data = DEV_DATA(dev);
-	uint32_t divisor; /* baud rate divisor */
-	uint8_t lcr_cache;
+	u32_t divisor; /* baud rate divisor */
+	u8_t lcr_cache;
 
 	if ((baud_rate != 0) && (dev_cfg->sys_clk_freq != 0)) {
 		/* calculate baud rate divisor */
@@ -309,7 +309,7 @@ static int uart_ns16550_init(struct device *dev)
 	struct uart_ns16550_dev_data_t * const dev_data = DEV_DATA(dev);
 
 	int old_level;     /* old interrupt lock level */
-	uint8_t mdc = 0;
+	u8_t mdc = 0;
 
 	if (!ns16550_pci_uart_scan(dev)) {
 		dev->driver_api = NULL;
@@ -433,7 +433,7 @@ static int uart_ns16550_err_check(struct device *dev)
  *
  * @return Number of bytes sent
  */
-static int uart_ns16550_fifo_fill(struct device *dev, const uint8_t *tx_data,
+static int uart_ns16550_fifo_fill(struct device *dev, const u8_t *tx_data,
 				  int size)
 {
 	int i;
@@ -453,7 +453,7 @@ static int uart_ns16550_fifo_fill(struct device *dev, const uint8_t *tx_data,
  *
  * @return Number of bytes read
  */
-static int uart_ns16550_fifo_read(struct device *dev, uint8_t *rx_data,
+static int uart_ns16550_fifo_read(struct device *dev, u8_t *rx_data,
 				  const int size)
 {
 	int i;
@@ -648,9 +648,9 @@ static void uart_ns16550_isr(void *arg)
  * @return 0 if successful, failed otherwise
  */
 static int uart_ns16550_line_ctrl_set(struct device *dev,
-				      uint32_t ctrl, uint32_t val)
+				      u32_t ctrl, u32_t val)
 {
-	uint32_t mdc, chg;
+	u32_t mdc, chg;
 
 	switch (ctrl) {
 	case LINE_CTRL_BAUD_RATE:
@@ -692,7 +692,7 @@ static int uart_ns16550_line_ctrl_set(struct device *dev,
  *
  * @return 0 if successful, failed otherwise
  */
-static int uart_ns16550_drv_cmd(struct device *dev, uint32_t cmd, uint32_t p)
+static int uart_ns16550_drv_cmd(struct device *dev, u32_t cmd, u32_t p)
 {
 	switch (cmd) {
 
diff --git a/drivers/serial/uart_qmsi.c b/drivers/serial/uart_qmsi.c
index 82ebbacb3c9..493a7228100 100644
--- a/drivers/serial/uart_qmsi.c
+++ b/drivers/serial/uart_qmsi.c
@@ -33,7 +33,7 @@
 struct uart_qmsi_config_info {
 	qm_uart_t instance;
 	clk_periph_t clock_gate;
-	uint32_t baud_divisor;
+	u32_t baud_divisor;
 	bool hw_fc;
 
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
@@ -47,26 +47,26 @@ static int uart_qmsi_init(struct device *dev);
 #ifndef CONFIG_DEVICE_POWER_MANAGEMENT
 struct uart_qmsi_drv_data {
 	uart_irq_callback_t user_cb;
-	uint8_t iir_cache;
+	u8_t iir_cache;
 };
 
 #define uart_qmsi_set_power_state(...)
 #else
 struct uart_qmsi_drv_data {
 	uart_irq_callback_t user_cb;
-	uint8_t iir_cache;
-	uint32_t device_power_state;
+	u8_t iir_cache;
+	u32_t device_power_state;
 	qm_uart_context_t ctx;
 };
 
-static void uart_qmsi_set_power_state(struct device *dev, uint32_t power_state)
+static void uart_qmsi_set_power_state(struct device *dev, u32_t power_state)
 {
 	struct uart_qmsi_drv_data *context = dev->driver_data;
 
 	context->device_power_state = power_state;
 }
 
-static uint32_t uart_qmsi_get_power_state(struct device *dev)
+static u32_t uart_qmsi_get_power_state(struct device *dev)
 {
 	struct uart_qmsi_drv_data *context = dev->driver_data;
 
@@ -107,17 +107,17 @@ static int uart_resume_device_from_suspend(struct device *dev)
 * Implements the driver control management functionality
 * the *context may include IN data or/and OUT data
 */
-static int uart_qmsi_device_ctrl(struct device *dev, uint32_t ctrl_command,
+static int uart_qmsi_device_ctrl(struct device *dev, u32_t ctrl_command,
 				 void *context)
 {
 	if (ctrl_command == DEVICE_PM_SET_POWER_STATE) {
-		if (*((uint32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
+		if (*((u32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
 			return uart_suspend_device(dev);
-		} else if (*((uint32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
+		} else if (*((u32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
 			return uart_resume_device_from_suspend(dev);
 		}
 	} else if (ctrl_command == DEVICE_PM_GET_POWER_STATE) {
-		*((uint32_t *)context) = uart_qmsi_get_power_state(dev);
+		*((u32_t *)context) = uart_qmsi_get_power_state(dev);
 		return 0;
 	}
 
@@ -228,7 +228,7 @@ static bool is_tx_fifo_full(qm_uart_t instance)
 	return !!(QM_UART[instance]->lsr & QM_UART_LSR_THRE);
 }
 
-static int uart_qmsi_fifo_fill(struct device *dev, const uint8_t *tx_data,
+static int uart_qmsi_fifo_fill(struct device *dev, const u8_t *tx_data,
 				  int size)
 {
 	qm_uart_t instance = GET_CONTROLLER_INSTANCE(dev);
@@ -248,7 +248,7 @@ static bool is_data_ready(qm_uart_t instance)
 	return QM_UART[instance]->lsr & QM_UART_LSR_DR;
 }
 
-static int uart_qmsi_fifo_read(struct device *dev, uint8_t *rx_data,
+static int uart_qmsi_fifo_read(struct device *dev, u8_t *rx_data,
 				  const int size)
 {
 	qm_uart_t instance = GET_CONTROLLER_INSTANCE(dev);
@@ -280,7 +280,7 @@ static void uart_qmsi_irq_tx_disable(struct device *dev)
 static int uart_qmsi_irq_tx_ready(struct device *dev)
 {
 	struct uart_qmsi_drv_data *drv_data = dev->driver_data;
-	uint32_t id = (drv_data->iir_cache & QM_UART_IIR_IID_MASK);
+	u32_t id = (drv_data->iir_cache & QM_UART_IIR_IID_MASK);
 
 	return id == QM_UART_IIR_THR_EMPTY;
 }
@@ -288,7 +288,7 @@ static int uart_qmsi_irq_tx_ready(struct device *dev)
 static int uart_qmsi_irq_tx_empty(struct device *dev)
 {
 	qm_uart_t instance = GET_CONTROLLER_INSTANCE(dev);
-	const uint32_t mask = (QM_UART_LSR_TEMT | QM_UART_LSR_THRE);
+	const u32_t mask = (QM_UART_LSR_TEMT | QM_UART_LSR_THRE);
 
 	return (QM_UART[instance]->lsr & mask) == mask;
 }
@@ -310,7 +310,7 @@ static void uart_qmsi_irq_rx_disable(struct device *dev)
 static int uart_qmsi_irq_rx_ready(struct device *dev)
 {
 	struct uart_qmsi_drv_data *drv_data = dev->driver_data;
-	uint32_t id = (drv_data->iir_cache & QM_UART_IIR_IID_MASK);
+	u32_t id = (drv_data->iir_cache & QM_UART_IIR_IID_MASK);
 
 	return (id == QM_UART_IIR_RECV_DATA_AVAIL) ||
 	       (id == QM_UART_IIR_CHAR_TIMEOUT);
@@ -333,7 +333,7 @@ static void uart_qmsi_irq_err_disable(struct device *dev)
 static int uart_qmsi_irq_is_pending(struct device *dev)
 {
 	struct uart_qmsi_drv_data *drv_data = dev->driver_data;
-	uint32_t id = (drv_data->iir_cache & QM_UART_IIR_IID_MASK);
+	u32_t id = (drv_data->iir_cache & QM_UART_IIR_IID_MASK);
 
 	return !(id == IIR_IID_NO_INTERRUPT_PENDING);
 }
@@ -394,7 +394,7 @@ static void irq_config_func_1(struct device *dev)
 #endif /* CONFIG_UART_INTERRUPT_DRIVEN */
 
 #ifdef CONFIG_UART_LINE_CTRL
-static int uart_qmsi_line_ctrl_set(struct device *dev, uint32_t ctrl, uint32_t val)
+static int uart_qmsi_line_ctrl_set(struct device *dev, u32_t ctrl, u32_t val)
 {
 	qm_uart_t instance = GET_CONTROLLER_INSTANCE(dev);
 	qm_uart_config_t cfg;
@@ -416,7 +416,7 @@ static int uart_qmsi_line_ctrl_set(struct device *dev, uint32_t ctrl, uint32_t v
 #endif /* CONFIG_UART_LINE_CTRL */
 
 #ifdef CONFIG_UART_DRV_CMD
-static int uart_qmsi_drv_cmd(struct device *dev, uint32_t cmd, uint32_t p)
+static int uart_qmsi_drv_cmd(struct device *dev, u32_t cmd, u32_t p)
 {
 	return -ENODEV;
 }
diff --git a/drivers/serial/uart_sam.c b/drivers/serial/uart_sam.c
index d6c7811136a..d266ba2784e 100644
--- a/drivers/serial/uart_sam.c
+++ b/drivers/serial/uart_sam.c
@@ -65,14 +65,14 @@
 /* Device constant configuration parameters */
 struct uart_sam_dev_cfg {
 	Uart *regs;
-	uint32_t periph_id;
+	u32_t periph_id;
 	struct soc_gpio_pin pin_rx;
 	struct soc_gpio_pin pin_tx;
 };
 
 /* Device run time data */
 struct uart_sam_dev_data {
-	uint32_t baud_rate;
+	u32_t baud_rate;
 };
 
 #define DEV_CFG(dev) \
@@ -81,8 +81,8 @@ struct uart_sam_dev_data {
 	((struct uart_sam_dev_data *const)(dev)->driver_data)
 
 
-static int baudrate_set(Uart *const uart, uint32_t baudrate,
-			uint32_t mck_freq_hz);
+static int baudrate_set(Uart *const uart, u32_t baudrate,
+			u32_t mck_freq_hz);
 
 
 static int uart_sam_init(struct device *dev)
@@ -148,14 +148,14 @@ static unsigned char uart_sam_poll_out(struct device *dev, unsigned char c)
 		;
 
 	/* send a character */
-	uart->UART_THR = (uint32_t)c;
+	uart->UART_THR = (u32_t)c;
 	return c;
 }
 
-static int baudrate_set(Uart *const uart, uint32_t baudrate,
-			uint32_t mck_freq_hz)
+static int baudrate_set(Uart *const uart, u32_t baudrate,
+			u32_t mck_freq_hz)
 {
-	uint32_t divisor;
+	u32_t divisor;
 
 	__ASSERT(baudrate,
 		 "baud rate has to be bigger than 0");
diff --git a/drivers/serial/uart_stellaris.c b/drivers/serial/uart_stellaris.c
index 0572255da3a..0ac815a674b 100644
--- a/drivers/serial/uart_stellaris.c
+++ b/drivers/serial/uart_stellaris.c
@@ -30,44 +30,44 @@
 
 /* Stellaris UART module */
 struct _uart {
-	uint32_t dr;
+	u32_t dr;
 	union {
-		uint32_t _sr;
-		uint32_t _cr;
+		u32_t _sr;
+		u32_t _cr;
 	} u1;
-	uint8_t _res1[0x010];
-	uint32_t fr;
-	uint8_t _res2[0x04];
-	uint32_t ilpr;
-	uint32_t ibrd;
-	uint32_t fbrd;
-	uint32_t lcrh;
-	uint32_t ctl;
-	uint32_t ifls;
-	uint32_t im;
-	uint32_t ris;
-	uint32_t mis;
-	uint32_t icr;
-	uint8_t _res3[0xf8c];
+	u8_t _res1[0x010];
+	u32_t fr;
+	u8_t _res2[0x04];
+	u32_t ilpr;
+	u32_t ibrd;
+	u32_t fbrd;
+	u32_t lcrh;
+	u32_t ctl;
+	u32_t ifls;
+	u32_t im;
+	u32_t ris;
+	u32_t mis;
+	u32_t icr;
+	u8_t _res3[0xf8c];
 
-	uint32_t peripd_id4;
-	uint32_t peripd_id5;
-	uint32_t peripd_id6;
-	uint32_t peripd_id7;
-	uint32_t peripd_id0;
-	uint32_t peripd_id1;
-	uint32_t peripd_id2;
-	uint32_t peripd_id3;
+	u32_t peripd_id4;
+	u32_t peripd_id5;
+	u32_t peripd_id6;
+	u32_t peripd_id7;
+	u32_t peripd_id0;
+	u32_t peripd_id1;
+	u32_t peripd_id2;
+	u32_t peripd_id3;
 
-	uint32_t p_cell_id0;
-	uint32_t p_cell_id1;
-	uint32_t p_cell_id2;
-	uint32_t p_cell_id3;
+	u32_t p_cell_id0;
+	u32_t p_cell_id1;
+	u32_t p_cell_id2;
+	u32_t p_cell_id3;
 };
 
 /* Device data structure */
 struct uart_stellaris_dev_data_t {
-	uint32_t baud_rate;	/* Baud rate */
+	u32_t baud_rate;	/* Baud rate */
 
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
 	uart_irq_callback_t	cb;	/**< Callback function pointer */
@@ -84,34 +84,34 @@ struct uart_stellaris_dev_data_t {
 	((volatile struct _uart *)(DEV_CFG(dev))->base)
 
 /* registers */
-#define UARTDR(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x000)))
-#define UARTSR(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x004)))
-#define UARTCR(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x004)))
-#define UARTFR(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x018)))
-#define UARTILPR(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x020)))
-#define UARTIBRD(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x024)))
-#define UARTFBRD(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x028)))
-#define UARTLCRH(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x02C)))
-#define UARTCTL(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x030)))
-#define UARTIFLS(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x034)))
-#define UARTIM(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x038)))
-#define UARTRIS(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x03C)))
-#define UARTMIS(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x040)))
-#define UARTICR(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0x044)))
+#define UARTDR(dev) (*((volatile u32_t *)(DEV_CFG(dev)->base + 0x000)))
+#define UARTSR(dev) (*((volatile u32_t *)(DEV_CFG(dev)->base + 0x004)))
+#define UARTCR(dev) (*((volatile u32_t *)(DEV_CFG(dev)->base + 0x004)))
+#define UARTFR(dev) (*((volatile u32_t *)(DEV_CFG(dev)->base + 0x018)))
+#define UARTILPR(dev) (*((volatile u32_t *)(DEV_CFG(dev)->base + 0x020)))
+#define UARTIBRD(dev) (*((volatile u32_t *)(DEV_CFG(dev)->base + 0x024)))
+#define UARTFBRD(dev) (*((volatile u32_t *)(DEV_CFG(dev)->base + 0x028)))
+#define UARTLCRH(dev) (*((volatile u32_t *)(DEV_CFG(dev)->base + 0x02C)))
+#define UARTCTL(dev) (*((volatile u32_t *)(DEV_CFG(dev)->base + 0x030)))
+#define UARTIFLS(dev) (*((volatile u32_t *)(DEV_CFG(dev)->base + 0x034)))
+#define UARTIM(dev) (*((volatile u32_t *)(DEV_CFG(dev)->base + 0x038)))
+#define UARTRIS(dev) (*((volatile u32_t *)(DEV_CFG(dev)->base + 0x03C)))
+#define UARTMIS(dev) (*((volatile u32_t *)(DEV_CFG(dev)->base + 0x040)))
+#define UARTICR(dev) (*((volatile u32_t *)(DEV_CFG(dev)->base + 0x044)))
 
 /* ID registers: UARTPID = UARTPeriphID, UARTPCID = UARTPCellId */
-#define UARTPID4(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0xFD0)))
-#define UARTPID5(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0xFD4)))
-#define UARTPID6(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0xFD8)))
-#define UARTPID7(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0xFDC)))
-#define UARTPID0(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0xFE0)))
-#define UARTPID1(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0xFE4)))
-#define UARTPID2(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0xFE8)))
-#define UARTPID3(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0xFEC)))
-#define UARTPCID0(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0xFF0)))
-#define UARTPCID1(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0xFF4)))
-#define UARTPCID2(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0xFF8)))
-#define UARTPCID3(dev) (*((volatile uint32_t *)(DEV_CFG(dev)->base + 0xFFC)))
+#define UARTPID4(dev) (*((volatile u32_t *)(DEV_CFG(dev)->base + 0xFD0)))
+#define UARTPID5(dev) (*((volatile u32_t *)(DEV_CFG(dev)->base + 0xFD4)))
+#define UARTPID6(dev) (*((volatile u32_t *)(DEV_CFG(dev)->base + 0xFD8)))
+#define UARTPID7(dev) (*((volatile u32_t *)(DEV_CFG(dev)->base + 0xFDC)))
+#define UARTPID0(dev) (*((volatile u32_t *)(DEV_CFG(dev)->base + 0xFE0)))
+#define UARTPID1(dev) (*((volatile u32_t *)(DEV_CFG(dev)->base + 0xFE4)))
+#define UARTPID2(dev) (*((volatile u32_t *)(DEV_CFG(dev)->base + 0xFE8)))
+#define UARTPID3(dev) (*((volatile u32_t *)(DEV_CFG(dev)->base + 0xFEC)))
+#define UARTPCID0(dev) (*((volatile u32_t *)(DEV_CFG(dev)->base + 0xFF0)))
+#define UARTPCID1(dev) (*((volatile u32_t *)(DEV_CFG(dev)->base + 0xFF4)))
+#define UARTPCID2(dev) (*((volatile u32_t *)(DEV_CFG(dev)->base + 0xFF8)))
+#define UARTPCID3(dev) (*((volatile u32_t *)(DEV_CFG(dev)->base + 0xFFC)))
 
 /* muxed UART registers */
 #define sr u1._sr /* Read: receive status */
@@ -157,10 +157,10 @@ static const struct uart_driver_api uart_stellaris_driver_api;
  * @return N/A
  */
 static void baudrate_set(struct device *dev,
-			 uint32_t baudrate, uint32_t sys_clk_freq_hz)
+			 u32_t baudrate, u32_t sys_clk_freq_hz)
 {
 	volatile struct _uart *uart = UART_STRUCT(dev);
-	uint32_t brdi, brdf, div, rem;
+	u32_t brdi, brdf, div, rem;
 
 	/* upon reset, the system clock uses the intenal OSC @ 12MHz */
 
@@ -180,8 +180,8 @@ static void baudrate_set(struct device *dev,
 	 * those registers are 32-bit, but the reserved bits should be
 	 * preserved
 	 */
-	uart->ibrd = (uint16_t)(brdi & 0xffff); /* 16 bits */
-	uart->fbrd = (uint8_t)(brdf & 0x3f);    /* 6 bits */
+	uart->ibrd = (u16_t)(brdi & 0xffff); /* 16 bits */
+	uart->fbrd = (u8_t)(brdf & 0x3f);    /* 6 bits */
 }
 
 /**
@@ -332,7 +332,7 @@ static unsigned char uart_stellaris_poll_out(struct device *dev,
 		;
 
 	/* send a character */
-	uart->dr = (uint32_t)c;
+	uart->dr = (u32_t)c;
 	return c;
 }
 
@@ -347,14 +347,14 @@ static unsigned char uart_stellaris_poll_out(struct device *dev,
  *
  * @return Number of bytes sent
  */
-static int uart_stellaris_fifo_fill(struct device *dev, const uint8_t *tx_data,
+static int uart_stellaris_fifo_fill(struct device *dev, const u8_t *tx_data,
 				    int len)
 {
 	volatile struct _uart *uart = UART_STRUCT(dev);
-	uint8_t num_tx = 0;
+	u8_t num_tx = 0;
 
 	while ((len - num_tx > 0) && ((uart->fr & UARTFR_TXFF) == 0)) {
-		uart->dr = (uint32_t)tx_data[num_tx++];
+		uart->dr = (u32_t)tx_data[num_tx++];
 	}
 
 	return (int)num_tx;
@@ -369,14 +369,14 @@ static int uart_stellaris_fifo_fill(struct device *dev, const uint8_t *tx_data,
  *
  * @return Number of bytes read
  */
-static int uart_stellaris_fifo_read(struct device *dev, uint8_t *rx_data,
+static int uart_stellaris_fifo_read(struct device *dev, u8_t *rx_data,
 				    const int size)
 {
 	volatile struct _uart *uart = UART_STRUCT(dev);
-	uint8_t num_rx = 0;
+	u8_t num_rx = 0;
 
 	while ((size - num_rx > 0) && ((uart->fr & UARTFR_RXFE) == 0)) {
-		rx_data[num_rx++] = (uint8_t)uart->dr;
+		rx_data[num_rx++] = (u8_t)uart->dr;
 	}
 
 	return num_rx;
@@ -391,11 +391,11 @@ static int uart_stellaris_fifo_read(struct device *dev, uint8_t *rx_data,
  */
 static void uart_stellaris_irq_tx_enable(struct device *dev)
 {
-	static uint8_t first_time =
+	static u8_t first_time =
 		1;	   /* used to allow the first transmission */
-	uint32_t saved_ctl;  /* saved UARTCTL (control) register */
-	uint32_t saved_ibrd; /* saved UARTIBRD (integer baud rate) register */
-	uint32_t saved_fbrd; /* saved UARTFBRD (fractional baud rate) register
+	u32_t saved_ctl;  /* saved UARTCTL (control) register */
+	u32_t saved_ibrd; /* saved UARTIBRD (integer baud rate) register */
+	u32_t saved_fbrd; /* saved UARTFBRD (fractional baud rate) register
 				*/
 	volatile struct _uart *uart = UART_STRUCT(dev);
 
@@ -632,7 +632,7 @@ static void irq_config_func_0(struct device *port);
 #endif
 
 static const struct uart_device_config uart_stellaris_dev_cfg_0 = {
-	.base = (uint8_t *)UART_STELLARIS_PORT_0_BASE_ADDR,
+	.base = (u8_t *)UART_STELLARIS_PORT_0_BASE_ADDR,
 	.sys_clk_freq = UART_STELLARIS_CLK_FREQ,
 
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
@@ -669,7 +669,7 @@ static void irq_config_func_1(struct device *port);
 #endif
 
 static struct uart_device_config uart_stellaris_dev_cfg_1 = {
-	.base = (uint8_t *)UART_STELLARIS_PORT_1_BASE_ADDR,
+	.base = (u8_t *)UART_STELLARIS_PORT_1_BASE_ADDR,
 	.sys_clk_freq = UART_STELLARIS_CLK_FREQ,
 
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
@@ -706,7 +706,7 @@ static void irq_config_func_2(struct device *port);
 #endif
 
 static const struct uart_device_config uart_stellaris_dev_cfg_2 = {
-	.base = (uint8_t *)UART_STELLARIS_PORT_2_BASE_ADDR,
+	.base = (u8_t *)UART_STELLARIS_PORT_2_BASE_ADDR,
 	.sys_clk_freq = UART_STELLARIS_CLK_FREQ,
 
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
diff --git a/drivers/serial/uart_stm32.c b/drivers/serial/uart_stm32.c
index e0bbb80ecd7..881ed1676bb 100644
--- a/drivers/serial/uart_stm32.c
+++ b/drivers/serial/uart_stm32.c
@@ -43,7 +43,7 @@ static int uart_stm32_poll_in(struct device *dev, unsigned char *c)
 	struct uart_stm32_data *data = DEV_DATA(dev);
 	UART_HandleTypeDef *UartHandle = &data->huart;
 
-	if (HAL_UART_Receive(UartHandle, (uint8_t *)c, 1, TIMEOUT) == HAL_OK) {
+	if (HAL_UART_Receive(UartHandle, (u8_t *)c, 1, TIMEOUT) == HAL_OK) {
 		return 0;
 	} else {
 		return -1;
@@ -56,7 +56,7 @@ static unsigned char uart_stm32_poll_out(struct device *dev,
 	struct uart_stm32_data *data = DEV_DATA(dev);
 	UART_HandleTypeDef *UartHandle = &data->huart;
 
-	HAL_UART_Transmit(UartHandle, (uint8_t *)&c, 1, TIMEOUT);
+	HAL_UART_Transmit(UartHandle, (u8_t *)&c, 1, TIMEOUT);
 
 	return c;
 }
@@ -74,12 +74,12 @@ static inline void __uart_stm32_get_clock(struct device *dev)
 
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
 
-static int uart_stm32_fifo_fill(struct device *dev, const uint8_t *tx_data,
+static int uart_stm32_fifo_fill(struct device *dev, const u8_t *tx_data,
 				  int size)
 {
 	struct uart_stm32_data *data = DEV_DATA(dev);
 	UART_HandleTypeDef *UartHandle = &data->huart;
-	uint8_t num_tx = 0;
+	u8_t num_tx = 0;
 
 	while ((size - num_tx > 0) && __HAL_UART_GET_FLAG(UartHandle,
 		UART_FLAG_TXE)) {
@@ -91,7 +91,7 @@ static int uart_stm32_fifo_fill(struct device *dev, const uint8_t *tx_data,
 		 * Once it is we can remove the if/else
 		 */
 		UartHandle->Instance->DR = (tx_data[num_tx++] &
-					(uint8_t)0x00FF);
+					(u8_t)0x00FF);
 #else
 		LL_USART_TransmitData8(UartHandle->Instance, tx_data[num_tx++]);
 #endif
@@ -107,12 +107,12 @@ static int uart_stm32_fifo_fill(struct device *dev, const uint8_t *tx_data,
 	return num_tx;
 }
 
-static int uart_stm32_fifo_read(struct device *dev, uint8_t *rx_data,
+static int uart_stm32_fifo_read(struct device *dev, u8_t *rx_data,
 				  const int size)
 {
 	struct uart_stm32_data *data = DEV_DATA(dev);
 	UART_HandleTypeDef *UartHandle = &data->huart;
-	uint8_t num_rx = 0;
+	u8_t num_rx = 0;
 
 	while ((size - num_rx > 0) && __HAL_UART_GET_FLAG(UartHandle,
 		UART_FLAG_RXNE)) {
@@ -124,8 +124,8 @@ static int uart_stm32_fifo_read(struct device *dev, uint8_t *rx_data,
 		/* Use direct access for F1, F4 until Low Level API is available
 		 * Once it is we can remove the if/else
 		 */
-		rx_data[num_rx++] = (uint8_t)(UartHandle->Instance->DR &
-					(uint8_t)0x00FF);
+		rx_data[num_rx++] = (u8_t)(UartHandle->Instance->DR &
+					(u8_t)0x00FF);
 #else
 		rx_data[num_rx++] = LL_USART_ReceiveData8(UartHandle->Instance);
 #endif
@@ -325,7 +325,7 @@ static void uart_stm32_irq_config_func_1(struct device *dev);
 
 static const struct uart_stm32_config uart_stm32_dev_cfg_1 = {
 	.uconf = {
-		.base = (uint8_t *)CONFIG_UART_STM32_PORT_1_BASE_ADDRESS,
+		.base = (u8_t *)CONFIG_UART_STM32_PORT_1_BASE_ADDRESS,
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
 		.irq_config_func = uart_stm32_irq_config_func_1,
 #endif	/* CONFIG_UART_INTERRUPT_DRIVEN */
@@ -379,7 +379,7 @@ static void uart_stm32_irq_config_func_2(struct device *dev);
 
 static const struct uart_stm32_config uart_stm32_dev_cfg_2 = {
 	.uconf = {
-		.base = (uint8_t *)CONFIG_UART_STM32_PORT_2_BASE_ADDRESS,
+		.base = (u8_t *)CONFIG_UART_STM32_PORT_2_BASE_ADDRESS,
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
 		.irq_config_func = uart_stm32_irq_config_func_2,
 #endif	/* CONFIG_UART_INTERRUPT_DRIVEN */
@@ -431,7 +431,7 @@ static void uart_stm32_irq_config_func_3(struct device *dev);
 
 static const struct uart_stm32_config uart_stm32_dev_cfg_3 = {
 	.uconf = {
-		.base = (uint8_t *)CONFIG_UART_STM32_PORT_3_BASE_ADDRESS,
+		.base = (u8_t *)CONFIG_UART_STM32_PORT_3_BASE_ADDRESS,
 #ifdef CONFIG_UART_INTERRUPT_DRIVEN
 		.irq_config_func = uart_stm32_irq_config_func_3,
 #endif	/* CONFIG_UART_INTERRUPT_DRIVEN */
diff --git a/drivers/serial/usart_sam.c b/drivers/serial/usart_sam.c
index eae0deff6c0..4c0a0c22967 100644
--- a/drivers/serial/usart_sam.c
+++ b/drivers/serial/usart_sam.c
@@ -50,14 +50,14 @@
 /* Device constant configuration parameters */
 struct usart_sam_dev_cfg {
 	Usart *regs;
-	uint32_t periph_id;
+	u32_t periph_id;
 	struct soc_gpio_pin pin_rx;
 	struct soc_gpio_pin pin_tx;
 };
 
 /* Device run time data */
 struct usart_sam_dev_data {
-	uint32_t baud_rate;
+	u32_t baud_rate;
 };
 
 #define DEV_CFG(dev) \
@@ -66,8 +66,8 @@ struct usart_sam_dev_data {
 	((struct usart_sam_dev_data *const)(dev)->driver_data)
 
 
-static int baudrate_set(Usart *const usart, uint32_t baudrate,
-			uint32_t mck_freq_hz);
+static int baudrate_set(Usart *const usart, u32_t baudrate,
+			u32_t mck_freq_hz);
 
 
 static int usart_sam_init(struct device *dev)
@@ -134,14 +134,14 @@ static unsigned char usart_sam_poll_out(struct device *dev, unsigned char c)
 		;
 
 	/* send a character */
-	usart->US_THR = (uint32_t)c;
+	usart->US_THR = (u32_t)c;
 	return c;
 }
 
-static int baudrate_set(Usart *const usart, uint32_t baudrate,
-			uint32_t mck_freq_hz)
+static int baudrate_set(Usart *const usart, u32_t baudrate,
+			u32_t mck_freq_hz)
 {
-	uint32_t divisor;
+	u32_t divisor;
 
 	__ASSERT(baudrate,
 		 "baud rate has to be bigger than 0");
diff --git a/drivers/shared_irq/shared_irq.c b/drivers/shared_irq/shared_irq.c
index b245bcada3f..f52817edd41 100644
--- a/drivers/shared_irq/shared_irq.c
+++ b/drivers/shared_irq/shared_irq.c
@@ -28,7 +28,7 @@ static int isr_register(struct device *dev, isr_t isr_func,
 {
 	struct shared_irq_runtime *clients = dev->driver_data;
 	const struct shared_irq_config *config = dev->config->config_info;
-	uint32_t i;
+	u32_t i;
 
 	for (i = 0; i < config->client_count; i++) {
 		if (!clients->client[i].isr_dev) {
@@ -49,7 +49,7 @@ static inline int enable(struct device *dev, struct device *isr_dev)
 {
 	struct shared_irq_runtime *clients = dev->driver_data;
 	const struct shared_irq_config *config = dev->config->config_info;
-	uint32_t i;
+	u32_t i;
 
 	for (i = 0; i < config->client_count; i++) {
 		if (clients->client[i].isr_dev == isr_dev) {
@@ -63,7 +63,7 @@ static inline int enable(struct device *dev, struct device *isr_dev)
 
 static int last_enabled_isr(struct shared_irq_runtime *clients, int count)
 {
-	uint32_t i;
+	u32_t i;
 
 	for (i = 0; i < count; i++) {
 		if (clients->client[i].enabled) {
@@ -81,7 +81,7 @@ static inline int disable(struct device *dev, struct device *isr_dev)
 {
 	struct shared_irq_runtime *clients = dev->driver_data;
 	const struct shared_irq_config *config = dev->config->config_info;
-	uint32_t i;
+	u32_t i;
 
 	for (i = 0; i < config->client_count; i++) {
 		if (clients->client[i].isr_dev == isr_dev) {
@@ -99,7 +99,7 @@ void shared_irq_isr(struct device *dev)
 {
 	struct shared_irq_runtime *clients = dev->driver_data;
 	const struct shared_irq_config *config = dev->config->config_info;
-	uint32_t i;
+	u32_t i;
 
 	for (i = 0; i < config->client_count; i++) {
 		if (clients->client[i].isr_dev) {
diff --git a/drivers/slip/slip.c b/drivers/slip/slip.c
index 376e6bd101d..fdd2d8cfd61 100644
--- a/drivers/slip/slip.c
+++ b/drivers/slip/slip.c
@@ -44,20 +44,20 @@ struct slip_context {
 	bool first;		/* SLIP received it's byte or not after
 				 * driver initialization or SLIP_END byte.
 				 */
-	uint8_t buf[1];		/* SLIP data is read into this buf */
+	u8_t buf[1];		/* SLIP data is read into this buf */
 	struct net_pkt *rx;	/* and then placed into this net_pkt */
 	struct net_buf *last;	/* Pointer to last fragment in the list */
-	uint8_t *ptr;		/* Where in net_pkt to add data */
+	u8_t *ptr;		/* Where in net_pkt to add data */
 	struct net_if *iface;
-	uint8_t state;
+	u8_t state;
 
-	uint8_t mac_addr[6];
+	u8_t mac_addr[6];
 	struct net_linkaddr ll_addr;
 
 #if defined(CONFIG_SLIP_STATISTICS)
 #define SLIP_STATS(statement)
 #else
-	uint16_t garbage;
+	u16_t garbage;
 #define SLIP_STATS(statement) statement
 #endif
 };
@@ -71,7 +71,7 @@ struct slip_context {
 #define COLOR_YELLOW  ""
 #endif
 
-static void hexdump(const char *str, const uint8_t *packet,
+static void hexdump(const char *str, const u8_t *packet,
 		    size_t length, size_t ll_reserve)
 {
 	int n = 0;
@@ -120,7 +120,7 @@ static void hexdump(const char *str, const uint8_t *packet,
 
 static inline void slip_writeb(unsigned char c)
 {
-	uint8_t buf[1] = { c };
+	u8_t buf[1] = { c };
 
 	uart_pipe_send(&buf[0], 1);
 }
@@ -129,12 +129,12 @@ static int slip_send(struct net_if *iface, struct net_pkt *pkt)
 {
 	struct net_buf *frag;
 #if defined(CONFIG_SLIP_TAP)
-	uint16_t ll_reserve = net_pkt_ll_reserve(pkt);
+	u16_t ll_reserve = net_pkt_ll_reserve(pkt);
 	bool send_header_once = false;
 #endif
-	uint8_t *ptr;
-	uint16_t i;
-	uint8_t c;
+	u8_t *ptr;
+	u16_t i;
+	u8_t c;
 
 	if (!pkt->frags) {
 		/* No data? */
@@ -356,7 +356,7 @@ static inline int slip_input_byte(struct slip_context *slip,
 	return 0;
 }
 
-static uint8_t *recv_cb(uint8_t *buf, size_t *off)
+static u8_t *recv_cb(u8_t *buf, size_t *off)
 {
 	struct slip_context *slip =
 		CONTAINER_OF(buf, struct slip_context, buf);
diff --git a/drivers/spi/spi_dw.c b/drivers/spi/spi_dw.c
index 18db605fc64..2bc40dd2746 100644
--- a/drivers/spi/spi_dw.c
+++ b/drivers/spi/spi_dw.c
@@ -33,7 +33,7 @@
 
 #if (CONFIG_SYS_LOG_SPI_LEVEL == 4)
 #define DBG_COUNTER_INIT()	\
-	uint32_t __cnt = 0
+	u32_t __cnt = 0
 #define DBG_COUNTER_INC()	\
 	(__cnt++)
 #define DBG_COUNTER_RESULT()	\
@@ -103,8 +103,8 @@ static void push_data(struct device *dev)
 {
 	const struct spi_dw_config *info = dev->config->config_info;
 	struct spi_dw_data *spi = dev->driver_data;
-	uint32_t data = 0;
-	uint32_t f_tx;
+	u32_t data = 0;
+	u32_t f_tx;
 	DBG_COUNTER_INIT();
 
 	if (spi->rx_buf) {
@@ -124,14 +124,14 @@ static void push_data(struct device *dev)
 		if (spi->tx_buf && spi->tx_buf_len > 0) {
 			switch (spi->dfs) {
 			case 1:
-				data = UNALIGNED_GET((uint8_t *)(spi->tx_buf));
+				data = UNALIGNED_GET((u8_t *)(spi->tx_buf));
 				break;
 			case 2:
-				data = UNALIGNED_GET((uint16_t *)(spi->tx_buf));
+				data = UNALIGNED_GET((u16_t *)(spi->tx_buf));
 				break;
 #ifndef CONFIG_ARC
 			case 4:
-				data = UNALIGNED_GET((uint32_t *)(spi->tx_buf));
+				data = UNALIGNED_GET((u32_t *)(spi->tx_buf));
 				break;
 #endif
 			}
@@ -168,7 +168,7 @@ static void pull_data(struct device *dev)
 {
 	const struct spi_dw_config *info = dev->config->config_info;
 	struct spi_dw_data *spi = dev->driver_data;
-	uint32_t data = 0;
+	u32_t data = 0;
 	DBG_COUNTER_INIT();
 
 	while (read_rxflr(info->regs)) {
@@ -178,14 +178,14 @@ static void pull_data(struct device *dev)
 		if (spi->rx_buf && spi->rx_buf_len > 0) {
 			switch (spi->dfs) {
 			case 1:
-				UNALIGNED_PUT(data, (uint8_t *)spi->rx_buf);
+				UNALIGNED_PUT(data, (u8_t *)spi->rx_buf);
 				break;
 			case 2:
-				UNALIGNED_PUT(data, (uint16_t *)spi->rx_buf);
+				UNALIGNED_PUT(data, (u16_t *)spi->rx_buf);
 				break;
 #ifndef CONFIG_ARC
 			case 4:
-				UNALIGNED_PUT(data, (uint32_t *)spi->rx_buf);
+				UNALIGNED_PUT(data, (u32_t *)spi->rx_buf);
 				break;
 #endif
 			}
@@ -222,9 +222,9 @@ static int spi_dw_configure(struct device *dev,
 {
 	const struct spi_dw_config *info = dev->config->config_info;
 	struct spi_dw_data *spi = dev->driver_data;
-	uint32_t flags = config->config;
-	uint32_t ctrlr0 = 0;
-	uint32_t mode;
+	u32_t flags = config->config;
+	u32_t ctrlr0 = 0;
+	u32_t mode;
 
 	SYS_LOG_DBG("%s: %p (0x%x), %p", __func__, dev, info->regs, config);
 
@@ -276,7 +276,7 @@ static int spi_dw_configure(struct device *dev,
 	return 0;
 }
 
-static int spi_dw_slave_select(struct device *dev, uint32_t slave)
+static int spi_dw_slave_select(struct device *dev, u32_t slave)
 {
 	struct spi_dw_data *spi = dev->driver_data;
 
@@ -292,13 +292,13 @@ static int spi_dw_slave_select(struct device *dev, uint32_t slave)
 }
 
 static int spi_dw_transceive(struct device *dev,
-			     const void *tx_buf, uint32_t tx_buf_len,
-			     void *rx_buf, uint32_t rx_buf_len)
+			     const void *tx_buf, u32_t tx_buf_len,
+			     void *rx_buf, u32_t rx_buf_len)
 {
 	const struct spi_dw_config *info = dev->config->config_info;
 	struct spi_dw_data *spi = dev->driver_data;
-	uint32_t rx_thsld = DW_SPI_RXFTLR_DFLT;
-	uint32_t imask;
+	u32_t rx_thsld = DW_SPI_RXFTLR_DFLT;
+	u32_t imask;
 
 	SYS_LOG_DBG("%s: %p, %p, %u, %p, %u",
 	    __func__, dev, tx_buf, tx_buf_len, rx_buf, rx_buf_len);
@@ -365,8 +365,8 @@ void spi_dw_isr(void *arg)
 {
 	struct device *dev = (struct device *)arg;
 	const struct spi_dw_config *info = dev->config->config_info;
-	uint32_t error = 0;
-	uint32_t int_status;
+	u32_t error = 0;
+	u32_t int_status;
 
 	int_status = read_isr(info->regs);
 
diff --git a/drivers/spi/spi_dw.h b/drivers/spi/spi_dw.h
index 3cf7711ee2c..a9bdb5c730b 100644
--- a/drivers/spi/spi_dw.h
+++ b/drivers/spi/spi_dw.h
@@ -19,35 +19,35 @@ typedef void (*spi_dw_config_t)(void);
 
 /* Private structures */
 struct spi_dw_config {
-	uint32_t regs;
+	u32_t regs;
 #ifdef CONFIG_SPI_DW_CLOCK_GATE
 	void *clock_data;
 #endif /* CONFIG_SPI_DW_CLOCK_GATE */
 #ifdef CONFIG_SPI_DW_CS_GPIO
 	char *cs_gpio_name;
-	uint32_t cs_gpio_pin;
+	u32_t cs_gpio_pin;
 #endif /* CONFIG_SPI_DW_CS_GPIO */
 	spi_dw_config_t config_func;
 };
 
 struct spi_dw_data {
 	struct k_sem device_sync_sem;
-	uint32_t error:1;
-	uint32_t dfs:3; /* dfs in bytes: 1,2 or 4 */
-	uint32_t slave:17; /* up 16 slaves */
-	uint32_t fifo_diff:9; /* cannot be bigger than FIFO depth */
-	uint32_t last_tx:1;
-	uint32_t _unused:1;
+	u32_t error:1;
+	u32_t dfs:3; /* dfs in bytes: 1,2 or 4 */
+	u32_t slave:17; /* up 16 slaves */
+	u32_t fifo_diff:9; /* cannot be bigger than FIFO depth */
+	u32_t last_tx:1;
+	u32_t _unused:1;
 #ifdef CONFIG_SPI_DW_CLOCK_GATE
 	struct device *clock;
 #endif /* CONFIG_SPI_DW_CLOCK_GATE */
 #ifdef CONFIG_SPI_DW_CS_GPIO
 	struct device *cs_gpio_port;
 #endif /* CONFIG_SPI_DW_CS_GPIO */
-	const uint8_t *tx_buf;
-	uint32_t tx_buf_len;
-	uint8_t *rx_buf;
-	uint32_t rx_buf_len;
+	const u8_t *tx_buf;
+	u32_t tx_buf_len;
+	u8_t *rx_buf;
+	u32_t rx_buf_len;
 };
 
 /* Helper macros */
@@ -67,30 +67,30 @@ struct spi_dw_data {
 #endif /* CONFIG_SPI_DW_ARC_AUX_REGS */
 
 #define DEFINE_MM_REG_READ(__reg, __off, __sz)				\
-	static inline uint32_t read_##__reg(uint32_t addr)		\
+	static inline u32_t read_##__reg(u32_t addr)		\
 	{								\
 		return _REG_READ(__sz)(addr + __off);			\
 	}
 #define DEFINE_MM_REG_WRITE(__reg, __off, __sz)				\
-	static inline void write_##__reg(uint32_t data, uint32_t addr)	\
+	static inline void write_##__reg(u32_t data, u32_t addr)	\
 	{								\
 		_REG_WRITE(__sz)(data, addr + __off);			\
 	}
 
 #define DEFINE_SET_BIT_OP(__reg_bit, __reg_off, __bit)			\
-	static inline void set_bit_##__reg_bit(uint32_t addr)		\
+	static inline void set_bit_##__reg_bit(u32_t addr)		\
 	{								\
 		_REG_SET_BIT(addr + __reg_off, __bit);			\
 	}
 
 #define DEFINE_CLEAR_BIT_OP(__reg_bit, __reg_off, __bit)		\
-	static inline void clear_bit_##__reg_bit(uint32_t addr)		\
+	static inline void clear_bit_##__reg_bit(u32_t addr)		\
 	{								\
 		_REG_CLEAR_BIT(addr + __reg_off, __bit);		\
 	}
 
 #define DEFINE_TEST_BIT_OP(__reg_bit, __reg_off, __bit)			\
-	static inline int test_bit_##__reg_bit(uint32_t addr)		\
+	static inline int test_bit_##__reg_bit(u32_t addr)		\
 	{								\
 		return _REG_TEST_BIT(addr + __reg_off, __bit);		\
 	}
diff --git a/drivers/spi/spi_dw_quark_se_ss_regs.h b/drivers/spi/spi_dw_quark_se_ss_regs.h
index 2bb4279e540..d7fcbe91253 100644
--- a/drivers/spi/spi_dw_quark_se_ss_regs.h
+++ b/drivers/spi/spi_dw_quark_se_ss_regs.h
@@ -56,7 +56,7 @@
  */
 DEFINE_MM_REG_READ(ctrlr0_b, DW_SPI_REG_CTRLR0, 16)
 DEFINE_MM_REG_WRITE(ctrlr0_b, DW_SPI_REG_CTRLR0, 16)
-static inline void write_ctrlr0(uint32_t data, uint32_t addr)
+static inline void write_ctrlr0(u32_t data, u32_t addr)
 {
 	write_ctrlr0_b((read_ctrlr0_b(addr) & DW_SPI_CTRLR0_CLK_ENA_MASK) |
 								data, addr);
@@ -64,7 +64,7 @@ static inline void write_ctrlr0(uint32_t data, uint32_t addr)
 
 DEFINE_MM_REG_READ(ssienr_b, DW_SPI_REG_SSIENR, 8)
 DEFINE_MM_REG_WRITE(ssienr_b, DW_SPI_REG_SSIENR, 8)
-static inline void write_ser(uint32_t data, uint32_t addr)
+static inline void write_ser(u32_t data, u32_t addr)
 {
 	write_ssienr_b((read_ssienr_b(addr) & (~DW_SPI_QSS_SER_MASK)) |
 					DW_SPI_QSS_SSIENR_SER(data), addr);
@@ -74,13 +74,13 @@ DEFINE_MM_REG_READ(rxftlr_b, DW_SPI_REG_RXFTLR, 32)
 DEFINE_MM_REG_WRITE(rxftlr_b, DW_SPI_REG_RXFTLR, 32)
 DEFINE_MM_REG_READ(rxftlr, DW_SPI_REG_RXFTLR, 16)
 
-static inline void write_rxftlr(uint32_t data, uint32_t addr)
+static inline void write_rxftlr(u32_t data, u32_t addr)
 {
 	write_rxftlr_b((read_rxftlr_b(addr) & (~DW_SPI_QSS_RXFTLR_MASK)) |
 								data, addr);
 }
 
-static inline void write_txftlr(uint32_t data, uint32_t addr)
+static inline void write_txftlr(u32_t data, u32_t addr)
 {
 	write_rxftlr_b((read_rxftlr_b(addr) & (~DW_SPI_QSS_TXFTLR_MASK)) |
 						DW_SPI_QSS_TXFTLR(data), addr);
@@ -88,7 +88,7 @@ static inline void write_txftlr(uint32_t data, uint32_t addr)
 
 /* Quark SE SS requires to clear up all interrupts */
 DEFINE_MM_REG_WRITE(icr, DW_SPI_REG_ICR, 8)
-static inline void clear_interrupts(uint32_t addr)
+static inline void clear_interrupts(u32_t addr)
 {
 	write_icr(0x1f, addr);
 }
@@ -100,12 +100,12 @@ static inline void clear_interrupts(uint32_t addr)
  */
 DEFINE_MM_REG_WRITE(dr_b, DW_SPI_REG_DR, 32)
 DEFINE_MM_REG_READ(dr_b, DW_SPI_REG_DR, 32)
-static inline void write_dr(uint32_t data, uint32_t addr)
+static inline void write_dr(u32_t data, u32_t addr)
 {
 	write_dr_b(data | DW_SPI_DR_WRITE, addr);
 }
 
-static inline uint32_t read_dr(uint32_t addr)
+static inline u32_t read_dr(u32_t addr)
 {
 	write_dr_b(DW_SPI_DR_READ, addr);
 	__asm__("nop\n");
diff --git a/drivers/spi/spi_intel.c b/drivers/spi/spi_intel.c
index c3e26ab2c68..791b313dd8d 100644
--- a/drivers/spi/spi_intel.c
+++ b/drivers/spi/spi_intel.c
@@ -32,12 +32,12 @@
 
 
 #define DEFINE_MM_REG_READ(__reg, __off, __sz)				\
-	static inline uint32_t read_##__reg(uint32_t addr)		\
+	static inline u32_t read_##__reg(u32_t addr)		\
 	{								\
 		return sys_read##__sz(addr + __off);			\
 	}
 #define DEFINE_MM_REG_WRITE(__reg, __off, __sz)				\
-	static inline void write_##__reg(uint32_t data, uint32_t addr)	\
+	static inline void write_##__reg(u32_t data, u32_t addr)	\
 	{								\
 		sys_write##__sz(data, addr + __off);			\
 	}
@@ -50,19 +50,19 @@ DEFINE_MM_REG_WRITE(ssdr, INTEL_SPI_REG_SSDR, 32)
 DEFINE_MM_REG_WRITE(dds_rate, INTEL_SPI_REG_DDS_RATE, 32)
 
 #define DEFINE_SET_BIT_OP(__reg_bit, __reg_off, __bit)			\
-	static inline void set_bit_##__reg_bit(uint32_t addr)		\
+	static inline void set_bit_##__reg_bit(u32_t addr)		\
 	{								\
 		sys_set_bit(addr + __reg_off, __bit);			\
 	}
 
 #define DEFINE_CLEAR_BIT_OP(__reg_bit, __reg_off, __bit)		\
-	static inline void clear_bit_##__reg_bit(uint32_t addr)		\
+	static inline void clear_bit_##__reg_bit(u32_t addr)		\
 	{								\
 		sys_clear_bit(addr + __reg_off, __bit);			\
 	}
 
 #define DEFINE_TEST_BIT_OP(__reg_bit, __reg_off, __bit)			\
-	static inline int test_bit_##__reg_bit(uint32_t addr)		\
+	static inline int test_bit_##__reg_bit(u32_t addr)		\
 	{								\
 		return sys_test_bit(addr + __reg_off, __bit);		\
 	}
@@ -114,7 +114,7 @@ static inline void _spi_control_cs(struct device *dev, int on)
 #define _spi_config_cs(...) { ; }
 #endif /* CONFIG_SPI_CS_GPIO */
 
-static void completed(struct device *dev, uint32_t error)
+static void completed(struct device *dev, u32_t error)
 {
 	struct spi_intel_data *spi = dev->driver_data;
 
@@ -136,16 +136,16 @@ static void completed(struct device *dev, uint32_t error)
 static void pull_data(struct device *dev)
 {
 	struct spi_intel_data *spi = dev->driver_data;
-	uint32_t cnt = 0;
-	uint8_t data = 0;
+	u32_t cnt = 0;
+	u8_t data = 0;
 
 	while (read_sssr(spi->regs) & INTEL_SPI_SSSR_RNE) {
-		data = (uint8_t) read_ssdr(spi->regs);
+		data = (u8_t) read_ssdr(spi->regs);
 		cnt++;
 		spi->received++;
 
 		if ((spi->received - 1) < spi->r_buf_len) {
-			*(uint8_t *)(spi->rx_buf) = data;
+			*(u8_t *)(spi->rx_buf) = data;
 			spi->rx_buf++;
 		}
 	}
@@ -156,16 +156,16 @@ static void pull_data(struct device *dev)
 static void push_data(struct device *dev)
 {
 	struct spi_intel_data *spi = dev->driver_data;
-	uint32_t cnt = 0;
-	uint8_t data;
-	uint32_t status;
+	u32_t cnt = 0;
+	u8_t data;
+	u32_t status;
 
 	while ((status = read_sssr(spi->regs)) & INTEL_SPI_SSSR_TNF) {
 		if (status & INTEL_SPI_SSSR_RFS) {
 			break;
 		}
 		if (spi->tx_buf && (spi->transmitted < spi->t_buf_len)) {
-			data = *(uint8_t *)(spi->tx_buf);
+			data = *(u8_t *)(spi->tx_buf);
 			spi->tx_buf++;
 		} else if (spi->transmitted < spi->trans_len) {
 			data = 0;
@@ -191,8 +191,8 @@ static int spi_intel_configure(struct device *dev,
 				struct spi_config *config)
 {
 	struct spi_intel_data *spi = dev->driver_data;
-	uint32_t flags = config->config;
-	uint32_t mode;
+	u32_t flags = config->config;
+	u32_t mode;
 
 	SYS_LOG_DBG("spi_intel_configure: %p (0x%x), %p", dev, spi->regs,
 		    config);
@@ -246,8 +246,8 @@ static int spi_intel_configure(struct device *dev,
 }
 
 static int spi_intel_transceive(struct device *dev,
-				const void *tx_buf, uint32_t tx_buf_len,
-				void *rx_buf, uint32_t rx_buf_len)
+				const void *tx_buf, u32_t tx_buf_len,
+				void *rx_buf, u32_t rx_buf_len)
 {
 	struct spi_intel_data *spi = dev->driver_data;
 
@@ -292,8 +292,8 @@ void spi_intel_isr(void *arg)
 {
 	struct device *dev = arg;
 	struct spi_intel_data *spi = dev->driver_data;
-	uint32_t error = 0;
-	uint32_t status;
+	u32_t error = 0;
+	u32_t status;
 
 	SYS_LOG_DBG("spi_intel_isr: %p", dev);
 
@@ -352,7 +352,7 @@ static inline int spi_intel_setup(struct device *dev)
 #endif /* CONFIG_PCI */
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
 
-static void spi_intel_set_power_state(struct device *dev, uint32_t power_state)
+static void spi_intel_set_power_state(struct device *dev, u32_t power_state)
 {
 	struct spi_intel_data *context = dev->driver_data;
 
@@ -390,7 +390,7 @@ int spi_intel_init(struct device *dev)
 
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
 
-static uint32_t spi_intel_get_power_state(struct device *dev)
+static u32_t spi_intel_get_power_state(struct device *dev)
 {
 	struct spi_intel_data *context = dev->driver_data;
 
@@ -431,17 +431,17 @@ static int spi_intel_resume_from_suspend(struct device *dev)
 * Implements the driver control management functionality
 * the *context may include IN data or/and OUT data
 */
-static int spi_intel_device_ctrl(struct device *dev, uint32_t ctrl_command,
+static int spi_intel_device_ctrl(struct device *dev, u32_t ctrl_command,
 				 void *context)
 {
 	if (ctrl_command == DEVICE_PM_SET_POWER_STATE) {
-		if (*((uint32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
+		if (*((u32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
 			return spi_intel_suspend(dev);
-		} else if (*((uint32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
+		} else if (*((u32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
 			return spi_intel_resume_from_suspend(dev);
 		}
 	} else if (ctrl_command == DEVICE_PM_GET_POWER_STATE) {
-		*((uint32_t *)context) = spi_intel_get_power_state(dev);
+		*((u32_t *)context) = spi_intel_get_power_state(dev);
 		return 0;
 	}
 
diff --git a/drivers/spi/spi_intel.h b/drivers/spi/spi_intel.h
index 3dfbda496f6..a11d5d304fa 100644
--- a/drivers/spi/spi_intel.h
+++ b/drivers/spi/spi_intel.h
@@ -20,36 +20,36 @@ extern "C" {
 typedef void (*spi_intel_config_t)(void);
 
 struct spi_intel_config {
-	uint32_t irq;
+	u32_t irq;
 	spi_intel_config_t config_func;
 #ifdef CONFIG_SPI_CS_GPIO
 	char *cs_gpio_name;
-	uint32_t cs_gpio_pin;
+	u32_t cs_gpio_pin;
 #endif /* CONFIG_SPI_CS_GPIO */
 };
 
 struct spi_intel_data {
-	uint32_t regs;
+	u32_t regs;
 #ifdef CONFIG_PCI
 	struct pci_dev_info pci_dev;
 #endif /* CONFIG_PCI */
 	struct k_sem device_sync_sem;
-	uint8_t error;
-	uint8_t padding[3];
+	u8_t error;
+	u8_t padding[3];
 #ifdef CONFIG_SPI_CS_GPIO
 	struct device *cs_gpio_port;
 #endif /* CONFIG_SPI_CS_GPIO */
-	uint32_t sscr0;
-	uint32_t sscr1;
-	const uint8_t *tx_buf;
-	uint8_t *rx_buf;
-	uint32_t t_buf_len;
-	uint32_t r_buf_len;
-	uint32_t transmitted;
-	uint32_t received;
-	uint32_t trans_len;
+	u32_t sscr0;
+	u32_t sscr1;
+	const u8_t *tx_buf;
+	u8_t *rx_buf;
+	u32_t t_buf_len;
+	u32_t r_buf_len;
+	u32_t transmitted;
+	u32_t received;
+	u32_t trans_len;
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
-	uint32_t device_power_state;
+	u32_t device_power_state;
 #endif
 };
 
diff --git a/drivers/spi/spi_mcux_dspi.c b/drivers/spi/spi_mcux_dspi.c
index d40b63544c8..1ac1171962b 100644
--- a/drivers/spi/spi_mcux_dspi.c
+++ b/drivers/spi/spi_mcux_dspi.c
@@ -25,7 +25,7 @@ struct spi_mcux_data {
 	dspi_master_handle_t handle;
 	struct k_sem sync;
 	status_t callback_status;
-	uint32_t slave;
+	u32_t slave;
 };
 
 static void spi_mcux_master_transfer_callback(SPI_Type *base,
@@ -44,9 +44,9 @@ static int spi_mcux_configure(struct device *dev, struct spi_config *spi_config)
 	struct spi_mcux_data *data = dev->driver_data;
 	SPI_Type *base = config->base;
 	dspi_master_config_t master_config;
-	uint32_t flags = spi_config->config;
-	uint32_t clock_freq;
-	uint32_t word_size;
+	u32_t flags = spi_config->config;
+	u32_t clock_freq;
+	u32_t word_size;
 
 	DSPI_MasterGetDefaultConfig(&master_config);
 
@@ -85,7 +85,7 @@ static int spi_mcux_configure(struct device *dev, struct spi_config *spi_config)
 	return 0;
 }
 
-static int spi_mcux_slave_select(struct device *dev, uint32_t slave)
+static int spi_mcux_slave_select(struct device *dev, u32_t slave)
 {
 	struct spi_mcux_data *data = dev->driver_data;
 
@@ -101,13 +101,13 @@ static int spi_mcux_slave_select(struct device *dev, uint32_t slave)
 }
 
 static int spi_mcux_transceive(struct device *dev,
-		const void *tx_buf, uint32_t tx_buf_len,
-		void *rx_buf, uint32_t rx_buf_len)
+		const void *tx_buf, u32_t tx_buf_len,
+		void *rx_buf, u32_t rx_buf_len)
 {
 	const struct spi_mcux_config *config = dev->config->config_info;
 	struct spi_mcux_data *data = dev->driver_data;
 	SPI_Type *base = config->base;
-	uint8_t buf[CONFIG_SPI_MCUX_BUF_SIZE];
+	u8_t buf[CONFIG_SPI_MCUX_BUF_SIZE];
 	dspi_transfer_t transfer;
 	status_t status;
 
@@ -120,7 +120,7 @@ static int spi_mcux_transceive(struct device *dev,
 		/* The tx and rx buffers are the same length, so we can use
 		 * them directly.
 		 */
-		transfer.txData = (uint8_t *)tx_buf;
+		transfer.txData = (u8_t *)tx_buf;
 		transfer.rxData = rx_buf;
 		transfer.dataSize = rx_buf_len;
 		SYS_LOG_DBG("Using tx and rx buffers directly");
@@ -136,7 +136,7 @@ static int spi_mcux_transceive(struct device *dev,
 		/* The rx buffer length is zero, so this is a one-way spi write
 		 * operation.
 		 */
-		transfer.txData = (uint8_t *)tx_buf;
+		transfer.txData = (u8_t *)tx_buf;
 		transfer.rxData = NULL;
 		transfer.dataSize = tx_buf_len;
 		SYS_LOG_DBG("Using tx buffer directly, rx buffer is null");
@@ -156,7 +156,7 @@ static int spi_mcux_transceive(struct device *dev,
 		 * longer local buffer for rx. After the transfer is complete,
 		 * we'll need to copy the local buffer back to the rx buffer.
 		 */
-		transfer.txData = (uint8_t *)tx_buf;
+		transfer.txData = (u8_t *)tx_buf;
 		transfer.rxData = buf;
 		transfer.dataSize = tx_buf_len;
 		SYS_LOG_DBG("Using local buffer for rx");
diff --git a/drivers/spi/spi_qmsi.c b/drivers/spi/spi_qmsi.c
index 5797fc006aa..c14d6d164f3 100644
--- a/drivers/spi/spi_qmsi.c
+++ b/drivers/spi/spi_qmsi.c
@@ -29,7 +29,7 @@ static struct pending_transfer pending_transfers[QM_SPI_NUM];
 struct spi_qmsi_config {
 	qm_spi_t spi;
 	char *cs_port;
-	uint32_t cs_pin;
+	u32_t cs_pin;
 };
 
 struct spi_qmsi_runtime {
@@ -40,12 +40,12 @@ struct spi_qmsi_runtime {
 	bool loopback;
 	struct k_sem sem;
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
-	uint32_t device_power_state;
+	u32_t device_power_state;
 	qm_spi_context_t spi_ctx;
 #endif
 };
 
-static inline qm_spi_bmode_t config_to_bmode(uint8_t mode)
+static inline qm_spi_bmode_t config_to_bmode(u8_t mode)
 {
 	switch (mode) {
 	case SPI_MODE_CPHA:
@@ -90,7 +90,7 @@ static int spi_qmsi_configure(struct device *dev,
 }
 
 static void transfer_complete(void *data, int error, qm_spi_status_t status,
-			      uint16_t len)
+			      u16_t len)
 {
 	const struct spi_qmsi_config *spi_config =
 			       ((struct device *)data)->config->config_info;
@@ -111,7 +111,7 @@ static void transfer_complete(void *data, int error, qm_spi_status_t status,
 	k_sem_give(&context->device_sync_sem);
 }
 
-static int spi_qmsi_slave_select(struct device *dev, uint32_t slave)
+static int spi_qmsi_slave_select(struct device *dev, u32_t slave)
 {
 	const struct spi_qmsi_config *spi_config = dev->config->config_info;
 	qm_spi_t spi = spi_config->spi;
@@ -119,7 +119,7 @@ static int spi_qmsi_slave_select(struct device *dev, uint32_t slave)
 	return qm_spi_slave_select(spi, 1 << (slave - 1)) ? -EIO : 0;
 }
 
-static inline uint8_t frame_size_to_dfs(qm_spi_frame_size_t frame_size)
+static inline u8_t frame_size_to_dfs(qm_spi_frame_size_t frame_size)
 {
 	if (frame_size <= QM_SPI_FRAME_SIZE_8_BIT)
 		return 1;
@@ -133,14 +133,14 @@ static inline uint8_t frame_size_to_dfs(qm_spi_frame_size_t frame_size)
 }
 
 static int spi_qmsi_transceive(struct device *dev,
-			       const void *tx_buf, uint32_t tx_buf_len,
-			       void *rx_buf, uint32_t rx_buf_len)
+			       const void *tx_buf, u32_t tx_buf_len,
+			       void *rx_buf, u32_t rx_buf_len)
 {
 	const struct spi_qmsi_config *spi_config = dev->config->config_info;
 	qm_spi_t spi = spi_config->spi;
 	struct spi_qmsi_runtime *context = dev->driver_data;
 	qm_spi_config_t *cfg = &context->cfg;
-	uint8_t dfs = frame_size_to_dfs(cfg->frame_size);
+	u8_t dfs = frame_size_to_dfs(cfg->frame_size);
 	qm_spi_async_transfer_t *xfer;
 	int rc;
 
@@ -161,7 +161,7 @@ static int spi_qmsi_transceive(struct device *dev,
 	/* This cast is necessary to drop the "const" modifier, since QMSI xfer
 	 * does not take a const pointer.
 	 */
-	xfer->tx = (uint8_t *)tx_buf;
+	xfer->tx = (u8_t *)tx_buf;
 	xfer->tx_len = tx_buf_len / dfs;
 	xfer->callback_data = dev;
 	xfer->callback = transfer_complete;
@@ -229,14 +229,14 @@ static struct device *gpio_cs_init(const struct spi_qmsi_config *config)
 	return gpio;
 }
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
-static void spi_master_set_power_state(struct device *dev, uint32_t power_state)
+static void spi_master_set_power_state(struct device *dev, u32_t power_state)
 {
 	struct spi_qmsi_runtime *context = dev->driver_data;
 
 	context->device_power_state = power_state;
 }
 
-static uint32_t spi_master_get_power_state(struct device *dev)
+static u32_t spi_master_get_power_state(struct device *dev)
 {
 	struct spi_qmsi_runtime *context = dev->driver_data;
 
@@ -324,16 +324,16 @@ static int spi_master_resume_device_from_suspend(struct device *dev)
 * the *context may include IN data or/and OUT data
 */
 static int spi_master_qmsi_device_ctrl(struct device *port,
-				       uint32_t ctrl_command, void *context)
+				       u32_t ctrl_command, void *context)
 {
 	if (ctrl_command == DEVICE_PM_SET_POWER_STATE) {
-		if (*((uint32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
+		if (*((u32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
 			return spi_master_suspend_device(port);
-		} else if (*((uint32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
+		} else if (*((u32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
 			return spi_master_resume_device_from_suspend(port);
 		}
 	} else if (ctrl_command == DEVICE_PM_GET_POWER_STATE) {
-		*((uint32_t *)context) = spi_master_get_power_state(port);
+		*((u32_t *)context) = spi_master_get_power_state(port);
 		return 0;
 	}
 	return 0;
diff --git a/drivers/spi/spi_qmsi_ss.c b/drivers/spi/spi_qmsi_ss.c
index 8a4d908933c..87a5e87d7fe 100644
--- a/drivers/spi/spi_qmsi_ss.c
+++ b/drivers/spi/spi_qmsi_ss.c
@@ -26,7 +26,7 @@ struct ss_spi_qmsi_config {
 	qm_ss_spi_t spi;
 #ifdef CONFIG_SPI_SS_CS_GPIO
 	char *cs_port;
-	uint32_t cs_pin;
+	u32_t cs_pin;
 #endif
 };
 
@@ -40,12 +40,12 @@ struct ss_spi_qmsi_runtime {
 	int rc;
 	bool loopback;
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
-	uint32_t device_power_state;
+	u32_t device_power_state;
 	qm_ss_spi_context_t spi_ctx;
 #endif
 };
 
-static inline qm_ss_spi_bmode_t config_to_bmode(uint8_t mode)
+static inline qm_ss_spi_bmode_t config_to_bmode(u8_t mode)
 {
 	switch (mode) {
 	case SPI_MODE_CPHA:
@@ -92,7 +92,7 @@ static int ss_spi_qmsi_configure(struct device *dev,
 }
 
 static void spi_qmsi_callback(void *data, int error, qm_ss_spi_status_t status,
-			      uint16_t len)
+			      u16_t len)
 {
 	const struct ss_spi_qmsi_config *spi_config =
 			       ((struct device *)data)->config->config_info;
@@ -115,7 +115,7 @@ static void spi_qmsi_callback(void *data, int error, qm_ss_spi_status_t status,
 	k_sem_give(&context->device_sync_sem);
 }
 
-static int ss_spi_qmsi_slave_select(struct device *dev, uint32_t slave)
+static int ss_spi_qmsi_slave_select(struct device *dev, u32_t slave)
 {
 	const struct ss_spi_qmsi_config *spi_config = dev->config->config_info;
 	qm_ss_spi_t spi_id = spi_config->spi;
@@ -123,7 +123,7 @@ static int ss_spi_qmsi_slave_select(struct device *dev, uint32_t slave)
 	return qm_ss_spi_slave_select(spi_id, 1 << (slave - 1)) ? -EIO : 0;
 }
 
-static inline uint8_t frame_size_to_dfs(qm_ss_spi_frame_size_t frame_size)
+static inline u8_t frame_size_to_dfs(qm_ss_spi_frame_size_t frame_size)
 {
 	if (frame_size <= QM_SS_SPI_FRAME_SIZE_8_BIT) {
 		return 1;
@@ -138,14 +138,14 @@ static inline uint8_t frame_size_to_dfs(qm_ss_spi_frame_size_t frame_size)
 }
 
 static int ss_spi_qmsi_transceive(struct device *dev,
-				  const void *tx_buf, uint32_t tx_buf_len,
-				  void *rx_buf, uint32_t rx_buf_len)
+				  const void *tx_buf, u32_t tx_buf_len,
+				  void *rx_buf, u32_t rx_buf_len)
 {
 	const struct ss_spi_qmsi_config *spi_config = dev->config->config_info;
 	qm_ss_spi_t spi_id = spi_config->spi;
 	struct ss_spi_qmsi_runtime *context = dev->driver_data;
 	qm_ss_spi_config_t *cfg = &context->cfg;
-	uint8_t dfs = frame_size_to_dfs(cfg->frame_size);
+	u8_t dfs = frame_size_to_dfs(cfg->frame_size);
 	qm_ss_spi_async_transfer_t *xfer;
 	int rc;
 
@@ -163,7 +163,7 @@ static int ss_spi_qmsi_transceive(struct device *dev,
 
 	xfer->rx = rx_buf;
 	xfer->rx_len = rx_buf_len / dfs;
-	xfer->tx = (uint8_t *)tx_buf;
+	xfer->tx = (u8_t *)tx_buf;
 	xfer->tx_len = tx_buf_len / dfs;
 	xfer->callback_data = dev;
 	xfer->callback = spi_qmsi_callback;
@@ -177,7 +177,7 @@ static int ss_spi_qmsi_transceive(struct device *dev,
 	}
 
 	if (context->loopback) {
-		uint32_t ctrl;
+		u32_t ctrl;
 
 		if (spi_id == 0) {
 			ctrl = __builtin_arc_lr(QM_SS_SPI_0_BASE +
@@ -249,14 +249,14 @@ static int ss_spi_qmsi_init(struct device *dev);
 
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
 static void ss_spi_master_set_power_state(struct device *dev,
-					  uint32_t power_state)
+					  u32_t power_state)
 {
 	struct ss_spi_qmsi_runtime *context = dev->driver_data;
 
 	context->device_power_state = power_state;
 }
 
-static uint32_t ss_spi_master_get_power_state(struct device *dev)
+static u32_t ss_spi_master_get_power_state(struct device *dev)
 {
 	struct ss_spi_qmsi_runtime *context = dev->driver_data;
 
@@ -296,16 +296,16 @@ static int ss_spi_master_resume_device_from_suspend(struct device *dev)
 * the *context may include IN data or/and OUT data
 */
 static int ss_spi_master_qmsi_device_ctrl(struct device *port,
-				       uint32_t ctrl_command, void *context)
+				       u32_t ctrl_command, void *context)
 {
 	if (ctrl_command == DEVICE_PM_SET_POWER_STATE) {
-		if (*((uint32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
+		if (*((u32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
 			return ss_spi_master_suspend_device(port);
-		} else if (*((uint32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
+		} else if (*((u32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
 			return ss_spi_master_resume_device_from_suspend(port);
 		}
 	} else if (ctrl_command == DEVICE_PM_GET_POWER_STATE) {
-		*((uint32_t *)context) = ss_spi_master_get_power_state(port);
+		*((u32_t *)context) = ss_spi_master_get_power_state(port);
 	}
 	return 0;
 }
@@ -387,7 +387,7 @@ static int ss_spi_qmsi_init(struct device *dev)
 {
 	const struct ss_spi_qmsi_config *spi_config = dev->config->config_info;
 	struct ss_spi_qmsi_runtime *context = dev->driver_data;
-	uint32_t *scss_intmask = NULL;
+	u32_t *scss_intmask = NULL;
 
 	switch (spi_config->spi) {
 #ifdef CONFIG_SPI_SS_0
@@ -407,7 +407,7 @@ static int ss_spi_qmsi_init(struct device *dev)
 		ss_clk_spi_enable(0);
 
 		/* Route SPI interrupts to Sensor Subsystem */
-		scss_intmask = (uint32_t *)&QM_INTERRUPT_ROUTER->ss_spi_0_int;
+		scss_intmask = (u32_t *)&QM_INTERRUPT_ROUTER->ss_spi_0_int;
 		*scss_intmask &= ~BIT(8);
 		scss_intmask++;
 		*scss_intmask &= ~BIT(8);
@@ -433,7 +433,7 @@ static int ss_spi_qmsi_init(struct device *dev)
 		ss_clk_spi_enable(1);
 
 		/* Route SPI interrupts to Sensor Subsystem */
-		scss_intmask = (uint32_t *)&QM_INTERRUPT_ROUTER->ss_spi_1_int;
+		scss_intmask = (u32_t *)&QM_INTERRUPT_ROUTER->ss_spi_1_int;
 		*scss_intmask &= ~BIT(8);
 		scss_intmask++;
 		*scss_intmask &= ~BIT(8);
diff --git a/drivers/spi/spim_nrf52.c b/drivers/spi/spim_nrf52.c
index 9e1a700fd1b..6be50fc32fd 100644
--- a/drivers/spi/spim_nrf52.c
+++ b/drivers/spi/spim_nrf52.c
@@ -30,26 +30,26 @@ struct spim_nrf52_config {
 	void (*irq_config_func)(struct device *dev);
 	struct spi_config default_cfg;
 	struct {
-		uint8_t sck;
-		uint8_t mosi;
-		uint8_t miso;
+		u8_t sck;
+		u8_t mosi;
+		u8_t miso;
 #define SS_UNUSED              255
 		/* Pin number of up to 4 slave devices */
-		uint8_t ss[4];
+		u8_t ss[4];
 	} psel;
-	uint8_t orc;
+	u8_t orc;
 };
 
 struct spim_nrf52_data {
 	struct k_sem sem;
 	struct device *gpio_port;
-	uint8_t slave;
-	uint8_t stopped:1;
-	uint8_t txd:1;
-	uint8_t rxd:1;
+	u8_t slave;
+	u8_t stopped:1;
+	u8_t txd:1;
+	u8_t rxd:1;
 #if (SYS_LOG_LEVEL > SYS_LOG_LEVEL_INFO)
-	uint32_t tx_cnt;
-	uint32_t rx_cnt;
+	u32_t tx_cnt;
+	u32_t rx_cnt;
 #endif
 };
 
@@ -84,7 +84,7 @@ static int spim_nrf52_configure(struct device *dev,
 	const struct spim_nrf52_config *config = dev->config->config_info;
 	struct spim_nrf52_data *data = dev->driver_data;
 	volatile NRF_SPIM_Type *spim = config->base;
-	uint32_t flags;
+	u32_t flags;
 
 	SYS_LOG_DBG("config=0x%x max_sys_freq=%d", spi_config->config,
 		    spi_config->max_sys_freq);
@@ -172,7 +172,7 @@ static int spim_nrf52_configure(struct device *dev,
 	return 0;
 }
 
-static int spim_nrf52_slave_select(struct device *dev, uint32_t slave)
+static int spim_nrf52_slave_select(struct device *dev, u32_t slave)
 {
 	struct spim_nrf52_data *data = dev->driver_data;
 	const struct spim_nrf52_config *config = dev->config->config_info;
@@ -191,7 +191,7 @@ static int spim_nrf52_slave_select(struct device *dev, uint32_t slave)
 	return 0;
 }
 
-static inline void spim_nrf52_csn(struct device *gpio_port, uint32_t pin,
+static inline void spim_nrf52_csn(struct device *gpio_port, u32_t pin,
 				  bool select)
 {
 	int status;
@@ -201,8 +201,8 @@ static inline void spim_nrf52_csn(struct device *gpio_port, uint32_t pin,
 }
 
 static int spim_nrf52_transceive(struct device *dev, const void *tx_buf,
-				 uint32_t tx_buf_len, void *rx_buf,
-				 uint32_t rx_buf_len)
+				 u32_t tx_buf_len, void *rx_buf,
+				 u32_t rx_buf_len)
 {
 	const struct spim_nrf52_config *config = dev->config->config_info;
 	struct spim_nrf52_data *data = dev->driver_data;
@@ -222,7 +222,7 @@ static int spim_nrf52_transceive(struct device *dev, const void *tx_buf,
 	if (tx_buf_len) {
 		__ASSERT_NO_MSG(tx_buf);
 		spim->TXD.MAXCNT = tx_buf_len;
-		spim->TXD.PTR = (uint32_t)tx_buf;
+		spim->TXD.PTR = (u32_t)tx_buf;
 		data->txd = 0;
 #if (SYS_LOG_LEVEL > SYS_LOG_LEVEL_INFO)
 		data->tx_cnt = 0;
@@ -234,7 +234,7 @@ static int spim_nrf52_transceive(struct device *dev, const void *tx_buf,
 	if (rx_buf_len) {
 		__ASSERT_NO_MSG(rx_buf);
 		spim->RXD.MAXCNT = rx_buf_len;
-		spim->RXD.PTR = (uint32_t)rx_buf;
+		spim->RXD.PTR = (u32_t)rx_buf;
 		data->rxd = 0;
 #if (SYS_LOG_LEVEL > SYS_LOG_LEVEL_INFO)
 		data->rx_cnt = 0;
diff --git a/drivers/timer/altera_avalon_timer.c b/drivers/timer/altera_avalon_timer.c
index 80a78b16730..0624f3138de 100644
--- a/drivers/timer/altera_avalon_timer.c
+++ b/drivers/timer/altera_avalon_timer.c
@@ -49,7 +49,7 @@
 #define ALTERA_AVALON_TIMER_SNAPH_MSK               (0xFFFF)
 #define ALTERA_AVALON_TIMER_SNAPH_OFST              (0)
 
-static uint32_t accumulated_cycle_count;
+static u32_t accumulated_cycle_count;
 
 static void timer_irq_handler(void *unused)
 {
diff --git a/drivers/timer/arcv2_timer0.c b/drivers/timer/arcv2_timer0.c
index b9d9a2dd433..2139c3d8a36 100644
--- a/drivers/timer/arcv2_timer0.c
+++ b/drivers/timer/arcv2_timer0.c
@@ -65,21 +65,21 @@
 #define _ARC_V2_TMR_CTRL_IP 0x8 /* interrupt pending flag */
 
 /* running total of timer count */
-static uint32_t __noinit cycles_per_tick;
-static volatile uint32_t accumulated_cycle_count;
+static u32_t __noinit cycles_per_tick;
+static volatile u32_t accumulated_cycle_count;
 
 #ifdef CONFIG_TICKLESS_IDLE
-static uint32_t __noinit max_system_ticks;
-static uint32_t __noinit programmed_limit;
-static uint32_t __noinit programmed_ticks;
+static u32_t __noinit max_system_ticks;
+static u32_t __noinit programmed_limit;
+static u32_t __noinit programmed_ticks;
 static int straddled_tick_on_idle_enter;
-extern int32_t _sys_idle_elapsed_ticks;
+extern s32_t _sys_idle_elapsed_ticks;
 #endif
 
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
-static uint32_t arcv2_timer0_device_power_state;
-static uint32_t saved_limit;
-static uint32_t saved_control;
+static u32_t arcv2_timer0_device_power_state;
+static u32_t saved_limit;
+static u32_t saved_control;
 #endif
 
 /**
@@ -88,7 +88,7 @@ static uint32_t saved_control;
  *
  * @return Current Timer0 count
  */
-static ALWAYS_INLINE uint32_t timer0_count_register_get(void)
+static ALWAYS_INLINE u32_t timer0_count_register_get(void)
 {
 	return _arc_v2_aux_reg_read(_ARC_V2_TMR0_COUNT);
 }
@@ -99,7 +99,7 @@ static ALWAYS_INLINE uint32_t timer0_count_register_get(void)
  *
  * @return N/A
  */
-static ALWAYS_INLINE void timer0_count_register_set(uint32_t value)
+static ALWAYS_INLINE void timer0_count_register_set(u32_t value)
 {
 	_arc_v2_aux_reg_write(_ARC_V2_TMR0_COUNT, value);
 }
@@ -110,7 +110,7 @@ static ALWAYS_INLINE void timer0_count_register_set(uint32_t value)
  *
  * @return N/A
  */
-static ALWAYS_INLINE uint32_t timer0_control_register_get(void)
+static ALWAYS_INLINE u32_t timer0_control_register_get(void)
 {
 	return _arc_v2_aux_reg_read(_ARC_V2_TMR0_CONTROL);
 }
@@ -121,7 +121,7 @@ static ALWAYS_INLINE uint32_t timer0_control_register_get(void)
  *
  * @return N/A
  */
-static ALWAYS_INLINE void timer0_control_register_set(uint32_t value)
+static ALWAYS_INLINE void timer0_control_register_set(u32_t value)
 {
 	_arc_v2_aux_reg_write(_ARC_V2_TMR0_CONTROL, value);
 }
@@ -132,7 +132,7 @@ static ALWAYS_INLINE void timer0_control_register_set(uint32_t value)
  *
  * @return N/A
  */
-static ALWAYS_INLINE uint32_t timer0_limit_register_get(void)
+static ALWAYS_INLINE u32_t timer0_limit_register_get(void)
 {
 	return _arc_v2_aux_reg_read(_ARC_V2_TMR0_LIMIT);
 }
@@ -143,7 +143,7 @@ static ALWAYS_INLINE uint32_t timer0_limit_register_get(void)
  *
  * @return N/A
  */
-static ALWAYS_INLINE void timer0_limit_register_set(uint32_t count)
+static ALWAYS_INLINE void timer0_limit_register_set(u32_t count)
 {
 	_arc_v2_aux_reg_write(_ARC_V2_TMR0_LIMIT, count);
 }
@@ -179,7 +179,7 @@ void _timer_int_handler(void *unused)
 #if defined(CONFIG_TICKLESS_IDLE)
 	timer0_limit_register_set(cycles_per_tick - 1);
 	__ASSERT_EVAL({},
-		      uint32_t timer_count = timer0_count_register_get(),
+		      u32_t timer_count = timer0_count_register_get(),
 		      timer_count <= (cycles_per_tick - 1),
 		      "timer_count: %d, limit %d\n", timer_count, cycles_per_tick - 1);
 
@@ -216,9 +216,9 @@ static void tickless_idle_init(void)
  * @return N/A
  */
 
-void _timer_idle_enter(int32_t ticks)
+void _timer_idle_enter(s32_t ticks)
 {
-	uint32_t  status;
+	u32_t  status;
 
 	if ((ticks == K_FOREVER) || (ticks > max_system_ticks)) {
 		/*
@@ -244,7 +244,7 @@ void _timer_idle_enter(int32_t ticks)
 		straddled_tick_on_idle_enter = 1;
 	}
 	__ASSERT_EVAL({},
-		      uint32_t timer_count = timer0_count_register_get(),
+		      u32_t timer_count = timer0_count_register_get(),
 		      timer_count <= programmed_limit,
 		      "timer_count: %d, limit %d\n", timer_count, programmed_limit);
 }
@@ -265,14 +265,14 @@ void _timer_idle_exit(void)
 		/* Aborting the tickless idle due to a straddled tick. */
 		straddled_tick_on_idle_enter = 0;
 		__ASSERT_EVAL({},
-			      uint32_t timer_count = timer0_count_register_get(),
+			      u32_t timer_count = timer0_count_register_get(),
 			      timer_count <= programmed_limit,
 			      "timer_count: %d, limit %d\n", timer_count, programmed_limit);
 		return;
 	}
 
-	uint32_t  control;
-	uint32_t  current_count;
+	u32_t  control;
+	u32_t  current_count;
 
 	current_count = timer0_count_register_get();
 	control = timer0_control_register_get();
@@ -288,7 +288,7 @@ void _timer_idle_exit(void)
 		_sys_clock_tick_announce();
 
 		__ASSERT_EVAL({},
-			      uint32_t timer_count = timer0_count_register_get(),
+			      u32_t timer_count = timer0_count_register_get(),
 			      timer_count <= programmed_limit,
 			      "timer_count: %d, limit %d\n", timer_count, programmed_limit);
 		return;
@@ -312,7 +312,7 @@ void _timer_idle_exit(void)
 	timer0_count_register_set(current_count % cycles_per_tick);
 
 	__ASSERT_EVAL({},
-		      uint32_t timer_count = timer0_count_register_get(),
+		      u32_t timer_count = timer0_count_register_get(),
 		      timer_count <= (cycles_per_tick - 1),
 		      "timer_count: %d, limit %d\n", timer_count, cycles_per_tick-1);
 }
@@ -395,17 +395,17 @@ static int sys_clock_resume(struct device *dev)
  * Implements the driver control management functionality
  * the *context may include IN data or/and OUT data
  */
-int sys_clock_device_ctrl(struct device *port, uint32_t ctrl_command,
+int sys_clock_device_ctrl(struct device *port, u32_t ctrl_command,
 			  void *context)
 {
 	if (ctrl_command == DEVICE_PM_SET_POWER_STATE) {
-		if (*((uint32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
+		if (*((u32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
 			return sys_clock_suspend(port);
-		} else if (*((uint32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
+		} else if (*((u32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
 			return sys_clock_resume(port);
 		}
 	} else if (ctrl_command == DEVICE_PM_GET_POWER_STATE) {
-		*((uint32_t *)context) = arcv2_timer0_device_power_state;
+		*((u32_t *)context) = arcv2_timer0_device_power_state;
 		return 0;
 	}
 
@@ -415,7 +415,7 @@ int sys_clock_device_ctrl(struct device *port, uint32_t ctrl_command,
 
 uint32_t _timer_cycle_get_32(void)
 {
-	uint32_t acc, count;
+	u32_t acc, count;
 
 	do {
 		acc = accumulated_cycle_count;
@@ -438,7 +438,7 @@ uint32_t _timer_cycle_get_32(void)
 void sys_clock_disable(void)
 {
 	unsigned int key;  /* interrupt lock level */
-	uint32_t control; /* timer control register value */
+	u32_t control; /* timer control register value */
 
 	key = irq_lock();
 
diff --git a/drivers/timer/cortex_m_systick.c b/drivers/timer/cortex_m_systick.c
index ba4b96b5d07..c74b677cd2e 100644
--- a/drivers/timer/cortex_m_systick.c
+++ b/drivers/timer/cortex_m_systick.c
@@ -28,7 +28,7 @@
 #include <arch/arm/cortex_m/cmsis.h>
 
 /* running total of timer count */
-static volatile uint32_t clock_accumulated_count;
+static volatile u32_t clock_accumulated_count;
 
 /*
  * A board support package's board.h header must provide definitions for the
@@ -50,22 +50,22 @@ static volatile uint32_t clock_accumulated_count;
 #endif			    /* CONFIG_TICKLESS_IDLE */
 
 #ifdef CONFIG_SYS_POWER_MANAGEMENT
-extern int32_t _NanoIdleValGet(void);
+extern s32_t _NanoIdleValGet(void);
 extern void _NanoIdleValClear(void);
-extern void _sys_power_save_idle_exit(int32_t ticks);
+extern void _sys_power_save_idle_exit(s32_t ticks);
 #endif
 
 #ifdef CONFIG_TICKLESS_IDLE
-extern int32_t _sys_idle_elapsed_ticks;
+extern s32_t _sys_idle_elapsed_ticks;
 #endif
 
 #ifdef CONFIG_TICKLESS_IDLE
-static uint32_t __noinit default_load_value; /* default count */
-static uint32_t idle_original_count;
-static uint32_t __noinit max_system_ticks;
-static uint32_t idle_original_ticks;
-static uint32_t __noinit max_load_value;
-static uint32_t __noinit timer_idle_skew;
+static u32_t __noinit default_load_value; /* default count */
+static u32_t idle_original_count;
+static u32_t __noinit max_system_ticks;
+static u32_t idle_original_ticks;
+static u32_t __noinit max_load_value;
+static u32_t __noinit timer_idle_skew;
 static unsigned char timer_mode = TIMER_MODE_PERIODIC;
 static unsigned char idle_mode = IDLE_NOT_TICKLESS;
 #endif /* CONFIG_TICKLESS_IDLE */
@@ -83,7 +83,7 @@ static unsigned char idle_mode = IDLE_NOT_TICKLESS;
  */
 static ALWAYS_INLINE void sysTickStop(void)
 {
-	uint32_t reg;
+	u32_t reg;
 
 	/*
 	 * Disable the counter and its interrupt while preserving the
@@ -108,7 +108,7 @@ static ALWAYS_INLINE void sysTickStop(void)
  */
 static ALWAYS_INLINE void sysTickStart(void)
 {
-	uint32_t reg;
+	u32_t reg;
 
 	/*
 	 * Enable the counter, its interrupt and set the clock source to be
@@ -131,7 +131,7 @@ static ALWAYS_INLINE void sysTickStart(void)
  *
  * @return the current counter value
  */
-static ALWAYS_INLINE uint32_t sysTickCurrentGet(void)
+static ALWAYS_INLINE u32_t sysTickCurrentGet(void)
 {
 	return SysTick->VAL;
 }
@@ -144,7 +144,7 @@ static ALWAYS_INLINE uint32_t sysTickCurrentGet(void)
  *
  * @return the counter's initial count/wraparound value
  */
-static ALWAYS_INLINE uint32_t sysTickReloadGet(void)
+static ALWAYS_INLINE u32_t sysTickReloadGet(void)
 {
 	return SysTick->LOAD;
 }
@@ -162,7 +162,7 @@ static ALWAYS_INLINE uint32_t sysTickReloadGet(void)
  * @return N/A
  */
 static ALWAYS_INLINE void sysTickReloadSet(
-	uint32_t count /* count from which timer is to count down */
+	u32_t count /* count from which timer is to count down */
 	)
 {
 	/*
@@ -196,7 +196,7 @@ void _timer_int_handler(void *unused)
 #endif
 
 #ifdef CONFIG_SYS_POWER_MANAGEMENT
-	int32_t numIdleTicks;
+	s32_t numIdleTicks;
 
 	/*
 	 * All interrupts are disabled when handling idle wakeup.
@@ -301,9 +301,9 @@ static void sysTickTicklessIdleInit(void)
 {
 	/* enable counter, disable interrupt and set clock src to system clock
 	 */
-	uint32_t ctrl = SysTick_CTRL_ENABLE_Msk | SysTick_CTRL_CLKSOURCE_Msk;
+	u32_t ctrl = SysTick_CTRL_ENABLE_Msk | SysTick_CTRL_CLKSOURCE_Msk;
 
-	volatile uint32_t dummy; /* used to help determine the 'skew time' */
+	volatile u32_t dummy; /* used to help determine the 'skew time' */
 
 	/* store the default reload value (which has already been set) */
 	default_load_value = sysTickReloadGet();
@@ -372,7 +372,7 @@ static void sysTickTicklessIdleInit(void)
  *
  * @return N/A
  */
-void _timer_idle_enter(int32_t ticks /* system ticks */
+void _timer_idle_enter(s32_t ticks /* system ticks */
 				)
 {
 	sysTickStop();
@@ -431,7 +431,7 @@ void _timer_idle_enter(int32_t ticks /* system ticks */
  */
 void _timer_idle_exit(void)
 {
-	uint32_t count; /* timer's current count register value */
+	u32_t count; /* timer's current count register value */
 
 	if (timer_mode == TIMER_MODE_PERIODIC) {
 		/*
@@ -465,8 +465,8 @@ void _timer_idle_exit(void)
 		_sys_idle_elapsed_ticks = idle_original_ticks - 1;
 		_sys_clock_tick_announce();
 	} else {
-		uint32_t elapsed;   /* elapsed "counter time" */
-		uint32_t remaining; /* remaining "counter time" */
+		u32_t elapsed;   /* elapsed "counter time" */
+		u32_t remaining; /* remaining "counter time" */
 
 		elapsed = idle_original_count - count;
 
@@ -515,7 +515,7 @@ void _timer_idle_exit(void)
 int _sys_clock_driver_init(struct device *device)
 {
 	/* enable counter, interrupt and set clock src to system clock */
-	uint32_t ctrl = SysTick_CTRL_ENABLE_Msk | SysTick_CTRL_TICKINT_Msk |
+	u32_t ctrl = SysTick_CTRL_ENABLE_Msk | SysTick_CTRL_TICKINT_Msk |
 			SysTick_CTRL_CLKSOURCE_Msk;
 
 	ARG_UNUSED(device);
@@ -559,7 +559,7 @@ int _sys_clock_driver_init(struct device *device)
  */
 uint32_t _timer_cycle_get_32(void)
 {
-	uint32_t cac, count;
+	u32_t cac, count;
 
 	do {
 		cac = clock_accumulated_count;
diff --git a/drivers/timer/hpet.c b/drivers/timer/hpet.c
index 8df0126a476..5e6fe2f310d 100644
--- a/drivers/timer/hpet.c
+++ b/drivers/timer/hpet.c
@@ -74,7 +74,7 @@
 
 /* convenience macros for accessing specific HPET registers */
 
-#define _HPET_GENERAL_CAPS ((volatile uint64_t *) \
+#define _HPET_GENERAL_CAPS ((volatile u64_t *) \
 			(CONFIG_HPET_TIMER_BASE_ADDRESS + GENERAL_CAPS_REG))
 
 /*
@@ -82,7 +82,7 @@
  * is performed since the most significant bits contain no useful information.
  */
 
-#define _HPET_GENERAL_CONFIG ((volatile uint32_t *) \
+#define _HPET_GENERAL_CONFIG ((volatile u32_t *) \
 			(CONFIG_HPET_TIMER_BASE_ADDRESS + GENERAL_CONFIG_REG))
 
 /*
@@ -91,21 +91,21 @@
  * (i.e. there is no need to determine the interrupt status of other timers).
  */
 
-#define _HPET_GENERAL_INT_STATUS ((volatile uint32_t *) \
+#define _HPET_GENERAL_INT_STATUS ((volatile u32_t *) \
 		(CONFIG_HPET_TIMER_BASE_ADDRESS + GENERAL_INT_STATUS_REG))
 
-#define _HPET_MAIN_COUNTER_VALUE ((volatile uint64_t *) \
+#define _HPET_MAIN_COUNTER_VALUE ((volatile u64_t *) \
 		(CONFIG_HPET_TIMER_BASE_ADDRESS + MAIN_COUNTER_VALUE_REG))
-#define _HPET_MAIN_COUNTER_LSW ((volatile uint32_t *) \
+#define _HPET_MAIN_COUNTER_LSW ((volatile u32_t *) \
 		(CONFIG_HPET_TIMER_BASE_ADDRESS + MAIN_COUNTER_VALUE_REG))
-#define _HPET_MAIN_COUNTER_MSW ((volatile uint32_t *) \
+#define _HPET_MAIN_COUNTER_MSW ((volatile u32_t *) \
 		(CONFIG_HPET_TIMER_BASE_ADDRESS + MAIN_COUNTER_VALUE_REG + 0x4))
 
-#define _HPET_TIMER0_CONFIG_CAPS ((volatile uint64_t *) \
+#define _HPET_TIMER0_CONFIG_CAPS ((volatile u64_t *) \
 		(CONFIG_HPET_TIMER_BASE_ADDRESS + TIMER0_CONFIG_CAPS_REG))
-#define _HPET_TIMER0_COMPARATOR ((volatile uint64_t *) \
+#define _HPET_TIMER0_COMPARATOR ((volatile u64_t *) \
 		(CONFIG_HPET_TIMER_BASE_ADDRESS + TIMER0_COMPARATOR_REG))
-#define _HPET_TIMER0_FSB_INT_ROUTE ((volatile uint64_t *) \
+#define _HPET_TIMER0_FSB_INT_ROUTE ((volatile u64_t *) \
 		(CONFIG_HPET_TIMER_BASE_ADDRESS + TIMER0_FSB_INT_ROUTE_REG))
 
 /* general capabilities register macros */
@@ -161,9 +161,9 @@
 
 
 #ifdef CONFIG_INT_LATENCY_BENCHMARK
-static uint32_t main_count_first_irq_value;
-static uint32_t main_count_expected_value;
-extern uint32_t _hw_irq_to_c_handler_latency;
+static u32_t main_count_first_irq_value;
+static u32_t main_count_expected_value;
+extern u32_t _hw_irq_to_c_handler_latency;
 #endif
 
 #ifdef CONFIG_HPET_TIMER_DEBUG
@@ -177,14 +177,14 @@ extern uint32_t _hw_irq_to_c_handler_latency;
 
 /* additional globals, locals, and forward declarations */
 
-extern int32_t _sys_idle_elapsed_ticks;
+extern s32_t _sys_idle_elapsed_ticks;
 
 /* main counter units per system tick */
-static uint32_t __noinit counter_load_value;
+static u32_t __noinit counter_load_value;
 /* counter value for most recent tick */
-static uint64_t counter_last_value;
+static u64_t counter_last_value;
 /* # ticks timer is programmed for */
-static int32_t programmed_ticks = 1;
+static s32_t programmed_ticks = 1;
 /* is stale interrupt possible? */
 static int stale_irq_check;
 
@@ -199,17 +199,17 @@ static int stale_irq_check;
  *
  * @return current 64-bit counter value
  */
-static uint64_t _hpetMainCounterAtomic(void)
+static u64_t _hpetMainCounterAtomic(void)
 {
-	uint32_t highBits;
-	uint32_t lowBits;
+	u32_t highBits;
+	u32_t lowBits;
 
 	do {
 		highBits = *_HPET_MAIN_COUNTER_MSW;
 		lowBits = *_HPET_MAIN_COUNTER_LSW;
 	} while (highBits != *_HPET_MAIN_COUNTER_MSW);
 
-	return ((uint64_t)highBits << 32) | lowBits;
+	return ((u64_t)highBits << 32) | lowBits;
 }
 
 #endif /* CONFIG_TICKLESS_IDLE */
@@ -233,7 +233,7 @@ void _timer_int_handler(void *unused)
 #endif
 
 #ifdef CONFIG_INT_LATENCY_BENCHMARK
-	uint32_t delta = *_HPET_MAIN_COUNTER_VALUE - main_count_expected_value;
+	u32_t delta = *_HPET_MAIN_COUNTER_VALUE - main_count_expected_value;
 
 	if (_hw_irq_to_c_handler_latency > delta) {
 		/* keep the lowest value observed */
@@ -302,7 +302,7 @@ void _timer_int_handler(void *unused)
  * Called while interrupts are locked.
  */
 
-void _timer_idle_enter(int32_t ticks /* system ticks */
+void _timer_idle_enter(s32_t ticks /* system ticks */
 				)
 {
 	/*
@@ -313,7 +313,7 @@ void _timer_idle_enter(int32_t ticks /* system ticks */
 	*_HPET_TIMER0_CONFIG_CAPS |= HPET_Tn_VAL_SET_CNF;
 	*_HPET_TIMER0_COMPARATOR =
 		(ticks >= 0) ? counter_last_value + ticks * counter_load_value
-			     : ~(uint64_t)0;
+			     : ~(u64_t)0;
 	stale_irq_check = 1;
 	programmed_ticks = ticks;
 }
@@ -335,9 +335,9 @@ void _timer_idle_enter(int32_t ticks /* system ticks */
 
 void _timer_idle_exit(void)
 {
-	uint64_t currTime = _hpetMainCounterAtomic();
-	int32_t elapsedTicks;
-	uint64_t counterNextValue;
+	u64_t currTime = _hpetMainCounterAtomic();
+	s32_t elapsedTicks;
+	u64_t counterNextValue;
 
 	/* see if idling ended because timer expired at the desired tick */
 
@@ -382,8 +382,8 @@ void _timer_idle_exit(void)
 	 */
 
 	elapsedTicks =
-		(int32_t)((currTime - counter_last_value) / counter_load_value);
-	counter_last_value += (uint64_t)elapsedTicks * counter_load_value;
+		(s32_t)((currTime - counter_last_value) / counter_load_value);
+	counter_last_value += (u64_t)elapsedTicks * counter_load_value;
 
 	counterNextValue = counter_last_value + counter_load_value;
 
@@ -433,10 +433,10 @@ void _timer_idle_exit(void)
 
 int _sys_clock_driver_init(struct device *device)
 {
-	uint64_t hpetClockPeriod;
-	uint64_t tickFempto;
+	u64_t hpetClockPeriod;
+	u64_t tickFempto;
 #ifndef CONFIG_TICKLESS_IDLE
-	uint32_t counter_load_value;
+	u32_t counter_load_value;
 #endif
 
 	ARG_UNUSED(device);
@@ -459,7 +459,7 @@ int _sys_clock_driver_init(struct device *device)
 	 * from microseconds to femptoseconds
 	 */
 
-	tickFempto = (uint64_t)sys_clock_us_per_tick * 1000000000;
+	tickFempto = (u64_t)sys_clock_us_per_tick * 1000000000;
 
 	/*
 	 * This driver shall read the COUNTER_CLK_PERIOD value from the general
@@ -477,14 +477,14 @@ int _sys_clock_driver_init(struct device *device)
 	 * 'sys_clock_us_per_tick' period
 	 */
 
-	counter_load_value = (uint32_t)(tickFempto / hpetClockPeriod);
+	counter_load_value = (u32_t)(tickFempto / hpetClockPeriod);
 
 	DBG("\n\nHPET: configuration: 0x%x, clock period: 0x%x (%d pico-s)\n",
-	       (uint32_t)(*_HPET_GENERAL_CAPS),
-	       (uint32_t)hpetClockPeriod, (uint32_t)hpetClockPeriod / 1000);
+	       (u32_t)(*_HPET_GENERAL_CAPS),
+	       (u32_t)hpetClockPeriod, (u32_t)hpetClockPeriod / 1000);
 
 	DBG("HPET: timer0: available interrupts mask 0x%x\n",
-	       (uint32_t)(*_HPET_TIMER0_CONFIG_CAPS >> 32));
+	       (u32_t)(*_HPET_TIMER0_CONFIG_CAPS >> 32));
 
 	/* Initialize sys_clock_hw_cycles_per_tick/sec */
 
@@ -595,7 +595,7 @@ int _sys_clock_driver_init(struct device *device)
 
 uint32_t _timer_cycle_get_32(void)
 {
-	return (uint32_t) *_HPET_MAIN_COUNTER_VALUE;
+	return (u32_t) *_HPET_MAIN_COUNTER_VALUE;
 }
 
 #ifdef CONFIG_SYSTEM_CLOCK_DISABLE
diff --git a/drivers/timer/loapic_timer.c b/drivers/timer/loapic_timer.c
index b979356d1b7..72c7b537a22 100644
--- a/drivers/timer/loapic_timer.c
+++ b/drivers/timer/loapic_timer.c
@@ -95,21 +95,21 @@
  */
 
 #if defined(CONFIG_LOAPIC)
-#define _REG_TIMER ((volatile uint32_t *) \
+#define _REG_TIMER ((volatile u32_t *) \
 			(CONFIG_LOAPIC_BASE_ADDRESS + LOAPIC_TIMER))
-#define _REG_TIMER_ICR ((volatile uint32_t *) \
+#define _REG_TIMER_ICR ((volatile u32_t *) \
 			(CONFIG_LOAPIC_BASE_ADDRESS + LOAPIC_TIMER_ICR))
-#define _REG_TIMER_CCR ((volatile uint32_t *) \
+#define _REG_TIMER_CCR ((volatile u32_t *) \
 			(CONFIG_LOAPIC_BASE_ADDRESS + LOAPIC_TIMER_CCR))
-#define _REG_TIMER_CFG ((volatile uint32_t *) \
+#define _REG_TIMER_CFG ((volatile u32_t *) \
 			(CONFIG_LOAPIC_BASE_ADDRESS + LOAPIC_TIMER_CONFIG))
 #define TIMER_IRQ		CONFIG_LOAPIC_TIMER_IRQ
 #define TIMER_IRQ_PRIORITY	CONFIG_LOAPIC_TIMER_IRQ_PRIORITY
 #elif defined(CONFIG_MVIC)
 
-#define _REG_TIMER	((volatile uint32_t *)MVIC_LVTTIMER)
-#define _REG_TIMER_ICR	((volatile uint32_t *)MVIC_ICR)
-#define _REG_TIMER_CCR	((volatile uint32_t *)MVIC_CCR)
+#define _REG_TIMER	((volatile u32_t *)MVIC_LVTTIMER)
+#define _REG_TIMER_ICR	((volatile u32_t *)MVIC_ICR)
+#define _REG_TIMER_CCR	((volatile u32_t *)MVIC_CCR)
 /* MVIC has no TIMER_CFG register */
 #define TIMER_IRQ		CONFIG_MVIC_TIMER_IRQ
 #define TIMER_IRQ_PRIORITY	-1
@@ -124,26 +124,26 @@
 	} while (0)
 #endif /* !CONFIG_TICKLESS_IDLE */
 #if defined(CONFIG_TICKLESS_IDLE)
-extern int32_t _sys_idle_elapsed_ticks;
+extern s32_t _sys_idle_elapsed_ticks;
 #endif /* CONFIG_TICKLESS_IDLE */
 
 /* computed counter 0 initial count value */
-static uint32_t __noinit cycles_per_tick;
+static u32_t __noinit cycles_per_tick;
 
 #if defined(CONFIG_TICKLESS_IDLE)
-static uint32_t programmed_cycles;
-static uint32_t programmed_full_ticks;
-static uint32_t __noinit max_system_ticks;
-static uint32_t __noinit cycles_per_max_ticks;
+static u32_t programmed_cycles;
+static u32_t programmed_full_ticks;
+static u32_t __noinit max_system_ticks;
+static u32_t __noinit cycles_per_max_ticks;
 static bool timer_known_to_have_expired;
 static unsigned char timer_mode = TIMER_MODE_PERIODIC;
 #endif /* CONFIG_TICKLESS_IDLE */
 
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
-static uint32_t loapic_timer_device_power_state;
-static uint32_t reg_timer_save;
+static u32_t loapic_timer_device_power_state;
+static u32_t reg_timer_save;
 #ifndef CONFIG_MVIC
-static uint32_t reg_timer_cfg_save;
+static u32_t reg_timer_cfg_save;
 #endif
 #endif
 
@@ -171,7 +171,7 @@ static inline void periodic_mode_set(void)
  * @param count Count from which timer is to count down
  * @return N/A
  */
-static inline void initial_count_register_set(uint32_t count)
+static inline void initial_count_register_set(u32_t count)
 {
 	*_REG_TIMER_ICR = count;
 }
@@ -218,7 +218,7 @@ static inline void divide_configuration_register_set(void)
  *
  * @return N/A
  */
-static inline uint32_t current_count_register_get(void)
+static inline u32_t current_count_register_get(void)
 {
 	return *_REG_TIMER_CCR;
 }
@@ -232,7 +232,7 @@ static inline uint32_t current_count_register_get(void)
  *
  * @return N/A
  */
-static inline uint32_t initial_count_register_get(void)
+static inline u32_t initial_count_register_get(void)
 {
 	return *_REG_TIMER_ICR;
 }
@@ -246,7 +246,7 @@ void _timer_int_handler(void *unused /* parameter is not used */
 #ifdef CONFIG_TICKLESS_IDLE
 	if (timer_mode == TIMER_MODE_ONE_SHOT) {
 		if (!timer_known_to_have_expired) {
-			uint32_t  cycles;
+			u32_t  cycles;
 
 			/*
 			 * The timer fired unexpectedly. This is due to one of two cases:
@@ -319,10 +319,10 @@ static void tickless_idle_init(void)
  *
  * @return N/A
  */
-void _timer_idle_enter(int32_t ticks /* system ticks */
+void _timer_idle_enter(s32_t ticks /* system ticks */
 				)
 {
-	uint32_t  cycles;
+	u32_t  cycles;
 
 	/*
 	 * Although interrupts are disabled, the LOAPIC timer is still counting
@@ -374,8 +374,8 @@ void _timer_idle_enter(int32_t ticks /* system ticks */
  */
 void _timer_idle_exit(void)
 {
-	uint32_t remaining_cycles;
-	uint32_t remaining_full_ticks;
+	u32_t remaining_cycles;
+	u32_t remaining_full_ticks;
 
 	/*
 	 * Interrupts are locked and idling has ceased. The cause of the cessation
@@ -553,17 +553,17 @@ static int sys_clock_resume(struct device *dev)
 * Implements the driver control management functionality
 * the *context may include IN data or/and OUT data
 */
-int sys_clock_device_ctrl(struct device *port, uint32_t ctrl_command,
+int sys_clock_device_ctrl(struct device *port, u32_t ctrl_command,
 			  void *context)
 {
 	if (ctrl_command == DEVICE_PM_SET_POWER_STATE) {
-		if (*((uint32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
+		if (*((u32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
 			return sys_clock_suspend(port);
-		} else if (*((uint32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
+		} else if (*((u32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
 			return sys_clock_resume(port);
 		}
 	} else if (ctrl_command == DEVICE_PM_GET_POWER_STATE) {
-		*((uint32_t *)context) = loapic_timer_device_power_state;
+		*((u32_t *)context) = loapic_timer_device_power_state;
 		return 0;
 	}
 
@@ -584,12 +584,12 @@ int sys_clock_device_ctrl(struct device *port, uint32_t ctrl_command,
 uint32_t _timer_cycle_get_32(void)
 {
 #if CONFIG_TSC_CYCLES_PER_SEC != 0
-	uint64_t tsc;
+	u64_t tsc;
 
 	/* 64-bit math to avoid overflows */
-	tsc = _tsc_read() * (uint64_t)sys_clock_hw_cycles_per_sec /
-		(uint64_t) CONFIG_TSC_CYCLES_PER_SEC;
-	return (uint32_t)tsc;
+	tsc = _tsc_read() * (u64_t)sys_clock_hw_cycles_per_sec /
+		(u64_t) CONFIG_TSC_CYCLES_PER_SEC;
+	return (u32_t)tsc;
 #else
 	/* TSC runs same as the bus speed, nothing to do but return the TSC
 	 * value
diff --git a/drivers/timer/nrf_rtc_timer.c b/drivers/timer/nrf_rtc_timer.c
index a2575ffba95..38d9128b554 100644
--- a/drivers/timer/nrf_rtc_timer.c
+++ b/drivers/timer/nrf_rtc_timer.c
@@ -28,34 +28,34 @@
  * representation as a large positive value).
  */
 #define RTC_HALF               (RTC_MASK / 2)
-#define RTC_TICKS_PER_SYS_TICK ((uint32_t)((((uint64_t)1000000UL / \
+#define RTC_TICKS_PER_SYS_TICK ((u32_t)((((u64_t)1000000UL / \
 				 CONFIG_SYS_CLOCK_TICKS_PER_SEC) * \
 				1000000000UL) / 30517578125UL) & RTC_MASK)
 
-extern int64_t _sys_clock_tick_count;
-extern int32_t _sys_idle_elapsed_ticks;
+extern s64_t _sys_clock_tick_count;
+extern s32_t _sys_idle_elapsed_ticks;
 
 /*
  * rtc_past holds the value of RTC_COUNTER at the time the last sys tick was
  * announced, in RTC ticks. It is therefore always a multiple of
  * RTC_TICKS_PER_SYS_TICK.
  */
-static uint32_t rtc_past;
+static u32_t rtc_past;
 
 #ifdef CONFIG_TICKLESS_IDLE
 /*
  * Holds the maximum sys ticks the kernel expects to see in the next
  * _sys_clock_tick_announce().
  */
-static uint32_t expected_sys_ticks;
+static u32_t expected_sys_ticks;
 #endif /* CONFIG_TICKLESS_IDLE */
 
 /*
  * Set RTC Counter Compare (CC) register to a given value in RTC ticks.
  */
-static void rtc_compare_set(uint32_t rtc_ticks)
+static void rtc_compare_set(u32_t rtc_ticks)
 {
-	uint32_t rtc_now;
+	u32_t rtc_now;
 
 	/* Try to set CC value. We assume the procedure is always successful. */
 	RTC_CC_VALUE = rtc_ticks;
@@ -96,7 +96,7 @@ static void rtc_compare_set(uint32_t rtc_ticks)
  */
 static void rtc_announce_set_next(void)
 {
-	uint32_t rtc_now, rtc_elapsed, sys_elapsed;
+	u32_t rtc_now, rtc_elapsed, sys_elapsed;
 
 	/* Read the RTC counter one single time in the beginning, so that an
 	 * increase in the counter during this procedure leads to no race
@@ -175,7 +175,7 @@ static void rtc_announce_set_next(void)
  *
  * @return N/A
  */
-void _timer_idle_enter(int32_t sys_ticks)
+void _timer_idle_enter(s32_t sys_ticks)
 {
 	/* Restrict ticks to max supported by RTC without risking overflow. */
 	if ((sys_ticks < 0) ||
@@ -307,7 +307,7 @@ int _sys_clock_driver_init(struct device *device)
 
 uint32_t _timer_cycle_get_32(void)
 {
-	uint32_t elapsed_cycles;
+	u32_t elapsed_cycles;
 
 	elapsed_cycles = (RTC_COUNTER -
 			  (_sys_clock_tick_count * RTC_TICKS_PER_SYS_TICK))
diff --git a/drivers/timer/pulpino_timer.c b/drivers/timer/pulpino_timer.c
index 9de8243e05c..74276449bca 100644
--- a/drivers/timer/pulpino_timer.c
+++ b/drivers/timer/pulpino_timer.c
@@ -15,14 +15,14 @@
 #define TIMER_CTRL_PRE(x)          (((x) & 0x07) << 3) /* Prescaler Value */
 
 typedef struct {
-	uint32_t val;
-	uint32_t ctrl;
-	uint32_t cmp;
+	u32_t val;
+	u32_t ctrl;
+	u32_t cmp;
 } pulpino_timer_t;
 
 static volatile pulpino_timer_t *timer = (pulpino_timer_t *)PULP_TIMER_A_BASE;
 
-static uint32_t accumulated_cycle_count;
+static u32_t accumulated_cycle_count;
 
 static void pulpino_timer_irq_handler(void *unused)
 {
diff --git a/drivers/timer/riscv_machine_timer.c b/drivers/timer/riscv_machine_timer.c
index ee781865661..e137ed8f0f6 100644
--- a/drivers/timer/riscv_machine_timer.c
+++ b/drivers/timer/riscv_machine_timer.c
@@ -11,8 +11,8 @@
 #include <board.h>
 
 typedef struct {
-	uint32_t val_low;
-	uint32_t val_high;
+	u32_t val_low;
+	u32_t val_high;
 } riscv_machine_timer_t;
 
 static volatile riscv_machine_timer_t *mtime =
@@ -29,7 +29,7 @@ static volatile riscv_machine_timer_t *mtimecmp =
  */
 static ALWAYS_INLINE void riscv_machine_rearm_timer(void)
 {
-	uint64_t rtc;
+	u64_t rtc;
 
 	/*
 	 * Disable timer interrupt while rearming the timer
@@ -47,15 +47,15 @@ static ALWAYS_INLINE void riscv_machine_rearm_timer(void)
 	 * This also works for other implementations.
 	 */
 	rtc = mtime->val_low;
-	rtc |= ((uint64_t)mtime->val_high << 32);
+	rtc |= ((u64_t)mtime->val_high << 32);
 
 	/*
 	 * Rearm timer to generate an interrupt after
 	 * sys_clock_hw_cycles_per_tick
 	 */
 	rtc += sys_clock_hw_cycles_per_tick;
-	mtimecmp->val_low = (uint32_t)(rtc & 0xffffffff);
-	mtimecmp->val_high = (uint32_t)((rtc >> 32) & 0xffffffff);
+	mtimecmp->val_low = (u32_t)(rtc & 0xffffffff);
+	mtimecmp->val_high = (u32_t)((rtc >> 32) & 0xffffffff);
 
 	/* Enable timer interrupt */
 	irq_enable(RISCV_MACHINE_TIMER_IRQ);
diff --git a/drivers/timer/xtensa_sys_timer.c b/drivers/timer/xtensa_sys_timer.c
index 8f53dd0817a..656a6344328 100644
--- a/drivers/timer/xtensa_sys_timer.c
+++ b/drivers/timer/xtensa_sys_timer.c
@@ -61,12 +61,12 @@
 #define IDLE_NOT_TICKLESS 0 /* non-tickless idle mode */
 #define IDLE_TICKLESS 1     /* tickless idle  mode */
 
-extern int32_t _sys_idle_elapsed_ticks;
+extern s32_t _sys_idle_elapsed_ticks;
 
-static uint32_t __noinit cycles_per_tick;
-static uint32_t __noinit max_system_ticks;
-static uint32_t idle_original_ticks;
-static uint32_t __noinit max_load_value;
+static u32_t __noinit cycles_per_tick;
+static u32_t __noinit max_system_ticks;
+static u32_t idle_original_ticks;
+static u32_t __noinit max_load_value;
 static unsigned char timer_mode = TIMER_MODE_PERIODIC;
 static unsigned char idle_mode = IDLE_NOT_TICKLESS;
 
@@ -88,11 +88,11 @@ static ALWAYS_INLINE void tickless_idle_init(void)
  * @return N/A
  */
 
-void _timer_idle_enter(int32_t ticks)
+void _timer_idle_enter(s32_t ticks)
 {
-	uint32_t P; /* Programming (current) time */
-	uint32_t F; /* Idle timer fire time */
-	uint32_t f; /* Last programmed timer fire time */
+	u32_t P; /* Programming (current) time */
+	u32_t F; /* Idle timer fire time */
+	u32_t f; /* Last programmed timer fire time */
 
 	if ((ticks == K_FOREVER) || (ticks > max_system_ticks)) {
 		/*
@@ -146,11 +146,11 @@ void _timer_idle_enter(int32_t ticks)
  */
 void _timer_idle_exit(void)
 {
-	uint32_t C; /* Current time (time within this function execution) */
-	uint32_t F; /* Idle timer programmed fire time */
-	uint32_t s; /* Requested idle timer sleep time */
-	uint32_t e; /* elapsed "Cer time" */
-	uint32_t r; /*reamining time to the timer to expire */
+	u32_t C; /* Current time (time within this function execution) */
+	u32_t F; /* Idle timer programmed fire time */
+	u32_t s; /* Requested idle timer sleep time */
+	u32_t e; /* elapsed "Cer time" */
+	u32_t r; /*reamining time to the timer to expire */
 
 	if (timer_mode == TIMER_MODE_PERIODIC) {
 		/*
@@ -314,8 +314,8 @@ int _sys_clock_driver_init(struct device *device)
 	 * for sure modify this code in order to initialize their HW.
 	 */
 	/* TODO: Implement this case: remove below code and write yours */
-	volatile uint32_t *p_mmio = (uint32_t *) 0xC0000000; /* start HW reg */
-	uint32_t interrupt = 0x00000000;
+	volatile u32_t *p_mmio = (u32_t *) 0xC0000000; /* start HW reg */
+	u32_t interrupt = 0x00000000;
 	/* Start the timer: Trigger the interrupt source drivers */
 	*p_mmio = 0xFFFFFFFF;
 	*p_mmio = interrupt;
@@ -345,7 +345,7 @@ int _sys_clock_driver_init(struct device *device)
  *
  * @return up counter of elapsed clock cycles
  */
-uint32_t _timer_cycle_get_32(void)
+u32_t _timer_cycle_get_32(void)
 {
 	return GET_TIMER_CURRENT_TIME();
 }
diff --git a/drivers/usb/device/usb_dc_dw.c b/drivers/usb/device/usb_dc_dw.c
index a409ad42811..cddb3035728 100644
--- a/drivers/usb/device/usb_dc_dw.c
+++ b/drivers/usb/device/usb_dc_dw.c
@@ -39,10 +39,10 @@
  * USB endpoint private structure.
  */
 struct usb_ep_ctrl_prv {
-	uint8_t ep_ena;
-	uint16_t mps;         /* Max ep pkt size */
+	u8_t ep_ena;
+	u16_t mps;         /* Max ep pkt size */
 	usb_dc_ep_callback cb;/* Endpoint callback function */
-	uint32_t data_len;
+	u32_t data_len;
 };
 
 /*
@@ -52,7 +52,7 @@ struct usb_dw_ctrl_prv {
 	usb_dc_status_callback status_cb;
 	struct usb_ep_ctrl_prv in_ep_ctrl[USB_DW_IN_EP_NUM];
 	struct usb_ep_ctrl_prv out_ep_ctrl[USB_DW_OUT_EP_NUM];
-	uint8_t attached;
+	u8_t attached;
 };
 
 
@@ -68,7 +68,7 @@ static inline void _usb_dw_int_unmask(void)
 #if (CONFIG_SYS_LOG_USB_DW_LEVEL >= SYS_LOG_LEVEL_DEBUG)
 static void usb_dw_reg_dump(void)
 {
-	uint8_t i;
+	u8_t i;
 
 	SYS_LOG_DBG("USB registers:");
 	SYS_LOG_DBG("  GOTGCTL : 0x%x", USB_DW->gotgctl);
@@ -113,9 +113,9 @@ static void usb_dw_reg_dump(void)
 #define usb_dw_reg_dump()
 #endif
 
-static uint8_t usb_dw_ep_is_valid(uint8_t ep)
+static u8_t usb_dw_ep_is_valid(u8_t ep)
 {
-	uint8_t ep_idx = USB_DW_EP_ADDR2IDX(ep);
+	u8_t ep_idx = USB_DW_EP_ADDR2IDX(ep);
 
 	/* Check if ep enabled */
 	if ((USB_DW_EP_ADDR2DIR(ep) == USB_EP_DIR_OUT) &&
@@ -129,9 +129,9 @@ static uint8_t usb_dw_ep_is_valid(uint8_t ep)
 	return 0;
 }
 
-static uint8_t usb_dw_ep_is_enabled(uint8_t ep)
+static u8_t usb_dw_ep_is_enabled(u8_t ep)
 {
-	uint8_t ep_idx = USB_DW_EP_ADDR2IDX(ep);
+	u8_t ep_idx = USB_DW_EP_ADDR2IDX(ep);
 
 	/* Check if ep enabled */
 	if ((USB_DW_EP_ADDR2DIR(ep) == USB_EP_DIR_OUT) &&
@@ -145,14 +145,14 @@ static uint8_t usb_dw_ep_is_enabled(uint8_t ep)
 	return 0;
 }
 
-static inline void usb_dw_udelay(uint32_t us)
+static inline void usb_dw_udelay(u32_t us)
 {
 	k_busy_wait(us);
 }
 
 static int usb_dw_reset(void)
 {
-	uint32_t cnt = 0;
+	u32_t cnt = 0;
 
 	/* Wait for AHB master idle state. */
 	while (!(USB_DW->grstctl & USB_DW_GRSTCTL_AHB_IDLE)) {
@@ -212,11 +212,11 @@ static void usb_dw_clock_disable(void)
 #endif
 }
 
-static int usb_dw_ep_set(uint8_t ep,
-	uint32_t ep_mps, enum usb_dc_ep_type ep_type)
+static int usb_dw_ep_set(u8_t ep,
+	u32_t ep_mps, enum usb_dc_ep_type ep_type)
 {
-	volatile uint32_t *p_depctl;
-	uint8_t ep_idx = USB_DW_EP_ADDR2IDX(ep);
+	volatile u32_t *p_depctl;
+	u8_t ep_idx = USB_DW_EP_ADDR2IDX(ep);
 
 	SYS_LOG_DBG("usb_dw_ep_set ep %x, mps %d, type %d", ep, ep_mps,
 		    ep_type);
@@ -289,10 +289,10 @@ static int usb_dw_ep_set(uint8_t ep,
 	return 0;
 }
 
-static void usb_dw_prep_rx(const uint8_t ep, uint8_t setup)
+static void usb_dw_prep_rx(const u8_t ep, u8_t setup)
 {
 	enum usb_dw_out_ep_idx ep_idx = USB_DW_EP_ADDR2IDX(ep);
-	uint32_t ep_mps = usb_dw_ctrl.out_ep_ctrl[ep_idx].mps;
+	u32_t ep_mps = usb_dw_ctrl.out_ep_ctrl[ep_idx].mps;
 
 	/* Set max RX size to EP mps so we get an interrupt
 	 * each time a packet is received
@@ -311,14 +311,14 @@ static void usb_dw_prep_rx(const uint8_t ep, uint8_t setup)
 	SYS_LOG_DBG("USB OUT EP%d armed", ep_idx);
 }
 
-static int usb_dw_tx(uint8_t ep, const uint8_t *const data,
-		uint32_t data_len)
+static int usb_dw_tx(u8_t ep, const u8_t *const data,
+		u32_t data_len)
 {
 	enum usb_dw_in_ep_idx ep_idx = USB_DW_EP_ADDR2IDX(ep);
-	uint32_t max_xfer_size, max_pkt_cnt, pkt_cnt, avail_space;
-	uint32_t ep_mps = usb_dw_ctrl.in_ep_ctrl[ep_idx].mps;
+	u32_t max_xfer_size, max_pkt_cnt, pkt_cnt, avail_space;
+	u32_t ep_mps = usb_dw_ctrl.in_ep_ctrl[ep_idx].mps;
 	unsigned int key;
-	uint32_t i;
+	u32_t i;
 
 	/* Check if FIFO space available */
 	avail_space = USB_DW->in_ep_reg[ep_idx].dtxfsts &
@@ -398,7 +398,7 @@ static int usb_dw_tx(uint8_t ep, const uint8_t *const data,
 	 */
 	key = irq_lock();
 	for (i = 0; i < data_len; i += 4) {
-		USB_DW_EP_FIFO(ep_idx) = *(uint32_t *)(data + i);
+		USB_DW_EP_FIFO(ep_idx) = *(u32_t *)(data + i);
 	}
 	irq_unlock(key);
 
@@ -409,7 +409,7 @@ static int usb_dw_tx(uint8_t ep, const uint8_t *const data,
 
 static int usb_dw_init(void)
 {
-	uint8_t ep;
+	u8_t ep;
 	int ret;
 
 	ret = usb_dw_reset();
@@ -466,7 +466,7 @@ static void usb_dw_handle_reset(void)
 
 static void usb_dw_handle_enum_done(void)
 {
-	uint32_t speed;
+	u32_t speed;
 
 	speed = (USB_DW->dsts & ~USB_DW_DSTS_ENUM_SPD_MASK) >>
 	    USB_DW_DSTS_ENUM_SPD_OFFSET;
@@ -483,8 +483,8 @@ static void usb_dw_handle_enum_done(void)
 /* USB ISR handler */
 static void usb_dw_isr_handler(void)
 {
-	uint32_t int_status, ep_int_status;
-	uint8_t ep_idx;
+	u32_t int_status, ep_int_status;
+	u8_t ep_idx;
 	usb_dc_ep_callback ep_cb;
 
 	/*  Read interrupt status */
@@ -528,8 +528,8 @@ static void usb_dw_isr_handler(void)
 
 		if (int_status & USB_DW_GINTSTS_RX_FLVL) {
 			/* Packet in RX FIFO */
-			uint32_t status, xfer_size;
-			uint32_t grxstsp = USB_DW->grxstsp;
+			u32_t status, xfer_size;
+			u32_t grxstsp = USB_DW->grxstsp;
 
 			ep_idx = grxstsp & USB_DW_GRXSTSR_EP_NUM_MASK;
 			status = (grxstsp & USB_DW_GRXSTSR_PKT_STS_MASK) >>
@@ -690,7 +690,7 @@ int usb_dc_reset(void)
 	return ret;
 }
 
-int usb_dc_set_address(const uint8_t addr)
+int usb_dc_set_address(const u8_t addr)
 {
 	if (addr > (USB_DW_DCFG_DEV_ADDR_MASK >> USB_DW_DCFG_DEV_ADDR_OFFSET)) {
 		return -EINVAL;
@@ -713,9 +713,9 @@ int usb_dc_ep_configure(const struct usb_dc_ep_cfg_data * const ep_cfg)
 	return 0;
 }
 
-int usb_dc_ep_set_stall(const uint8_t ep)
+int usb_dc_ep_set_stall(const u8_t ep)
 {
-	uint8_t ep_idx = USB_DW_EP_ADDR2IDX(ep);
+	u8_t ep_idx = USB_DW_EP_ADDR2IDX(ep);
 
 	if (!usb_dw_ctrl.attached && !usb_dw_ep_is_valid(ep)) {
 		return -EINVAL;
@@ -730,9 +730,9 @@ int usb_dc_ep_set_stall(const uint8_t ep)
 	return 0;
 }
 
-int usb_dc_ep_clear_stall(const uint8_t ep)
+int usb_dc_ep_clear_stall(const u8_t ep)
 {
-	uint8_t ep_idx = USB_DW_EP_ADDR2IDX(ep);
+	u8_t ep_idx = USB_DW_EP_ADDR2IDX(ep);
 
 	if (!usb_dw_ctrl.attached && !usb_dw_ep_is_valid(ep)) {
 		return -EINVAL;
@@ -752,10 +752,10 @@ int usb_dc_ep_clear_stall(const uint8_t ep)
 	return 0;
 }
 
-int usb_dc_ep_halt(const uint8_t ep)
+int usb_dc_ep_halt(const u8_t ep)
 {
-	uint8_t ep_idx = USB_DW_EP_ADDR2IDX(ep);
-	volatile uint32_t *p_depctl;
+	u8_t ep_idx = USB_DW_EP_ADDR2IDX(ep);
+	volatile u32_t *p_depctl;
 
 
 	if (!usb_dw_ctrl.attached && !usb_dw_ep_is_valid(ep)) {
@@ -783,9 +783,9 @@ int usb_dc_ep_halt(const uint8_t ep)
 	return 0;
 }
 
-int usb_dc_ep_is_stalled(const uint8_t ep, uint8_t *const stalled)
+int usb_dc_ep_is_stalled(const u8_t ep, u8_t *const stalled)
 {
-	uint8_t ep_idx = USB_DW_EP_ADDR2IDX(ep);
+	u8_t ep_idx = USB_DW_EP_ADDR2IDX(ep);
 
 	if (!usb_dw_ctrl.attached && !usb_dw_ep_is_valid(ep)) {
 		return -EINVAL;
@@ -809,9 +809,9 @@ int usb_dc_ep_is_stalled(const uint8_t ep, uint8_t *const stalled)
 	return 0;
 }
 
-int usb_dc_ep_enable(const uint8_t ep)
+int usb_dc_ep_enable(const u8_t ep)
 {
-	uint8_t ep_idx = USB_DW_EP_ADDR2IDX(ep);
+	u8_t ep_idx = USB_DW_EP_ADDR2IDX(ep);
 
 	if (!usb_dw_ctrl.attached && !usb_dw_ep_is_valid(ep)) {
 		return -EINVAL;
@@ -841,9 +841,9 @@ int usb_dc_ep_enable(const uint8_t ep)
 	return 0;
 }
 
-int usb_dc_ep_disable(const uint8_t ep)
+int usb_dc_ep_disable(const u8_t ep)
 {
-	uint8_t ep_idx = USB_DW_EP_ADDR2IDX(ep);
+	u8_t ep_idx = USB_DW_EP_ADDR2IDX(ep);
 
 	/* Disable EP interrupts */
 	if (USB_DW_EP_ADDR2DIR(ep) == USB_EP_DIR_OUT) {
@@ -873,10 +873,10 @@ int usb_dc_ep_disable(const uint8_t ep)
 	return 0;
 }
 
-int usb_dc_ep_flush(const uint8_t ep)
+int usb_dc_ep_flush(const u8_t ep)
 {
-	uint8_t ep_idx = USB_DW_EP_ADDR2IDX(ep);
-	uint32_t cnt;
+	u8_t ep_idx = USB_DW_EP_ADDR2IDX(ep);
+	u32_t cnt;
 
 	if (!usb_dw_ctrl.attached && !usb_dw_ep_is_valid(ep)) {
 		return -EINVAL;
@@ -903,8 +903,8 @@ int usb_dc_ep_flush(const uint8_t ep)
 	return 0;
 }
 
-int usb_dc_ep_write(const uint8_t ep, const uint8_t *const data,
-		const uint32_t data_len, uint32_t * const ret_bytes)
+int usb_dc_ep_write(const u8_t ep, const u8_t *const data,
+		const u32_t data_len, u32_t * const ret_bytes)
 {
 	int ret;
 
@@ -934,11 +934,11 @@ int usb_dc_ep_write(const uint8_t ep, const uint8_t *const data,
 	return 0;
 }
 
-int usb_dc_ep_read_wait(uint8_t ep, uint8_t *data, uint32_t max_data_len,
-			uint32_t *read_bytes)
+int usb_dc_ep_read_wait(u8_t ep, u8_t *data, u32_t max_data_len,
+			u32_t *read_bytes)
 {
-	uint8_t ep_idx = USB_DW_EP_ADDR2IDX(ep);
-	uint32_t i, j, data_len, bytes_to_copy;
+	u8_t ep_idx = USB_DW_EP_ADDR2IDX(ep);
+	u32_t i, j, data_len, bytes_to_copy;
 
 	if (!usb_dw_ctrl.attached && !usb_dw_ep_is_valid(ep)) {
 		SYS_LOG_ERR("No valid endpoint");
@@ -988,11 +988,11 @@ int usb_dc_ep_read_wait(uint8_t ep, uint8_t *data, uint32_t max_data_len,
 
 	/* Data in the FIFOs is always stored per 32-bit words */
 	for (i = 0; i < (bytes_to_copy & ~0x3); i += 4) {
-		*(uint32_t *)(data + i) = USB_DW_EP_FIFO(ep_idx);
+		*(u32_t *)(data + i) = USB_DW_EP_FIFO(ep_idx);
 	}
 	if (bytes_to_copy & 0x3) {
 		/* Not multiple of 4 */
-		uint32_t last_dw = USB_DW_EP_FIFO(ep_idx);
+		u32_t last_dw = USB_DW_EP_FIFO(ep_idx);
 
 		for (j = 0; j < (bytes_to_copy & 0x3); j++) {
 			*(data + i + j) =
@@ -1010,9 +1010,9 @@ int usb_dc_ep_read_wait(uint8_t ep, uint8_t *data, uint32_t max_data_len,
 
 }
 
-int usb_dc_ep_read_continue(uint8_t ep)
+int usb_dc_ep_read_continue(u8_t ep)
 {
-	uint8_t ep_idx = USB_DW_EP_ADDR2IDX(ep);
+	u8_t ep_idx = USB_DW_EP_ADDR2IDX(ep);
 
 	if (!usb_dw_ctrl.attached && !usb_dw_ep_is_valid(ep)) {
 		SYS_LOG_ERR("No valid endpoint");
@@ -1032,8 +1032,8 @@ int usb_dc_ep_read_continue(uint8_t ep)
 	return 0;
 }
 
-int usb_dc_ep_read(const uint8_t ep, uint8_t *const data,
-		const uint32_t max_data_len, uint32_t * const read_bytes)
+int usb_dc_ep_read(const u8_t ep, u8_t *const data,
+		const u32_t max_data_len, u32_t * const read_bytes)
 {
 	if (usb_dc_ep_read_wait(ep, data, max_data_len, read_bytes) != 0) {
 		return -EINVAL;
@@ -1053,9 +1053,9 @@ int usb_dc_ep_read(const uint8_t ep, uint8_t *const data,
 	return 0;
 }
 
-int usb_dc_ep_set_callback(const uint8_t ep, const usb_dc_ep_callback cb)
+int usb_dc_ep_set_callback(const u8_t ep, const usb_dc_ep_callback cb)
 {
-	uint8_t ep_idx = USB_DW_EP_ADDR2IDX(ep);
+	u8_t ep_idx = USB_DW_EP_ADDR2IDX(ep);
 
 	if (!usb_dw_ctrl.attached && !usb_dw_ep_is_valid(ep)) {
 		return -EINVAL;
diff --git a/drivers/usb/device/usb_dw_registers.h b/drivers/usb/device/usb_dw_registers.h
index 0a14569f938..bf637bcabdd 100644
--- a/drivers/usb/device/usb_dw_registers.h
+++ b/drivers/usb/device/usb_dw_registers.h
@@ -51,71 +51,71 @@ enum usb_dw_out_ep_idx {
 
 /* USB IN EP Register block type */
 struct usb_dw_in_ep_reg {
-	volatile uint32_t diepctl;
-	uint32_t reserved;
-	volatile uint32_t diepint;
-	uint32_t reserved1;
-	volatile uint32_t dieptsiz;
-	volatile uint32_t diepdma;
-	volatile uint32_t dtxfsts;
-	uint32_t reserved2;
+	volatile u32_t diepctl;
+	u32_t reserved;
+	volatile u32_t diepint;
+	u32_t reserved1;
+	volatile u32_t dieptsiz;
+	volatile u32_t diepdma;
+	volatile u32_t dtxfsts;
+	u32_t reserved2;
 };
 
 /* USB OUT EP Register block type */
 struct usb_dw_out_ep_reg {
-	volatile uint32_t doepctl;
-	uint32_t reserved;
-	volatile uint32_t doepint;
-	uint32_t reserved1;
-	volatile uint32_t doeptsiz;
-	volatile uint32_t doepdma;
-	uint32_t reserved2;
-	uint32_t reserved3;
+	volatile u32_t doepctl;
+	u32_t reserved;
+	volatile u32_t doepint;
+	u32_t reserved1;
+	volatile u32_t doeptsiz;
+	volatile u32_t doepdma;
+	u32_t reserved2;
+	u32_t reserved3;
 };
 
 /* USB Register block type */
 struct usb_dw_reg {
-	volatile uint32_t gotgctl;
-	volatile uint32_t gotgint;
-	volatile uint32_t gahbcfg;
-	volatile uint32_t gusbcfg;
-	volatile uint32_t grstctl;
-	volatile uint32_t gintsts;
-	volatile uint32_t gintmsk;
-	volatile uint32_t grxstsr;
-	volatile uint32_t grxstsp;
-	volatile uint32_t grxfsiz;
-	volatile uint32_t gnptxfsiz;
-	uint32_t reserved[5];
-	volatile uint32_t gsnpsid;
-	volatile uint32_t ghwcfg1;
-	volatile uint32_t ghwcfg2;
-	volatile uint32_t ghwcfg3;
-	volatile uint32_t ghwcfg4;
-	volatile uint32_t gdfifocfg;
-	uint32_t reserved1[43];
-	volatile uint32_t dieptxf1;
-	volatile uint32_t dieptxf2;
-	volatile uint32_t dieptxf3;
-	volatile uint32_t dieptxf4;
-	volatile uint32_t dieptxf5;
-	uint32_t reserved2[442];
-	volatile uint32_t dcfg;
-	volatile uint32_t dctl;
-	volatile uint32_t dsts;
-	uint32_t reserved3;
-	volatile uint32_t diepmsk;
-	volatile uint32_t doepmsk;
-	volatile uint32_t daint;
-	volatile uint32_t daintmsk;
-	uint32_t reserved4[2];
-	volatile uint32_t dvbusdis;
-	volatile uint32_t dvbuspulse;
-	volatile uint32_t dthrctl;
-	volatile uint32_t diepempmsk;
-	uint32_t reserved5[50];
+	volatile u32_t gotgctl;
+	volatile u32_t gotgint;
+	volatile u32_t gahbcfg;
+	volatile u32_t gusbcfg;
+	volatile u32_t grstctl;
+	volatile u32_t gintsts;
+	volatile u32_t gintmsk;
+	volatile u32_t grxstsr;
+	volatile u32_t grxstsp;
+	volatile u32_t grxfsiz;
+	volatile u32_t gnptxfsiz;
+	u32_t reserved[5];
+	volatile u32_t gsnpsid;
+	volatile u32_t ghwcfg1;
+	volatile u32_t ghwcfg2;
+	volatile u32_t ghwcfg3;
+	volatile u32_t ghwcfg4;
+	volatile u32_t gdfifocfg;
+	u32_t reserved1[43];
+	volatile u32_t dieptxf1;
+	volatile u32_t dieptxf2;
+	volatile u32_t dieptxf3;
+	volatile u32_t dieptxf4;
+	volatile u32_t dieptxf5;
+	u32_t reserved2[442];
+	volatile u32_t dcfg;
+	volatile u32_t dctl;
+	volatile u32_t dsts;
+	u32_t reserved3;
+	volatile u32_t diepmsk;
+	volatile u32_t doepmsk;
+	volatile u32_t daint;
+	volatile u32_t daintmsk;
+	u32_t reserved4[2];
+	volatile u32_t dvbusdis;
+	volatile u32_t dvbuspulse;
+	volatile u32_t dthrctl;
+	volatile u32_t diepempmsk;
+	u32_t reserved5[50];
 	struct usb_dw_in_ep_reg in_ep_reg[USB_DW_IN_EP_NUM];
-	uint32_t reserved6[80];
+	u32_t reserved6[80];
 	struct usb_dw_out_ep_reg out_ep_reg[USB_DW_OUT_EP_NUM];
 };
 
@@ -201,7 +201,7 @@ struct usb_dw_reg {
 #error "Unsupported board"
 #endif
 
-#define USB_DW_EP_FIFO(ep) (*(uint32_t *)(USB_DW_BASE + 0x1000 * (ep + 1)))
+#define USB_DW_EP_FIFO(ep) (*(u32_t *)(USB_DW_BASE + 0x1000 * (ep + 1)))
 /* USB register block base address */
 #define USB_DW ((struct usb_dw_reg *)USB_DW_BASE)
 
diff --git a/drivers/watchdog/iwdg_stm32.h b/drivers/watchdog/iwdg_stm32.h
index b826314a625..ca24eecc849 100644
--- a/drivers/watchdog/iwdg_stm32.h
+++ b/drivers/watchdog/iwdg_stm32.h
@@ -30,38 +30,38 @@
 
 /* 19.4.1 IWDG_KR */
 union __iwdg_kr {
-	uint32_t val;
+	u32_t val;
 	struct {
-		uint16_t key;
-		uint16_t rsvd;
+		u16_t key;
+		u16_t rsvd;
 	} bit;
 };
 
 /* 19.4.2 IWDG_PR */
 union __iwdg_pr {
-	uint32_t val;
+	u32_t val;
 	struct {
-		uint32_t pr :3 __packed;
-		uint32_t rsvd__3_31 :29 __packed;
+		u32_t pr :3 __packed;
+		u32_t rsvd__3_31 :29 __packed;
 	} bit;
 };
 
 /* 19.4.3 IWDG_RLR */
 union __iwdg_rlr {
-	uint32_t val;
+	u32_t val;
 	struct {
-		uint32_t rl :12 __packed;
-		uint32_t rsvd__12_31 :20 __packed;
+		u32_t rl :12 __packed;
+		u32_t rsvd__12_31 :20 __packed;
 	} bit;
 };
 
 /* 19.4.4 IWDG_SR */
 union __iwdg_sr {
-	uint32_t val;
+	u32_t val;
 	struct {
-		uint32_t pvu :1 __packed;
-		uint32_t rvu :1 __packed;
-		uint32_t rsvd__2_31 :30 __packed;
+		u32_t pvu :1 __packed;
+		u32_t rvu :1 __packed;
+		u32_t rsvd__2_31 :30 __packed;
 	} bit;
 };
 
diff --git a/drivers/watchdog/wdog_cmsdk_apb.c b/drivers/watchdog/wdog_cmsdk_apb.c
index 50ff4b899f2..d0a9374903a 100644
--- a/drivers/watchdog/wdog_cmsdk_apb.c
+++ b/drivers/watchdog/wdog_cmsdk_apb.c
@@ -16,25 +16,25 @@
 
 struct wdog_cmsdk_apb {
 	/* offset: 0x000 (r/w) watchdog load register */
-	volatile uint32_t  load;
+	volatile u32_t  load;
 	/* offset: 0x004 (r/ ) watchdog value register */
-	volatile uint32_t  value;
+	volatile u32_t  value;
 	/* offset: 0x008 (r/w) watchdog control register */
-	volatile uint32_t  ctrl;
+	volatile u32_t  ctrl;
 	/* offset: 0x00c ( /w) watchdog clear interrupt register */
-	volatile uint32_t  intclr;
+	volatile u32_t  intclr;
 	/* offset: 0x010 (r/ ) watchdog raw interrupt status register */
-	volatile uint32_t  rawintstat;
+	volatile u32_t  rawintstat;
 	/* offset: 0x014 (r/ ) watchdog interrupt status register */
-	volatile uint32_t  maskintstat;
-	volatile uint32_t  reserved0[762];
+	volatile u32_t  maskintstat;
+	volatile u32_t  reserved0[762];
 	/* offset: 0xc00 (r/w) watchdog lock register */
-	volatile uint32_t  lock;
-	volatile uint32_t  reserved1[191];
+	volatile u32_t  lock;
+	volatile u32_t  reserved1[191];
 	/* offset: 0xf00 (r/w) watchdog integration test control register */
-	volatile uint32_t  itcr;
+	volatile u32_t  itcr;
 	/* offset: 0xf04 ( /w) watchdog integration test output set register */
-	volatile uint32_t  itop;
+	volatile u32_t  itop;
 };
 
 #define CMSDK_APB_WDOG_LOAD		(0xFFFFFFFF << 0)
diff --git a/drivers/watchdog/wdt_qmsi.c b/drivers/watchdog/wdt_qmsi.c
index 381014ebd5b..2350f23ff10 100644
--- a/drivers/watchdog/wdt_qmsi.c
+++ b/drivers/watchdog/wdt_qmsi.c
@@ -21,7 +21,7 @@ struct wdt_data {
 	struct k_sem sem;
 #endif
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
-	uint32_t device_power_state;
+	u32_t device_power_state;
 #endif
 };
 
@@ -110,14 +110,14 @@ static const struct wdt_driver_api api = {
 #ifdef CONFIG_DEVICE_POWER_MANAGEMENT
 static qm_wdt_context_t wdt_ctx;
 
-static void wdt_qmsi_set_power_state(struct device *dev, uint32_t power_state)
+static void wdt_qmsi_set_power_state(struct device *dev, u32_t power_state)
 {
 	struct wdt_data *context = dev->driver_data;
 
 	context->device_power_state = power_state;
 }
 
-static uint32_t wdt_qmsi_get_power_state(struct device *dev)
+static u32_t wdt_qmsi_get_power_state(struct device *dev)
 {
 	struct wdt_data *context = dev->driver_data;
 
@@ -146,17 +146,17 @@ static int wdt_resume_device_from_suspend(struct device *dev)
 * Implements the driver control management functionality
 * the *context may include IN data or/and OUT data
 */
-static int wdt_qmsi_device_ctrl(struct device *dev, uint32_t ctrl_command,
+static int wdt_qmsi_device_ctrl(struct device *dev, u32_t ctrl_command,
 				void *context)
 {
 	if (ctrl_command == DEVICE_PM_SET_POWER_STATE) {
-		if (*((uint32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
+		if (*((u32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
 			return wdt_suspend_device(dev);
-		} else if (*((uint32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
+		} else if (*((u32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
 			return wdt_resume_device_from_suspend(dev);
 		}
 	} else if (ctrl_command == DEVICE_PM_GET_POWER_STATE) {
-		*((uint32_t *)context) = wdt_qmsi_get_power_state(dev);
+		*((u32_t *)context) = wdt_qmsi_get_power_state(dev);
 		return 0;
 	}