drivers: gpio_sam: Add ACCESS_BY_PORT mode for gpio config
ACCESS_BY_PORT mode can configure all the pins the same way in the port. Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
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parent
28080d3896
commit
ccab779b48
1 changed files with 27 additions and 10 deletions
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@ -28,17 +28,8 @@ struct gpio_sam_runtime {
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#define DEV_CFG(dev) \
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((const struct gpio_sam_config *const)(dev)->config->config_info)
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static int gpio_sam_config(struct device *dev, int access_op, u32_t pin,
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int flags)
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static int gpio_sam_config_pin(Pio *const pio, u32_t mask, int flags)
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{
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const struct gpio_sam_config * const cfg = DEV_CFG(dev);
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Pio *const pio = cfg->regs;
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u32_t mask = 1 << pin;
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if (access_op != GPIO_ACCESS_BY_PIN) {
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return -ENOTSUP;
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}
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/* Setup the pin direcion. */
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if ((flags & GPIO_DIR_MASK) == GPIO_DIR_OUT) {
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pio->PIO_OER = mask;
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@ -116,6 +107,32 @@ static int gpio_sam_config(struct device *dev, int access_op, u32_t pin,
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return 0;
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}
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static int gpio_sam_config(struct device *dev, int access_op, u32_t pin,
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int flags)
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{
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const struct gpio_sam_config * const cfg = DEV_CFG(dev);
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Pio *const pio = cfg->regs;
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int i, result;
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switch (access_op) {
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case GPIO_ACCESS_BY_PIN:
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gpio_sam_config_pin(pio, BIT(pin), flags);
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break;
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case GPIO_ACCESS_BY_PORT:
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for (i = 0; i < 32; i++) {
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result = gpio_sam_config_pin(pio, BIT(i), flags);
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if (result < 0) {
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return result;
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}
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}
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break;
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default:
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return -ENOTSUP;
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}
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return 0;
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}
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static int gpio_sam_write(struct device *dev, int access_op, u32_t pin,
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u32_t value)
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{
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