soc: rp2350: Add initial support for the Raspberry Pi RP2350

RP2350 is Raspberry Pi's newest SoC. From the datasheet:

"RP2350 is a new family of microcontrollers from Raspberry Pi that
offers significant enhancements over RP2040. Key features include:
• Dual Cortex-M33 or Hazard3 processors at 150 MHz
• 520 kB on-chip SRAM, in 10 independent banks
• 8 kB of one-time-programmable storage (OTP)
• Up to 16 MB of external QSPI flash/PSRAM via dedicated QSPI bus
...
"

This commit introduces some changes to support the existing RP2040 and
what is describe by Raspberry Pi as the "RP2350 family". Currently there
are 4 published products in the family: RP2350A, RP2350B, RP2354A, and
RP2354A. Within Zephyr's taxonomy, split the configuration as follows:
Family: Raspberry Pi Pico. This contains all RP2XXX SoCs,
SoC Series: RP2040 and RP2350.
SoC: RP2040 and, for now, just the RP2350A, which is present on the Pico
2, where the A suffix indicates  QFN-60 package type. This structure is
reflected in `soc/raspberrypi/soc.yml`, and somewhat assumes that there
won't be a RP2050, for example, as a RP2040 with more RAM.

This is foundation work ahead of introducing support for Raspberry Pi's
Pico 2 board, which is fitted with a RP2350A and 4MB of flash.

Signed-off-by: Andrew Featherstone <andrew.featherstone@gmail.com>
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>

soc/raspberrypi/rpi_pico/CMakeLists.txt

@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: Apache-2.0
+
+add_subdirectory(common)
+add_subdirectory(${SOC_SERIES})

soc/raspberrypi/rpi_pico/Kconfig

@@ -0,0 +1,11 @@
+# Raspberry Pi (RP) MCU line
+
+# Copyright (c) 2021 Nordic Semiconductor ASA
+# Copyright (c) 2021 Yonatan Schachter
+# SPDX-License-Identifier: Apache-2.0
+
+if SOC_FAMILY_RPI_PICO
+
+rsource "*/Kconfig"
+
+endif # SOC_FAMILY_RPI_PICO

soc/raspberrypi/rpi_pico/Kconfig.defconfig

@@ -0,0 +1,10 @@
+# Raspberry Pi (RP) MCU line
+
+# Copyright (c) 2021 Nordic Semiconductor ASA
+# SPDX-License-Identifier: Apache-2.0
+
+if SOC_FAMILY_RPI_PICO
+
+rsource "*/Kconfig.defconfig"
+
+endif # SOC_FAMILY_RPI_PICO

soc/raspberrypi/rpi_pico/Kconfig.soc

@@ -0,0 +1,12 @@
+# Raspberry Pi (RP) MCU line
+
+# Copyright (c) 2021 Nordic Semiconductor ASA
+# SPDX-License-Identifier: Apache-2.0
+
+config SOC_FAMILY_RPI_PICO
+	bool
+
+config SOC_FAMILY
+	default "rpi_pico" if SOC_FAMILY_RPI_PICO
+
+rsource "*/Kconfig.soc"

soc/raspberrypi/rpi_pico/common/CMakeLists.txt

@@ -0,0 +1,8 @@
+# Copyright (c) 2024 Andrew Featherstone
+# SPDX-License-Identifier: Apache-2.0
+
+zephyr_include_directories(.)
+
+zephyr_sources(
+	soc.c
+)

soc/raspberrypi/rpi_pico/common/pinctrl_soc.h

@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2021 Yonatan Schachter
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef ZEPHYR_SOC_ARM_RPI_PICO_RP2_PINCTRL_SOC_H_
+#define ZEPHYR_SOC_ARM_RPI_PICO_RP2_PINCTRL_SOC_H_
+
+#include <zephyr/dt-bindings/pinctrl/rpi-pico-rp2040-pinctrl.h>
+
+/**
+ * @brief Type to hold a pin's pinctrl configuration.
+ */
+struct rpi_pinctrl_soc_pin {
+	/** Pin number 0..29 */
+	uint32_t pin_num : 5;
+	/** Alternative function (UART, SPI, etc.) */
+	uint32_t alt_func : 4;
+	/** Maximum current used by a pin, in mA */
+	uint32_t drive_strength : 4;
+	/** Slew rate, may be either false (slow) or true (fast) */
+	uint32_t slew_rate : 1;
+	/** Enable the internal pull up resistor */
+	uint32_t pullup : 1;
+	/** Enable the internal pull down resistor */
+	uint32_t pulldown : 1;
+	/** Enable the pin as an input */
+	uint32_t input_enable : 1;
+	/** Enable the internal schmitt trigger */
+	uint32_t schmitt_enable : 1;
+	/** Output-enable override */
+	uint32_t oe_override : 2;
+};
+
+typedef struct rpi_pinctrl_soc_pin pinctrl_soc_pin_t;
+
+/**
+ * @brief Utility macro to initialize each pin.
+ *
+ * @param node_id Node identifier.
+ * @param prop Property name.
+ * @param idx Property entry index.
+ */
+#define Z_PINCTRL_STATE_PIN_INIT(node_id, prop, idx)				\
+	{									\
+		RP2_GET_PIN_NUM(DT_PROP_BY_IDX(node_id, prop, idx)),		\
+		RP2_GET_PIN_ALT_FUNC(DT_PROP_BY_IDX(node_id, prop, idx)),	\
+		DT_ENUM_IDX(node_id, drive_strength),				\
+		DT_ENUM_IDX(node_id, slew_rate),				\
+		DT_PROP(node_id, bias_pull_up),					\
+		DT_PROP(node_id, bias_pull_down),				\
+		DT_PROP(node_id, input_enable),					\
+		DT_PROP(node_id, input_schmitt_enable),				\
+		DT_PROP(node_id, raspberrypi_oe_override),				\
+	},
+
+/**
+ * @brief Utility macro to initialize state pins contained in a given property.
+ *
+ * @param node_id Node identifier.
+ * @param prop Property name describing state pins.
+ */
+#define Z_PINCTRL_STATE_PINS_INIT(node_id, prop)				\
+	{DT_FOREACH_CHILD_VARGS(DT_PHANDLE(node_id, prop),			\
+				DT_FOREACH_PROP_ELEM, pinmux,			\
+				Z_PINCTRL_STATE_PIN_INIT)}
+
+#define RP2_GET_PIN_NUM(pinctrl) \
+	(((pinctrl) >> RP2_PIN_NUM_POS) & RP2_PIN_NUM_MASK)
+#define RP2_GET_PIN_ALT_FUNC(pinctrl) \
+	(((pinctrl) >> RP2_ALT_FUNC_POS) & RP2_ALT_FUNC_MASK)
+
+#endif /* ZEPHYR_SOC_ARM_RPI_PICO_RP2_PINCTRL_SOC_H_ */

soc/raspberrypi/rpi_pico/common/soc.c

@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2021 Nordic Semiconductor ASA
+ * Copyright (c) 2021 Yonatan Schachter
+ * Copyright (c) 2024 Andrew Featherstone
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file
+ * @brief System/hardware module for Raspberry Pi RP2xxx family of processors
+ *
+ * This module provides routines to initialize and support board-level hardware
+ * for the Raspberry Pi RP2xxx family of processors (RP2040, RP235x).
+ */
+
+#include <stdio.h>
+
+#include <zephyr/fatal.h>
+#include <zephyr/logging/log.h>
+
+LOG_MODULE_REGISTER(soc, CONFIG_SOC_LOG_LEVEL);
+
+/*
+ * Some pico-sdk drivers call panic on fatal error.
+ * This alternative implementation of panic handles the panic
+ * through Zephyr.
+ */
+void __attribute__((noreturn)) panic(const char *fmt, ...)
+{
+	va_list args;
+
+	va_start(args, fmt);
+	vprintf(fmt, args);
+	k_fatal_halt(K_ERR_CPU_EXCEPTION);
+}

soc/raspberrypi/rpi_pico/common/soc.h

@@ -0,0 +1,17 @@
+/*
+ * Copyright (c) 2016 Linaro Limited
+ * Copyright (c) 2021 Yonatan Schachter
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file SoC configuration macros for the Raspberry Pi RP2040 family processors
+ */
+
+#ifndef _RPI_PICO_COMMON_SOC_H_
+#define _RPI_PICO_COMMON_SOC_H_
+
+#include <cmsis_core_m_defaults.h>
+
+#endif /* _RPI_PICO_COMMON_SOC_H_ */

soc/raspberrypi/rpi_pico/rp2040/CMakeLists.txt

@@ -0,0 +1,6 @@
+# Copyright (c) 2021 Yonatan Schachter
+# SPDX-License-Identifier: Apache-2.0
+
+zephyr_include_directories(.)
+
+set(SOC_LINKER_SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/linker.ld CACHE INTERNAL "")

soc/raspberrypi/rpi_pico/rp2040/Kconfig

@@ -0,0 +1,57 @@
+# Raspberry Pi RP2XXX MCU line
+
+# Copyright (c) 2021 Nordic Semiconductor ASA
+# Copyright (c) 2021 Yonatan Schachter
+# SPDX-License-Identifier: Apache-2.0
+
+config SOC_SERIES_RP2040
+	select ARM
+	select CPU_CORTEX_M0PLUS
+	select CPU_CORTEX_M_HAS_SYSTICK
+	select CPU_CORTEX_M_HAS_VTOR
+	select CPU_HAS_ARM_MPU
+	select HAS_RPI_PICO
+	select XIP
+	select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE
+	help
+	  Enable support for Raspberry Pi RP2040 MCU series
+
+if SOC_SERIES_RP2040
+
+config RP2_REQUIRES_SECOND_STAGE_BOOT
+	bool
+	default y if FLASH_LOAD_OFFSET = 0x100
+
+# Flash type used by the SoC. The board should select the one used.
+
+config RP2_FLASH_W25Q080
+	bool
+	help
+	  Configure RP2 to use a W25Q080 flash chip, or similar. Should be selected
+	  by the board definition, not the user.
+
+config RP2_FLASH_GENERIC_03H
+	bool
+	help
+	  Configure RP2 to use a flash chip supporting the standard 03h command.
+	  Should be selected by the board definition, not the user.
+
+config RP2_FLASH_IS25LP080
+	bool
+	help
+	  Configure RP2 to use a IS25LP080 flash chip, or similar. Should be selected
+	  by the board definition, not the user.
+
+config RP2_FLASH_W25X10CL
+	bool
+	help
+	  Configure RP2 to use a W25X10CL flash chip, or similar. Should be selected
+	  by the board definition, not the user.
+
+config RP2_FLASH_AT25SF128A
+	bool
+	help
+	  Configure RP2 to use a AT25SF128A flash chip, or similar. Should be selected
+	  by the board definition, not the user.
+
+endif

soc/raspberrypi/rpi_pico/rp2040/Kconfig.defconfig

@@ -0,0 +1,14 @@
+# Raspberry Pi RP2040 MCU line
+
+# Copyright (c) 2021 Nordic Semiconductor ASA
+# Copyright (c) 2021 Yonatan Schachter
+# SPDX-License-Identifier: Apache-2.0
+
+if SOC_SERIES_RP2040
+
+rsource "Kconfig.defconfig.rp2*"
+
+config NUM_IRQS
+	default 26
+
+endif # SOC_SERIES_RP2040

soc/raspberrypi/rpi_pico/rp2040/Kconfig.defconfig.rp2040

@@ -0,0 +1,10 @@
+# # Raspberry Pi RP2040 MCU
+
+# Copyright (c) 2021 Nordic Semiconductor ASA
+# SPDX-License-Identifier: Apache-2.0
+
+config BUILD_OUTPUT_UF2_USE_FLASH_BASE
+	default y if RP2_REQUIRES_SECOND_STAGE_BOOT
+
+config BUILD_OUTPUT_UF2_USE_FLASH_OFFSET
+	default y if !RP2_REQUIRES_SECOND_STAGE_BOOT

soc/raspberrypi/rpi_pico/rp2040/Kconfig.soc

@@ -0,0 +1,19 @@
+# Raspberry Pi RP2040 MCU line
+
+# Copyright (c) 2021 Nordic Semiconductor ASA
+# Copyright (c) 2021 Yonatan Schachter
+# SPDX-License-Identifier: Apache-2.0
+
+config SOC_SERIES
+	default "rp2040" if SOC_SERIES_RP2040
+
+config SOC_SERIES_RP2040
+	bool
+	select SOC_FAMILY_RPI_PICO
+
+config SOC_RP2040
+	bool
+	select SOC_SERIES_RP2040
+
+config SOC
+	default "rp2040" if SOC_RP2040

soc/raspberrypi/rpi_pico/rp2040/linker.ld

@@ -0,0 +1,29 @@
+/* linker.ld - Linker command/script file */
+
+/*
+ * Copyright (c) 2014 Wind River Systems, Inc.
+ * Copyright (c) 2021 Yonatan Schachter
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/*
+ * The Second Stage Bootloader is only linked to the app that
+ * resides at 0x100. This can be the application, or a bootloader
+ * such as mcuboot.
+ */
+#if CONFIG_RP2_REQUIRES_SECOND_STAGE_BOOT
+MEMORY
+{
+	BOOT_FLASH (r) : ORIGIN = 0x10000000, LENGTH = 256
+}
+
+SECTIONS
+{
+	.boot2 : {
+		KEEP(*(.boot2))
+	} > BOOT_FLASH
+}
+#endif /* CONFIG_RP2_REQUIRES_SECOND_STAGE_BOOT */
+
+#include <zephyr/arch/arm/cortex_m/scripts/linker.ld>

soc/raspberrypi/rpi_pico/rp2350/CMakeLists.txt

@@ -0,0 +1,10 @@
+# Copyright (c) 2021 Yonatan Schachter
+# SPDX-License-Identifier: Apache-2.0
+
+zephyr_library()
+
+zephyr_library_sources(soc.c)
+
+zephyr_include_directories(.)
+
+set(SOC_LINKER_SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/linker.ld CACHE INTERNAL "")

soc/raspberrypi/rpi_pico/rp2350/Kconfig

@@ -0,0 +1,29 @@
+# Raspberry Pi RP235XX MCU line
+
+# Copyright (c) 2024 Andrew Featherstone
+# SPDX-License-Identifier: Apache-2.0
+
+config SOC_SERIES_RP2350
+	select HAS_RPI_PICO
+	select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE
+	select SOC_RESET_HOOK
+	select XIP
+
+config SOC_RP2350A_M33
+	select ARM
+	select ARM_TRUSTZONE_M
+	select CPU_CORTEX_M_HAS_SYSTICK
+	select CPU_CORTEX_M_HAS_VTOR
+	select CPU_CORTEX_M33
+	select CPU_HAS_ARM_MPU
+	select CPU_HAS_ARM_SAU
+
+config RP2_REQUIRES_IMAGE_DEFINITION_BLOCK
+	bool
+	default y
+	# Currently the IDF only supports using the Cortex-M33 cores. Enforce
+	# this at build configuration time.
+	depends on SOC_SERIES_RP2350 && CPU_CORTEX_M33
+	help
+	  Include an Image Definition Block (IMAGE_DEF) to enable the bootroom in
+	  RP23XX devices to consider this a valid image in flash.

soc/raspberrypi/rpi_pico/rp2350/Kconfig.defconfig

@@ -0,0 +1,11 @@
+# Raspberry Pi RP2350 MCU line
+
+# Copyright (c) 2024 Andrew Featherstone
+# SPDX-License-Identifier: Apache-2.0
+
+if SOC_SERIES_RP2350
+
+config NUM_IRQS
+	default 52
+
+endif # SOC_SERIES_RP2350

soc/raspberrypi/rpi_pico/rp2350/Kconfig.soc

@@ -0,0 +1,24 @@
+# Raspberry Pi RP2350 MCU line
+
+# Copyright (c) 2024 Andrew Featherstone
+# SPDX-License-Identifier: Apache-2.0
+
+config SOC_SERIES_RP2350
+	bool
+	select SOC_FAMILY_RPI_PICO
+
+config SOC_SERIES
+	default "rp2350" if SOC_SERIES_RP2350
+
+config SOC_RP2350A
+	bool
+	select SOC_SERIES_RP2350
+
+config SOC_RP2350A_M33
+	bool
+	select SOC_RP2350A
+	help
+	  Use the RP2350A with a Cortex-M33 core in both 'sockets'.
+
+config SOC
+	default "rp2350a" if SOC_RP2350A

soc/raspberrypi/rpi_pico/rp2350/linker.ld

@@ -0,0 +1,27 @@
+/* linker.ld - Linker command/script file */
+
+/*
+ * Copyright (c) 2024 Andrew Featherstone
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+MEMORY
+{
+	IMAGE_DEF_FLASH (r) : ORIGIN = 0x10000000, LENGTH = 128
+}
+
+SECTIONS
+{
+	.image_def : {
+		LONG(0xffffded3) /* PICOBIN_BLOCK_MARKER_START */
+		LONG(0x10210142) /* IMAGE_DEF Item */
+		LONG(0x00000203) /* VECTOR_TABLE Item */
+		LONG(ABSOLUTE(_vector_start)) /* - Address of the vector table in flash */
+		LONG(0x000003ff) /* Last Item in Block */
+		LONG(0x00000000) /* End of block loop */
+		LONG(0xab123579) /* PICOBIN_BLOCK_MARKER_END */
+	} > IMAGE_DEF_FLASH
+}
+
+#include <zephyr/arch/arm/cortex_m/scripts/linker.ld>

soc/raspberrypi/rpi_pico/rp2350/soc.c

@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2024 Andrew Featherstone
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file
+ * @brief System/hardware module for Raspberry Pi RP235xx MCUs
+ *
+ * This module provides routines to initialize and support board-level hardware
+ * for the Raspberry Pi RP235xx (RP2350A, RP2350B, RP2354A, RP2354B).
+ */
+
+#if CONFIG_SOC_RESET_HOOK
+#include <pico/runtime_init.h>
+
+
+void soc_reset_hook(void)
+{
+	runtime_init_per_core_enable_coprocessors();
+}
+
+#endif /* CONFIG_SOC_RESET_HOOK */

soc/raspberrypi/rpi_pico/soc.yml

@@ -0,0 +1,11 @@
+family:
+- name: rpi_pico
+  series:
+  - name: rp2040
+    socs:
+    - name: rp2040
+  - name: rp2350
+    socs:
+    - name: rp2350a
+      cpuclusters:
+      - name: m33