arch: arm: aarch32: clear CPACR for every CPU that has a FPU

Upon reset, the Co-Processor Access Control Register is, normally,
0x00000000. However, it might be left un-cleared by firmware running
before Zephyr boot.
This restores the register back to reset value, even if CONFIG_FLOAT
is not set.
Clearing before setting supports switching between Full access
and Privileged access only.

Refactor enable_floating_point to support initialize
floating point registers for every CPU that has a FPU.

Signed-off-by: Luuk Bosma <l.bosma@interay.com>
This commit is contained in:
Luuk Bosma 2020-02-27 08:26:08 +01:00 committed by Johan Hedberg
commit cc21aba55f

View file

@ -76,11 +76,18 @@ void __weak relocate_vector_table(void)
#endif /* CONFIG_CPU_CORTEX_M_HAS_VTOR */
#ifdef CONFIG_FLOAT
static inline void enable_floating_point(void)
#if defined(CONFIG_CPU_HAS_FPU)
static inline void z_arm_floating_point_init(void)
{
/*
* Upon reset, the Co-Processor Access Control Register is 0x00000000.
* Upon reset, the Co-Processor Access Control Register is, normally,
* 0x00000000. However, it might be left un-cleared by firmware running
* before Zephyr boot.
*/
SCB->CPACR &= (~(CPACR_CP10_Msk | CPACR_CP11_Msk));
#if defined(CONFIG_FLOAT)
/*
* Enable CP10 and CP11 Co-Processors to enable access to floating
* point registers.
*/
@ -135,12 +142,10 @@ static inline void enable_floating_point(void)
* will be activated (FPCA bit on the CONTROL register) in the presence
* of floating point instructions.
*/
#endif /* CONFIG_FLOAT */
}
#else
static inline void enable_floating_point(void)
{
}
#endif
#endif /* CONFIG_CPU_HAS_FPU */
extern FUNC_NORETURN void z_cstart(void);
/**
@ -154,7 +159,9 @@ extern FUNC_NORETURN void z_cstart(void);
void z_arm_prep_c(void)
{
relocate_vector_table();
enable_floating_point();
#if defined(CONFIG_CPU_HAS_FPU)
z_arm_floating_point_init();
#endif
z_bss_zero();
z_data_copy();
#if defined(CONFIG_ARMV7_R) && defined(CONFIG_INIT_STACKS)