arch: arm: aarch32: clear CPACR for every CPU that has a FPU
Upon reset, the Co-Processor Access Control Register is, normally, 0x00000000. However, it might be left un-cleared by firmware running before Zephyr boot. This restores the register back to reset value, even if CONFIG_FLOAT is not set. Clearing before setting supports switching between Full access and Privileged access only. Refactor enable_floating_point to support initialize floating point registers for every CPU that has a FPU. Signed-off-by: Luuk Bosma <l.bosma@interay.com>
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2c70df32b7
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1 changed files with 16 additions and 9 deletions
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@ -76,11 +76,18 @@ void __weak relocate_vector_table(void)
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#endif /* CONFIG_CPU_CORTEX_M_HAS_VTOR */
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#ifdef CONFIG_FLOAT
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static inline void enable_floating_point(void)
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#if defined(CONFIG_CPU_HAS_FPU)
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static inline void z_arm_floating_point_init(void)
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{
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/*
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* Upon reset, the Co-Processor Access Control Register is 0x00000000.
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* Upon reset, the Co-Processor Access Control Register is, normally,
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* 0x00000000. However, it might be left un-cleared by firmware running
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* before Zephyr boot.
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*/
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SCB->CPACR &= (~(CPACR_CP10_Msk | CPACR_CP11_Msk));
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#if defined(CONFIG_FLOAT)
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/*
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* Enable CP10 and CP11 Co-Processors to enable access to floating
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* point registers.
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*/
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@ -135,12 +142,10 @@ static inline void enable_floating_point(void)
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* will be activated (FPCA bit on the CONTROL register) in the presence
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* of floating point instructions.
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*/
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#endif /* CONFIG_FLOAT */
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}
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#else
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static inline void enable_floating_point(void)
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{
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}
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#endif
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#endif /* CONFIG_CPU_HAS_FPU */
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extern FUNC_NORETURN void z_cstart(void);
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/**
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@ -154,7 +159,9 @@ extern FUNC_NORETURN void z_cstart(void);
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void z_arm_prep_c(void)
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{
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relocate_vector_table();
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enable_floating_point();
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#if defined(CONFIG_CPU_HAS_FPU)
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z_arm_floating_point_init();
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#endif
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z_bss_zero();
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z_data_copy();
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#if defined(CONFIG_ARMV7_R) && defined(CONFIG_INIT_STACKS)
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