boards: posix: nrf52_sim: model DSB as no-op in cmsis.h

Provide a very simple model of the DSB ARM
instruction as no-operation. The implementation
is provided in a cmsis.h header file added
in the nrf52_bsim board directory.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>

boards/posix/nrf52_bsim/board_soc.h

@@ -29,6 +29,7 @@
 #include "irq.h"
 #include "irq_sources.h"
 #include "NRF_regs.h"
+#include "cmsis.h"
 #include "nrf_soc_if.h"
 
 #define OFFLOAD_SW_IRQ SWI0_EGU0_IRQn

boards/posix/nrf52_bsim/cmsis.h

@@ -0,0 +1,26 @@
+/*
+ * Copyright (c) 2020 Oticon A/S
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * This header defines replacements for inline
+ * ARM Cortex-M CMSIS intrinsics.
+ */
+
+#ifndef BOARDS_POSIX_NRF52_BSIM_CMSIS_H
+#define BOARDS_POSIX_NRF52_BSIM_CMSIS_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Implement ARM Data Synchronization Barrier instruction as no-op. */
+static inline void __DSB(void) {}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* BOARDS_POSIX_NRF52_BSIM_CMSIS_H */