boards: posix: nrf52_sim: model DSB as no-op in cmsis.h
Provide a very simple model of the DSB ARM instruction as no-operation. The implementation is provided in a cmsis.h header file added in the nrf52_bsim board directory. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
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#include "irq.h"
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#include "irq_sources.h"
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#include "NRF_regs.h"
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#include "cmsis.h"
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#include "nrf_soc_if.h"
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#define OFFLOAD_SW_IRQ SWI0_EGU0_IRQn
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26
boards/posix/nrf52_bsim/cmsis.h
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26
boards/posix/nrf52_bsim/cmsis.h
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/*
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* Copyright (c) 2020 Oticon A/S
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* This header defines replacements for inline
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* ARM Cortex-M CMSIS intrinsics.
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*/
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#ifndef BOARDS_POSIX_NRF52_BSIM_CMSIS_H
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#define BOARDS_POSIX_NRF52_BSIM_CMSIS_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Implement ARM Data Synchronization Barrier instruction as no-op. */
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static inline void __DSB(void) {}
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#ifdef __cplusplus
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}
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#endif
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#endif /* BOARDS_POSIX_NRF52_BSIM_CMSIS_H */
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