drivers: serial: pl011: drop usage of uart_device_config
Create a driver specific configuration structure, containing the required fields only. Since the config struct can now store a pointer to the UART structure, casts from address to (struct pl011_regs *) are no longer needed. PL011_REGS has also been dropped in favor of using the config pointer directly now that it is possible. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This commit is contained in:
Gerard Marull-Paretas
Anas Nashif
parent
dd3e3a7ee2
commit
cb982cd669
1 changed files with 85 additions and 52 deletions
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@ -39,6 +39,14 @@ struct pl011_regs {
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uint32_t dmacr;
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};
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struct pl011_config {
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volatile struct pl011_regs *uart;
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uint32_t sys_clk_freq;
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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uart_irq_config_func_t irq_config_func;
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#endif
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};
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/* Device data structure */
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struct pl011_data {
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uint32_t baud_rate; /* Baud rate */
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@ -142,33 +150,39 @@ struct pl011_data {
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PL011_IMSC_RXIM | PL011_IMSC_TXIM | \
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PL011_IMSC_RTIM)
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#define PL011_REGS(dev) \
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((volatile struct pl011_regs *) \
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((const struct uart_device_config * const)(dev)->config)->base)
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static void pl011_enable(const struct device *dev)
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{
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PL011_REGS(dev)->cr |= PL011_CR_UARTEN;
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const struct pl011_config *config = dev->config;
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config->uart->cr |= PL011_CR_UARTEN;
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}
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static void pl011_disable(const struct device *dev)
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{
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PL011_REGS(dev)->cr &= ~PL011_CR_UARTEN;
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const struct pl011_config *config = dev->config;
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config->uart->cr &= ~PL011_CR_UARTEN;
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}
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static void pl011_enable_fifo(const struct device *dev)
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{
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PL011_REGS(dev)->lcr_h |= PL011_LCRH_FEN;
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const struct pl011_config *config = dev->config;
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config->uart->lcr_h |= PL011_LCRH_FEN;
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}
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static void pl011_disable_fifo(const struct device *dev)
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{
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PL011_REGS(dev)->lcr_h &= ~PL011_LCRH_FEN;
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const struct pl011_config *config = dev->config;
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config->uart->lcr_h &= ~PL011_LCRH_FEN;
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}
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static int pl011_set_baudrate(const struct device *dev,
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uint32_t clk, uint32_t baudrate)
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{
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const struct pl011_config *config = dev->config;
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/* Avoiding float calculations, bauddiv is left shifted by 6 */
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uint64_t bauddiv = (((uint64_t)clk) << PL011_FBRD_WIDTH)
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/ (baudrate * 16U);
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@ -182,8 +196,8 @@ static int pl011_set_baudrate(const struct device *dev,
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return -EINVAL;
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}
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PL011_REGS(dev)->ibrd = bauddiv >> PL011_FBRD_WIDTH;
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PL011_REGS(dev)->fbrd = bauddiv & ((1u << PL011_FBRD_WIDTH) - 1u);
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config->uart->ibrd = bauddiv >> PL011_FBRD_WIDTH;
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config->uart->fbrd = bauddiv & ((1u << PL011_FBRD_WIDTH) - 1u);
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__DMB();
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@ -191,56 +205,61 @@ static int pl011_set_baudrate(const struct device *dev,
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* lcr_h write must always be performed at the end
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* ARM DDI 0183F, Pg 3-13
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*/
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PL011_REGS(dev)->lcr_h = PL011_REGS(dev)->lcr_h;
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config->uart->lcr_h = config->uart->lcr_h;
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return 0;
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}
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static bool pl011_is_readable(const struct device *dev)
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{
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const struct pl011_config *config = dev->config;
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struct pl011_data *data = dev->data;
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if (!data->sbsa &&
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(!(PL011_REGS(dev)->cr & PL011_CR_UARTEN) ||
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!(PL011_REGS(dev)->cr & PL011_CR_RXE)))
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(!(config->uart->cr & PL011_CR_UARTEN) ||
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!(config->uart->cr & PL011_CR_RXE)))
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return false;
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return (PL011_REGS(dev)->fr & PL011_FR_RXFE) == 0U;
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return (config->uart->fr & PL011_FR_RXFE) == 0U;
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}
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static int pl011_poll_in(const struct device *dev, unsigned char *c)
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{
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const struct pl011_config *config = dev->config;
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if (!pl011_is_readable(dev)) {
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return -1;
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}
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/* got a character */
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*c = (unsigned char)PL011_REGS(dev)->dr;
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*c = (unsigned char)config->uart->dr;
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return PL011_REGS(dev)->rsr & PL011_RSR_ERROR_MASK;
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return config->uart->rsr & PL011_RSR_ERROR_MASK;
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}
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static void pl011_poll_out(const struct device *dev,
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unsigned char c)
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{
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const struct pl011_config *config = dev->config;
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/* Wait for space in FIFO */
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while (PL011_REGS(dev)->fr & PL011_FR_TXFF) {
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while (config->uart->fr & PL011_FR_TXFF) {
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; /* Wait */
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}
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/* Send a character */
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PL011_REGS(dev)->dr = (uint32_t)c;
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config->uart->dr = (uint32_t)c;
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}
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static int pl011_fifo_fill(const struct device *dev,
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const uint8_t *tx_data, int len)
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{
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const struct pl011_config *config = dev->config;
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uint8_t num_tx = 0U;
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while (!(PL011_REGS(dev)->fr & PL011_FR_TXFF) &&
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(len - num_tx > 0)) {
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PL011_REGS(dev)->dr = tx_data[num_tx++];
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while (!(config->uart->fr & PL011_FR_TXFF) && (len - num_tx > 0)) {
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config->uart->dr = tx_data[num_tx++];
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}
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return num_tx;
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}
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@ -248,11 +267,11 @@ static int pl011_fifo_fill(const struct device *dev,
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static int pl011_fifo_read(const struct device *dev,
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uint8_t *rx_data, const int len)
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{
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const struct pl011_config *config = dev->config;
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uint8_t num_rx = 0U;
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while ((len - num_rx > 0) &&
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!(PL011_REGS(dev)->fr & PL011_FR_RXFE)) {
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rx_data[num_rx++] = PL011_REGS(dev)->dr;
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while ((len - num_rx > 0) && !(config->uart->fr & PL011_FR_RXFE)) {
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rx_data[num_rx++] = config->uart->dr;
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}
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return num_rx;
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@ -260,63 +279,77 @@ static int pl011_fifo_read(const struct device *dev,
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static void pl011_irq_tx_enable(const struct device *dev)
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{
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PL011_REGS(dev)->imsc |= PL011_IMSC_TXIM;
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const struct pl011_config *config = dev->config;
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config->uart->imsc |= PL011_IMSC_TXIM;
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}
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static void pl011_irq_tx_disable(const struct device *dev)
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{
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PL011_REGS(dev)->imsc &= ~PL011_IMSC_TXIM;
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const struct pl011_config *config = dev->config;
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config->uart->imsc &= ~PL011_IMSC_TXIM;
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}
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static int pl011_irq_tx_complete(const struct device *dev)
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{
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const struct pl011_config *config = dev->config;
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/* check for TX FIFO empty */
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return PL011_REGS(dev)->fr & PL011_FR_TXFE;
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return config->uart->fr & PL011_FR_TXFE;
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}
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static int pl011_irq_tx_ready(const struct device *dev)
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{
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const struct pl011_config *config = dev->config;
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struct pl011_data *data = dev->data;
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if (!data->sbsa && !(PL011_REGS(dev)->cr & PL011_CR_TXE))
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if (!data->sbsa && !(config->uart->cr & PL011_CR_TXE))
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return false;
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return ((PL011_REGS(dev)->imsc & PL011_IMSC_TXIM) &&
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return ((config->uart->imsc & PL011_IMSC_TXIM) &&
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pl011_irq_tx_complete(dev));
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}
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static void pl011_irq_rx_enable(const struct device *dev)
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{
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PL011_REGS(dev)->imsc |= PL011_IMSC_RXIM |
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PL011_IMSC_RTIM;
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const struct pl011_config *config = dev->config;
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config->uart->imsc |= PL011_IMSC_RXIM | PL011_IMSC_RTIM;
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}
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static void pl011_irq_rx_disable(const struct device *dev)
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{
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PL011_REGS(dev)->imsc &= ~(PL011_IMSC_RXIM |
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PL011_IMSC_RTIM);
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const struct pl011_config *config = dev->config;
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config->uart->imsc &= ~(PL011_IMSC_RXIM | PL011_IMSC_RTIM);
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}
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static int pl011_irq_rx_ready(const struct device *dev)
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{
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const struct pl011_config *config = dev->config;
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struct pl011_data *data = dev->data;
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if (!data->sbsa && !(PL011_REGS(dev)->cr & PL011_CR_RXE))
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if (!data->sbsa && !(config->uart->cr & PL011_CR_RXE))
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return false;
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return ((PL011_REGS(dev)->imsc & PL011_IMSC_RXIM) &&
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(!(PL011_REGS(dev)->fr & PL011_FR_RXFE)));
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return ((config->uart->imsc & PL011_IMSC_RXIM) &&
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(!(config->uart->fr & PL011_FR_RXFE)));
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}
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static void pl011_irq_err_enable(const struct device *dev)
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{
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const struct pl011_config *config = dev->config;
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/* enable framing, parity, break, and overrun */
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PL011_REGS(dev)->imsc |= PL011_IMSC_ERROR_MASK;
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config->uart->imsc |= PL011_IMSC_ERROR_MASK;
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}
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static void pl011_irq_err_disable(const struct device *dev)
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{
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PL011_REGS(dev)->imsc &= ~PL011_IMSC_ERROR_MASK;
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const struct pl011_config *config = dev->config;
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config->uart->imsc &= ~PL011_IMSC_ERROR_MASK;
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}
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static int pl011_irq_is_pending(const struct device *dev)
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@ -363,7 +396,7 @@ static const struct uart_driver_api pl011_driver_api = {
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static int pl011_init(const struct device *dev)
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{
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const struct uart_device_config *config = dev->config;
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const struct pl011_config *config = dev->config;
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struct pl011_data *data = dev->data;
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int ret;
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uint32_t lcrh;
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@ -386,23 +419,23 @@ static int pl011_init(const struct device *dev)
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}
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/* Setting the default character format */
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lcrh = PL011_REGS(dev)->lcr_h & ~(PL011_LCRH_FORMAT_MASK);
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lcrh = config->uart->lcr_h & ~(PL011_LCRH_FORMAT_MASK);
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lcrh &= ~(BIT(0) | BIT(7));
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lcrh |= PL011_LCRH_WLEN_SIZE(8) << PL011_LCRH_WLEN_SHIFT;
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PL011_REGS(dev)->lcr_h = lcrh;
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config->uart->lcr_h = lcrh;
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/* Enabling the FIFOs */
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pl011_enable_fifo(dev);
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}
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/* initialize all IRQs as masked */
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PL011_REGS(dev)->imsc = 0U;
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PL011_REGS(dev)->icr = PL011_IMSC_MASK_ALL;
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config->uart->imsc = 0U;
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config->uart->icr = PL011_IMSC_MASK_ALL;
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if (!data->sbsa) {
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PL011_REGS(dev)->dmacr = 0U;
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config->uart->dmacr = 0U;
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__ISB();
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PL011_REGS(dev)->cr &= ~(BIT(14) | BIT(15) | BIT(1));
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PL011_REGS(dev)->cr |= PL011_CR_RXE | PL011_CR_TXE;
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config->uart->cr &= ~(BIT(14) | BIT(15) | BIT(1));
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config->uart->cr |= PL011_CR_RXE | PL011_CR_TXE;
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__ISB();
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}
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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@ -433,8 +466,8 @@ void pl011_isr(const struct device *dev)
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static void pl011_irq_config_func_0(const struct device *dev);
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#endif
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static struct uart_device_config pl011_cfg_port_0 = {
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.base = (uint8_t *)DT_INST_REG_ADDR(0),
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static struct pl011_config pl011_cfg_port_0 = {
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.uart = (volatile struct pl011_regs *)DT_INST_REG_ADDR(0),
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.sys_clk_freq = DT_INST_PROP_BY_PHANDLE(0, clocks, clock_frequency),
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.irq_config_func = pl011_irq_config_func_0,
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@ -496,8 +529,8 @@ static void pl011_irq_config_func_0(const struct device *dev)
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static void pl011_irq_config_func_1(const struct device *dev);
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#endif
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static struct uart_device_config pl011_cfg_port_1 = {
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.base = (uint8_t *)DT_INST_REG_ADDR(1),
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static struct pl011_config pl011_cfg_port_1 = {
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.uart = (volatile struct pl011_regs *)DT_INST_REG_ADDR(1),
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.sys_clk_freq = DT_INST_PROP_BY_PHANDLE(1, clocks, clock_frequency),
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.irq_config_func = pl011_irq_config_func_1,
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@ -562,8 +595,8 @@ static void pl011_irq_config_func_1(const struct device *dev)
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static void pl011_irq_config_func_sbsa(const struct device *dev);
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#endif
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static struct uart_device_config pl011_cfg_sbsa = {
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.base = (uint8_t *)DT_INST_REG_ADDR(0),
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static struct pl011_config pl011_cfg_sbsa = {
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.uart = (volatile struct pl011_regs *)DT_INST_REG_ADDR(0),
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.irq_config_func = pl011_irq_config_func_sbsa,
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#endif
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