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boards nrf54l15bsim: Update docs with RRAMC, FICR and UICR mention

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This board HW models now include the RRAMC, FICR and UICR.
Let's update the docs accordingly.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
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Alberto Escolar Piedras 2024-05-16 14:56:17 +02:00 • committed by David Leach
commit cb7f20f436
1 changed files with 5 additions and 2 deletions
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boards/native/nrf_bsim/doc/nrf54l15bsim.rst
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@ -38,18 +38,21 @@ This boards include models of some of the nRF54L15 SOC peripherals:
* DPPI (Distributed Programmable Peripheral Interconnect) * DPPI (Distributed Programmable Peripheral Interconnect)
* EGU (Event Generator Unit) * EGU (Event Generator Unit)
* FICR (Factory Information Configuration Registers)
* GRTC (Global Real-time Counter) * GRTC (Global Real-time Counter)
* PPIB (PPI Bridge) * PPIB (PPI Bridge)
* RRAMC (Resistive RAM Controller)
* RTC (Real Time Counter) * RTC (Real Time Counter)
* TEMP (Temperature sensor) * TEMP (Temperature sensor)
* TIMER * TIMER
* UICR (User Information Configuration Registers)
and will use the same drivers as the nrf54l15pdk targets for these. and will use the same drivers as the nrf54l15pdk targets for these.
For more information on what is modeled to which level of detail, For more information on what is modeled to which level of detail,
check the `HW models implementation status`_. check the `HW models implementation status`_.
Note that unlike a real nrf54l15 device, the nrf54l15bsim boards have unlimited RAM and flash for Note that unlike a real nrf54l15 device, the nrf54l15bsim boards have unlimited RAM, and code does
code. not occupy their RRAM.
.. _BabbleSim: .. _BabbleSim:
https://BabbleSim.github.io https://BabbleSim.github.io