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drivers: support 64-bit addresses from devicetree for PLIC, MTIMER, UART

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Usage of 64-bit address constants from devicetree without
an UINT64_C wrapping macro results in the following warning
and the cut-off of the address value:

"warning: integer constant is so large that it is unsigned"

This change fixes such issue for PLIC, MTIMER and UART in case
they are used with some 64-bit RISC-V platforms

Signed-off-by: Alexander Razinkov <alexander.razinkov@syntacore.com>
This commit is contained in:
Alexander Razinkov 2023-05-24 09:50:43 +03:00 • committed by Kumar Gala
commit cb491cacad
3 changed files with 8 additions and 8 deletions
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6
drivers/interrupt_controller/intc_plic.c
View file

@ -22,9 +22,9 @@
#include <zephyr/irq.h> #include <zephyr/irq.h>
#define PLIC_MAX_PRIO DT_INST_PROP(0, riscv_max_priority) #define PLIC_MAX_PRIO DT_INST_PROP(0, riscv_max_priority)
#define PLIC_PRIO DT_INST_REG_ADDR_BY_NAME(0, prio) #define PLIC_PRIO DT_INST_REG_ADDR_BY_NAME_U64(0, prio)
#define PLIC_IRQ_EN DT_INST_REG_ADDR_BY_NAME(0, irq_en) #define PLIC_IRQ_EN DT_INST_REG_ADDR_BY_NAME_U64(0, irq_en)
#define PLIC_REG DT_INST_REG_ADDR_BY_NAME(0, reg) #define PLIC_REG DT_INST_REG_ADDR_BY_NAME_U64(0, reg)
#define PLIC_IRQS (CONFIG_NUM_IRQS - CONFIG_2ND_LVL_ISR_TBL_OFFSET) #define PLIC_IRQS (CONFIG_NUM_IRQS - CONFIG_2ND_LVL_ISR_TBL_OFFSET)
#define PLIC_EN_SIZE ((PLIC_IRQS >> 5) + 1) #define PLIC_EN_SIZE ((PLIC_IRQS >> 5) + 1)

6
drivers/timer/riscv_machine_timer.c
View file

@ -67,9 +67,9 @@
#define DT_DRV_COMPAT scr_machine_timer #define DT_DRV_COMPAT scr_machine_timer
#define MTIMER_HAS_DIVIDER #define MTIMER_HAS_DIVIDER
#define MTIMEDIV_REG (DT_INST_REG_ADDR(0) + 4) #define MTIMEDIV_REG (DT_INST_REG_ADDR_U64(0) + 4)
#define MTIME_REG (DT_INST_REG_ADDR(0) + 8) #define MTIME_REG (DT_INST_REG_ADDR_U64(0) + 8)
#define MTIMECMP_REG (DT_INST_REG_ADDR(0) + 16) #define MTIMECMP_REG (DT_INST_REG_ADDR_U64(0) + 16)
#define TIMER_IRQN DT_INST_IRQN(0) #define TIMER_IRQN DT_INST_IRQN(0)
#endif #endif

4
include/zephyr/sys/device_mmio.h
View file

@ -116,12 +116,12 @@ struct z_device_mmio_rom {
#define Z_DEVICE_MMIO_ROM_INITIALIZER(node_id) \ #define Z_DEVICE_MMIO_ROM_INITIALIZER(node_id) \
{ \ { \
.addr = DT_REG_ADDR(node_id) \ .addr = (mm_reg_t)DT_REG_ADDR_U64(node_id) \
} }
#define Z_DEVICE_MMIO_NAMED_ROM_INITIALIZER(name, node_id) \ #define Z_DEVICE_MMIO_NAMED_ROM_INITIALIZER(name, node_id) \
{ \ { \
.addr = DT_REG_ADDR_BY_NAME(node_id, name) \ .addr = (mm_reg_t)DT_REG_ADDR_BY_NAME_U64(node_id, name) \
} }
#endif /* DEVICE_MMIO_IS_IN_RAM */ #endif /* DEVICE_MMIO_IS_IN_RAM */