michaelh/zephyr
1
0
Fork 0
Code Releases Activity

boards: nordic: Remove nRF54L15 PDK

Browse source 
The nRF54L15 Development Kit is now available, so remove the Preview
Development Kit (PDK).

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
This commit is contained in:
Carles Cufi 2024-10-16 21:47:51 +02:00 • committed by David Leach
commit cb47c62259
75 changed files with 3 additions and 1598 deletions
Download patch file Download diff file Expand all files Collapse all files

29
snippets/nordic-flpr-xip/boards/nrf54l15pdk_nrf54l15_cpuapp.overlay
View file

@ -1,29 +0,0 @@
/*
* Copyright (c) 2024 Nordic Semiconductor
* SPDX-License-Identifier: Apache-2.0
*/
/ {
soc {
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
cpuflpr_code_partition: image@165000 {
/* FLPR core code partition */
reg = <0x165000 DT_SIZE_K(96)>;
};
};
};
};
&uart30 {
status = "reserved";
};
&cpuflpr_vpr {
execution-memory = <&cpuflpr_code_partition>;
};
&cpuapp_vevif_tx {
status = "okay";
};

3
snippets/nordic-flpr-xip/snippet.yml
View file

@ -3,9 +3,6 @@ append:
EXTRA_DTC_OVERLAY_FILE: nordic-flpr-xip.overlay
boards:
nrf54l15pdk/nrf54l15/cpuapp:
append:
EXTRA_DTC_OVERLAY_FILE: boards/nrf54l15pdk_nrf54l15_cpuapp.overlay
nrf54l15dk/nrf54l15/cpuapp:
append:
EXTRA_DTC_OVERLAY_FILE: boards/nrf54l15dk_nrf54l15_cpuapp.overlay

43
snippets/nordic-flpr/boards/nrf54l15pdk_nrf54l15_cpuapp.overlay
View file

@ -1,43 +0,0 @@
/*
* Copyright (c) 2024 Nordic Semiconductor
* SPDX-License-Identifier: Apache-2.0
*/
/ {
soc {
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
cpuflpr_code_partition: image@165000 {
/* FLPR core code partition */
reg = <0x165000 DT_SIZE_K(96)>;
};
};
cpuflpr_sram_code_data: memory@20028000 {
compatible = "mmio-sram";
reg = <0x20028000 DT_SIZE_K(96)>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x20028000 0x18000>;
};
};
};
&uart30 {
status = "reserved";
};
&cpuapp_sram {
reg = <0x20000000 DT_SIZE_K(160)>;
ranges = <0x0 0x20000000 0x28000>;
};
&cpuflpr_vpr {
execution-memory = <&cpuflpr_sram_code_data>;
source-memory = <&cpuflpr_code_partition>;
};
&cpuapp_vevif_tx {
status = "okay";
};

3
snippets/nordic-flpr/snippet.yml
View file

@ -3,9 +3,6 @@ append:
EXTRA_DTC_OVERLAY_FILE: nordic-flpr.overlay
boards:
nrf54l15pdk/nrf54l15/cpuapp:
append:
EXTRA_DTC_OVERLAY_FILE: boards/nrf54l15pdk_nrf54l15_cpuapp.overlay
nrf54l15dk/nrf54l15/cpuapp:
append:
EXTRA_DTC_OVERLAY_FILE: boards/nrf54l15dk_nrf54l15_cpuapp.overlay