spi: Refactor mcux dspi driver to use dts

Get the driver name, base address, irq number, and irq priority from
dts.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>

arch/arm/soc/nxp_kinetis/k6x/dts.fixup

@@ -88,4 +88,25 @@
 #define FLASH_DEV_BASE_ADDRESS			NXP_KINETIS_FTFE_40020000_BASE_ADDRESS
 #define FLASH_DEV_NAME				NXP_KINETIS_FTFE_40020000_LABEL
 
+#define CONFIG_SPI_0_NAME			NXP_KINETIS_DSPI_4002C000_LABEL
+#define CONFIG_SPI_0_BASE_ADDRESS		NXP_KINETIS_DSPI_4002C000_BASE_ADDRESS
+#define CONFIG_SPI_0_IRQ			NXP_KINETIS_DSPI_4002C000_IRQ_0
+#define CONFIG_SPI_0_IRQ_PRI			NXP_KINETIS_DSPI_4002C000_IRQ_0_PRIORITY
+#define CONFIG_SPI_0_CLOCK_NAME			NXP_KINETIS_DSPI_4002C000_CLOCK_CONTROLLER
+#define CONFIG_SPI_0_CLOCK_SUBSYS		NXP_KINETIS_DSPI_4002C000_CLOCK_NAME
+
+#define CONFIG_SPI_1_NAME			NXP_KINETIS_DSPI_4002D000_LABEL
+#define CONFIG_SPI_1_BASE_ADDRESS		NXP_KINETIS_DSPI_4002D000_BASE_ADDRESS
+#define CONFIG_SPI_1_IRQ			NXP_KINETIS_DSPI_4002D000_IRQ_0
+#define CONFIG_SPI_1_IRQ_PRI			NXP_KINETIS_DSPI_4002D000_IRQ_0_PRIORITY
+#define CONFIG_SPI_1_CLOCK_NAME			NXP_KINETIS_DSPI_4002D000_CLOCK_CONTROLLER
+#define CONFIG_SPI_1_CLOCK_SUBSYS		NXP_KINETIS_DSPI_4002D000_CLOCK_NAME
+
+#define CONFIG_SPI_2_NAME			NXP_KINETIS_DSPI_400AC000_LABEL
+#define CONFIG_SPI_2_BASE_ADDRESS		NXP_KINETIS_DSPI_400AC000_BASE_ADDRESS
+#define CONFIG_SPI_2_IRQ			NXP_KINETIS_DSPI_400AC000_IRQ_0
+#define CONFIG_SPI_2_IRQ_PRI			NXP_KINETIS_DSPI_400AC000_IRQ_0_PRIORITY
+#define CONFIG_SPI_2_CLOCK_NAME			NXP_KINETIS_DSPI_400AC000_CLOCK_CONTROLLER
+#define CONFIG_SPI_2_CLOCK_SUBSYS		NXP_KINETIS_DSPI_400AC000_CLOCK_NAME
+
 /* End of SoC Level DTS fixup file */

arch/arm/soc/nxp_kinetis/kwx/dts.fixup

@@ -66,6 +66,20 @@
 
 #define FLASH_DEV_BASE_ADDRESS		NXP_KINETIS_FTFL_40020000_BASE_ADDRESS
 #define FLASH_DEV_NAME			NXP_KINETIS_FTFL_40020000_LABEL
+
+#define CONFIG_SPI_0_NAME			NXP_KINETIS_DSPI_4002C000_LABEL
+#define CONFIG_SPI_0_BASE_ADDRESS		NXP_KINETIS_DSPI_4002C000_BASE_ADDRESS
+#define CONFIG_SPI_0_IRQ			NXP_KINETIS_DSPI_4002C000_IRQ_0
+#define CONFIG_SPI_0_IRQ_PRI			NXP_KINETIS_DSPI_4002C000_IRQ_0_PRIORITY
+#define CONFIG_SPI_0_CLOCK_NAME			NXP_KINETIS_DSPI_4002C000_CLOCK_CONTROLLER
+#define CONFIG_SPI_0_CLOCK_SUBSYS		NXP_KINETIS_DSPI_4002C000_CLOCK_NAME
+
+#define CONFIG_SPI_1_NAME			NXP_KINETIS_DSPI_4002D000_LABEL
+#define CONFIG_SPI_1_BASE_ADDRESS		NXP_KINETIS_DSPI_4002D000_BASE_ADDRESS
+#define CONFIG_SPI_1_IRQ			NXP_KINETIS_DSPI_4002D000_IRQ_0
+#define CONFIG_SPI_1_IRQ_PRI			NXP_KINETIS_DSPI_4002D000_IRQ_0_PRIORITY
+#define CONFIG_SPI_1_CLOCK_NAME			NXP_KINETIS_DSPI_4002D000_CLOCK_CONTROLLER
+#define CONFIG_SPI_1_CLOCK_SUBSYS		NXP_KINETIS_DSPI_4002D000_CLOCK_NAME
 #endif /* CONFIG_SOC_MKW22D5 || CONFIG_SOC_MKW24D5 */
 
 #if defined(CONFIG_SOC_MKW40Z4) || defined(CONFIG_SOC_MKW41Z4)

boards/arm/frdm_k64f/Kconfig.defconfig

@@ -99,21 +99,12 @@ if SPI
 config SPI_0
 	def_bool y
 
-config SPI_0_IRQ_PRI
-	default 3
-
 config SPI_1
 	def_bool n
 
-config SPI_1_IRQ_PRI
-	default 3
-
 config SPI_2
 	def_bool n
 
-config SPI_2_IRQ_PRI
-	default 3
-
 endif # SPI
 
 if NETWORKING

boards/arm/hexiwear_k64/Kconfig.defconfig

@@ -102,21 +102,12 @@ if SPI
 config SPI_0
 	def_bool y
 
-config SPI_0_IRQ_PRI
-	default 3
-
 config SPI_1
 	def_bool n
 
-config SPI_1_IRQ_PRI
-	default 3
-
 config SPI_2
 	def_bool n
 
-config SPI_2_IRQ_PRI
-	default 3
-
 endif # SPI
 
 if NET_L2_ETHERNET

boards/arm/usb_kw24d512/Kconfig.defconfig

@@ -97,9 +97,6 @@ if SPI
 config SPI_1
 	def_bool y
 
-config SPI_1_IRQ_PRI
-	default 3
-
 endif # SPI
 
 if IEEE802154_MCR20A

drivers/spi/Kconfig.mcux_dspi

@@ -9,6 +9,7 @@
 menuconfig SPI_MCUX_DSPI
 	bool "MCUX SPI driver"
 	depends on HAS_MCUX
+	select HAS_DTS_SPI
 	default n
 	help
 	  Enable support for mcux spi driver.

drivers/spi/spi_mcux_dspi.c

@@ -260,7 +260,7 @@ static const struct spi_driver_api spi_mcux_driver_api = {
 static void spi_mcux_config_func_0(struct device *dev);
 
 static const struct spi_mcux_config spi_mcux_config_0 = {
-	.base = DSPI0,
+	.base = (SPI_Type *) CONFIG_SPI_0_BASE_ADDRESS,
 	.clock_source = DSPI0_CLK_SRC,
 	.irq_config_func = spi_mcux_config_func_0,
 };
@@ -277,10 +277,10 @@ DEVICE_AND_API_INIT(spi_mcux_0, CONFIG_SPI_0_NAME, &spi_mcux_init,
 
 static void spi_mcux_config_func_0(struct device *dev)
 {
-	IRQ_CONNECT(IRQ_SPI0, CONFIG_SPI_0_IRQ_PRI,
+	IRQ_CONNECT(CONFIG_SPI_0_IRQ, CONFIG_SPI_0_IRQ_PRI,
 		    spi_mcux_isr, DEVICE_GET(spi_mcux_0), 0);
 
-	irq_enable(IRQ_SPI0);
+	irq_enable(CONFIG_SPI_0_IRQ);
 }
 #endif /* CONFIG_SPI_0 */
 
@@ -288,7 +288,7 @@ static void spi_mcux_config_func_0(struct device *dev)
 static void spi_mcux_config_func_1(struct device *dev);
 
 static const struct spi_mcux_config spi_mcux_config_1 = {
-	.base = DSPI1,
+	.base = (SPI_Type *) CONFIG_SPI_1_BASE_ADDRESS,
 	.clock_source = DSPI1_CLK_SRC,
 	.irq_config_func = spi_mcux_config_func_1,
 };
@@ -305,10 +305,10 @@ DEVICE_AND_API_INIT(spi_mcux_1, CONFIG_SPI_1_NAME, &spi_mcux_init,
 
 static void spi_mcux_config_func_1(struct device *dev)
 {
-	IRQ_CONNECT(IRQ_SPI1, CONFIG_SPI_1_IRQ_PRI,
+	IRQ_CONNECT(CONFIG_SPI_1_IRQ, CONFIG_SPI_1_IRQ_PRI,
 		    spi_mcux_isr, DEVICE_GET(spi_mcux_1), 0);
 
-	irq_enable(IRQ_SPI1);
+	irq_enable(CONFIG_SPI_1_IRQ);
 }
 #endif /* CONFIG_SPI_1 */
 
@@ -316,7 +316,7 @@ static void spi_mcux_config_func_1(struct device *dev)
 static void spi_mcux_config_func_2(struct device *dev);
 
 static const struct spi_mcux_config spi_mcux_config_2 = {
-	.base = DSPI2,
+	.base = (SPI_Type *) CONFIG_SPI_2_BASE_ADDRESS,
 	.clock_source = DSPI2_CLK_SRC,
 	.irq_config_func = spi_mcux_config_func_2,
 };
@@ -333,9 +333,9 @@ DEVICE_AND_API_INIT(spi_mcux_2, CONFIG_SPI_2_NAME, &spi_mcux_init,
 
 static void spi_mcux_config_func_2(struct device *dev)
 {
-	IRQ_CONNECT(IRQ_SPI2, CONFIG_SPI_2_IRQ_PRI,
+	IRQ_CONNECT(CONFIG_SPI_2_IRQ, CONFIG_SPI_2_IRQ_PRI,
 		    spi_mcux_isr, DEVICE_GET(spi_mcux_2), 0);
 
-	irq_enable(IRQ_SPI2);
+	irq_enable(CONFIG_SPI_2_IRQ);
 }
 #endif /* CONFIG_SPI_2 */