drivers/sensor: lsm6dso: move ctx structure inside struct config
Move ctx structure from struct data to struct config, so that it can be filled at compile time and we could get rid of the bus init routines. Signed-off-by: Armando Visconti <armando.visconti@st.com>
This commit is contained in:
parent
99308c514a
commit
cacee210ad
7 changed files with 180 additions and 236 deletions
|
@ -7,8 +7,6 @@
|
||||||
zephyr_library()
|
zephyr_library()
|
||||||
|
|
||||||
zephyr_library_sources_ifdef(CONFIG_LSM6DSO lsm6dso.c)
|
zephyr_library_sources_ifdef(CONFIG_LSM6DSO lsm6dso.c)
|
||||||
zephyr_library_sources_ifdef(CONFIG_LSM6DSO lsm6dso_i2c.c)
|
|
||||||
zephyr_library_sources_ifdef(CONFIG_LSM6DSO lsm6dso_spi.c)
|
|
||||||
zephyr_library_sources_ifdef(CONFIG_LSM6DSO_SENSORHUB lsm6dso_shub.c)
|
zephyr_library_sources_ifdef(CONFIG_LSM6DSO_SENSORHUB lsm6dso_shub.c)
|
||||||
zephyr_library_sources_ifdef(CONFIG_LSM6DSO_TRIGGER lsm6dso_trigger.c)
|
zephyr_library_sources_ifdef(CONFIG_LSM6DSO_TRIGGER lsm6dso_trigger.c)
|
||||||
|
|
||||||
|
|
|
@ -90,9 +90,10 @@ static int lsm6dso_gyro_range_to_fs_val(int32_t range)
|
||||||
|
|
||||||
static inline int lsm6dso_reboot(const struct device *dev)
|
static inline int lsm6dso_reboot(const struct device *dev)
|
||||||
{
|
{
|
||||||
struct lsm6dso_data *data = dev->data;
|
const struct lsm6dso_config *cfg = dev->config;
|
||||||
|
stmdev_ctx_t *ctx = (stmdev_ctx_t *)&cfg->ctx;
|
||||||
|
|
||||||
if (lsm6dso_boot_set(&data->ctx, 1) < 0) {
|
if (lsm6dso_boot_set(ctx, 1) < 0) {
|
||||||
return -EIO;
|
return -EIO;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -104,9 +105,11 @@ static inline int lsm6dso_reboot(const struct device *dev)
|
||||||
|
|
||||||
static int lsm6dso_accel_set_fs_raw(const struct device *dev, uint8_t fs)
|
static int lsm6dso_accel_set_fs_raw(const struct device *dev, uint8_t fs)
|
||||||
{
|
{
|
||||||
|
const struct lsm6dso_config *cfg = dev->config;
|
||||||
|
stmdev_ctx_t *ctx = (stmdev_ctx_t *)&cfg->ctx;
|
||||||
struct lsm6dso_data *data = dev->data;
|
struct lsm6dso_data *data = dev->data;
|
||||||
|
|
||||||
if (lsm6dso_xl_full_scale_set(&data->ctx, fs) < 0) {
|
if (lsm6dso_xl_full_scale_set(ctx, fs) < 0) {
|
||||||
return -EIO;
|
return -EIO;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -117,9 +120,11 @@ static int lsm6dso_accel_set_fs_raw(const struct device *dev, uint8_t fs)
|
||||||
|
|
||||||
static int lsm6dso_accel_set_odr_raw(const struct device *dev, uint8_t odr)
|
static int lsm6dso_accel_set_odr_raw(const struct device *dev, uint8_t odr)
|
||||||
{
|
{
|
||||||
|
const struct lsm6dso_config *cfg = dev->config;
|
||||||
|
stmdev_ctx_t *ctx = (stmdev_ctx_t *)&cfg->ctx;
|
||||||
struct lsm6dso_data *data = dev->data;
|
struct lsm6dso_data *data = dev->data;
|
||||||
|
|
||||||
if (lsm6dso_xl_data_rate_set(&data->ctx, odr) < 0) {
|
if (lsm6dso_xl_data_rate_set(ctx, odr) < 0) {
|
||||||
return -EIO;
|
return -EIO;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -130,9 +135,10 @@ static int lsm6dso_accel_set_odr_raw(const struct device *dev, uint8_t odr)
|
||||||
|
|
||||||
static int lsm6dso_gyro_set_fs_raw(const struct device *dev, uint8_t fs)
|
static int lsm6dso_gyro_set_fs_raw(const struct device *dev, uint8_t fs)
|
||||||
{
|
{
|
||||||
struct lsm6dso_data *data = dev->data;
|
const struct lsm6dso_config *cfg = dev->config;
|
||||||
|
stmdev_ctx_t *ctx = (stmdev_ctx_t *)&cfg->ctx;
|
||||||
|
|
||||||
if (lsm6dso_gy_full_scale_set(&data->ctx, fs) < 0) {
|
if (lsm6dso_gy_full_scale_set(ctx, fs) < 0) {
|
||||||
return -EIO;
|
return -EIO;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -141,9 +147,10 @@ static int lsm6dso_gyro_set_fs_raw(const struct device *dev, uint8_t fs)
|
||||||
|
|
||||||
static int lsm6dso_gyro_set_odr_raw(const struct device *dev, uint8_t odr)
|
static int lsm6dso_gyro_set_odr_raw(const struct device *dev, uint8_t odr)
|
||||||
{
|
{
|
||||||
struct lsm6dso_data *data = dev->data;
|
const struct lsm6dso_config *cfg = dev->config;
|
||||||
|
stmdev_ctx_t *ctx = (stmdev_ctx_t *)&cfg->ctx;
|
||||||
|
|
||||||
if (lsm6dso_gy_data_rate_set(&data->ctx, odr) < 0) {
|
if (lsm6dso_gy_data_rate_set(ctx, odr) < 0) {
|
||||||
return -EIO;
|
return -EIO;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -300,10 +307,12 @@ static int lsm6dso_attr_set(const struct device *dev,
|
||||||
|
|
||||||
static int lsm6dso_sample_fetch_accel(const struct device *dev)
|
static int lsm6dso_sample_fetch_accel(const struct device *dev)
|
||||||
{
|
{
|
||||||
|
const struct lsm6dso_config *cfg = dev->config;
|
||||||
|
stmdev_ctx_t *ctx = (stmdev_ctx_t *)&cfg->ctx;
|
||||||
struct lsm6dso_data *data = dev->data;
|
struct lsm6dso_data *data = dev->data;
|
||||||
union axis3bit16_t buf;
|
union axis3bit16_t buf;
|
||||||
|
|
||||||
if (lsm6dso_acceleration_raw_get(&data->ctx, buf.u8bit) < 0) {
|
if (lsm6dso_acceleration_raw_get(ctx, buf.u8bit) < 0) {
|
||||||
LOG_DBG("Failed to read sample");
|
LOG_DBG("Failed to read sample");
|
||||||
return -EIO;
|
return -EIO;
|
||||||
}
|
}
|
||||||
|
@ -317,10 +326,12 @@ static int lsm6dso_sample_fetch_accel(const struct device *dev)
|
||||||
|
|
||||||
static int lsm6dso_sample_fetch_gyro(const struct device *dev)
|
static int lsm6dso_sample_fetch_gyro(const struct device *dev)
|
||||||
{
|
{
|
||||||
|
const struct lsm6dso_config *cfg = dev->config;
|
||||||
|
stmdev_ctx_t *ctx = (stmdev_ctx_t *)&cfg->ctx;
|
||||||
struct lsm6dso_data *data = dev->data;
|
struct lsm6dso_data *data = dev->data;
|
||||||
union axis3bit16_t buf;
|
union axis3bit16_t buf;
|
||||||
|
|
||||||
if (lsm6dso_angular_rate_raw_get(&data->ctx, buf.u8bit) < 0) {
|
if (lsm6dso_angular_rate_raw_get(ctx, buf.u8bit) < 0) {
|
||||||
LOG_DBG("Failed to read sample");
|
LOG_DBG("Failed to read sample");
|
||||||
return -EIO;
|
return -EIO;
|
||||||
}
|
}
|
||||||
|
@ -335,10 +346,12 @@ static int lsm6dso_sample_fetch_gyro(const struct device *dev)
|
||||||
#if defined(CONFIG_LSM6DSO_ENABLE_TEMP)
|
#if defined(CONFIG_LSM6DSO_ENABLE_TEMP)
|
||||||
static int lsm6dso_sample_fetch_temp(const struct device *dev)
|
static int lsm6dso_sample_fetch_temp(const struct device *dev)
|
||||||
{
|
{
|
||||||
|
const struct lsm6dso_config *cfg = dev->config;
|
||||||
|
stmdev_ctx_t *ctx = (stmdev_ctx_t *)&cfg->ctx;
|
||||||
struct lsm6dso_data *data = dev->data;
|
struct lsm6dso_data *data = dev->data;
|
||||||
union axis1bit16_t buf;
|
union axis1bit16_t buf;
|
||||||
|
|
||||||
if (lsm6dso_temperature_raw_get(&data->ctx, buf.u8bit) < 0) {
|
if (lsm6dso_temperature_raw_get(ctx, buf.u8bit) < 0) {
|
||||||
LOG_DBG("Failed to read sample");
|
LOG_DBG("Failed to read sample");
|
||||||
return -EIO;
|
return -EIO;
|
||||||
}
|
}
|
||||||
|
@ -691,10 +704,12 @@ static const struct sensor_driver_api lsm6dso_driver_api = {
|
||||||
|
|
||||||
static int lsm6dso_init_chip(const struct device *dev)
|
static int lsm6dso_init_chip(const struct device *dev)
|
||||||
{
|
{
|
||||||
|
const struct lsm6dso_config *cfg = dev->config;
|
||||||
|
stmdev_ctx_t *ctx = (stmdev_ctx_t *)&cfg->ctx;
|
||||||
struct lsm6dso_data *lsm6dso = dev->data;
|
struct lsm6dso_data *lsm6dso = dev->data;
|
||||||
uint8_t chip_id;
|
uint8_t chip_id;
|
||||||
|
|
||||||
if (lsm6dso_device_id_get(&lsm6dso->ctx, &chip_id) < 0) {
|
if (lsm6dso_device_id_get(ctx, &chip_id) < 0) {
|
||||||
LOG_DBG("Failed reading chip id");
|
LOG_DBG("Failed reading chip id");
|
||||||
return -EIO;
|
return -EIO;
|
||||||
}
|
}
|
||||||
|
@ -707,7 +722,7 @@ static int lsm6dso_init_chip(const struct device *dev)
|
||||||
}
|
}
|
||||||
|
|
||||||
/* reset device */
|
/* reset device */
|
||||||
if (lsm6dso_reset_set(&lsm6dso->ctx, 1) < 0) {
|
if (lsm6dso_reset_set(ctx, 1) < 0) {
|
||||||
return -EIO;
|
return -EIO;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -739,12 +754,12 @@ static int lsm6dso_init_chip(const struct device *dev)
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Set FIFO bypass mode */
|
/* Set FIFO bypass mode */
|
||||||
if (lsm6dso_fifo_mode_set(&lsm6dso->ctx, LSM6DSO_BYPASS_MODE) < 0) {
|
if (lsm6dso_fifo_mode_set(ctx, LSM6DSO_BYPASS_MODE) < 0) {
|
||||||
LOG_DBG("failed to set FIFO mode");
|
LOG_DBG("failed to set FIFO mode");
|
||||||
return -EIO;
|
return -EIO;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (lsm6dso_block_data_update_set(&lsm6dso->ctx, 1) < 0) {
|
if (lsm6dso_block_data_update_set(ctx, 1) < 0) {
|
||||||
LOG_DBG("failed to set BDU mode");
|
LOG_DBG("failed to set BDU mode");
|
||||||
return -EIO;
|
return -EIO;
|
||||||
}
|
}
|
||||||
|
@ -754,15 +769,10 @@ static int lsm6dso_init_chip(const struct device *dev)
|
||||||
|
|
||||||
static int lsm6dso_init(const struct device *dev)
|
static int lsm6dso_init(const struct device *dev)
|
||||||
{
|
{
|
||||||
const struct lsm6dso_config * const cfg = dev->config;
|
|
||||||
struct lsm6dso_data *data = dev->data;
|
struct lsm6dso_data *data = dev->data;
|
||||||
|
|
||||||
data->dev = dev;
|
data->dev = dev;
|
||||||
|
|
||||||
if (cfg->bus_init(dev) < 0) {
|
|
||||||
return -EINVAL;
|
|
||||||
}
|
|
||||||
|
|
||||||
#ifdef CONFIG_LSM6DSO_TRIGGER
|
#ifdef CONFIG_LSM6DSO_TRIGGER
|
||||||
if (lsm6dso_init_interrupt(dev) < 0) {
|
if (lsm6dso_init_interrupt(dev) < 0) {
|
||||||
LOG_ERR("Failed to initialize interrupt.");
|
LOG_ERR("Failed to initialize interrupt.");
|
||||||
|
@ -824,12 +834,20 @@ static int lsm6dso_init(const struct device *dev)
|
||||||
|
|
||||||
#define LSM6DSO_CONFIG_SPI(inst) \
|
#define LSM6DSO_CONFIG_SPI(inst) \
|
||||||
{ \
|
{ \
|
||||||
.stmemsc_cfg.spi.bus = DEVICE_DT_GET(DT_INST_BUS(inst)),\
|
.ctx = { \
|
||||||
.stmemsc_cfg.spi.spi_cfg = \
|
.read_reg = \
|
||||||
SPI_CONFIG_DT_INST(inst, \
|
(stmdev_read_ptr) stmemsc_spi_read, \
|
||||||
|
.write_reg = \
|
||||||
|
(stmdev_write_ptr) stmemsc_spi_write, \
|
||||||
|
.handle = \
|
||||||
|
(void *)&lsm6dso_config_##inst.stmemsc_cfg, \
|
||||||
|
}, \
|
||||||
|
.stmemsc_cfg.spi = { \
|
||||||
|
.bus = DEVICE_DT_GET(DT_INST_BUS(inst)), \
|
||||||
|
.spi_cfg = SPI_CONFIG_DT_INST(inst, \
|
||||||
LSM6DSO_SPI_OP, \
|
LSM6DSO_SPI_OP, \
|
||||||
0), \
|
0), \
|
||||||
.bus_init = lsm6dso_spi_init, \
|
}, \
|
||||||
COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, irq_gpios), \
|
COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, irq_gpios), \
|
||||||
(LSM6DSO_CFG_IRQ(inst)), ()) \
|
(LSM6DSO_CFG_IRQ(inst)), ()) \
|
||||||
}
|
}
|
||||||
|
@ -840,9 +858,18 @@ static int lsm6dso_init(const struct device *dev)
|
||||||
|
|
||||||
#define LSM6DSO_CONFIG_I2C(inst) \
|
#define LSM6DSO_CONFIG_I2C(inst) \
|
||||||
{ \
|
{ \
|
||||||
.stmemsc_cfg.i2c.bus = DEVICE_DT_GET(DT_INST_BUS(inst)),\
|
.ctx = { \
|
||||||
.stmemsc_cfg.i2c.i2c_slv_addr = DT_INST_REG_ADDR(inst), \
|
.read_reg = \
|
||||||
.bus_init = lsm6dso_i2c_init, \
|
(stmdev_read_ptr) stmemsc_i2c_read, \
|
||||||
|
.write_reg = \
|
||||||
|
(stmdev_write_ptr) stmemsc_i2c_write, \
|
||||||
|
.handle = \
|
||||||
|
(void *)&lsm6dso_config_##inst.stmemsc_cfg, \
|
||||||
|
}, \
|
||||||
|
.stmemsc_cfg.i2c = { \
|
||||||
|
.bus = DEVICE_DT_GET(DT_INST_BUS(inst)), \
|
||||||
|
.i2c_slv_addr = DT_INST_REG_ADDR(inst), \
|
||||||
|
}, \
|
||||||
COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, irq_gpios), \
|
COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, irq_gpios), \
|
||||||
(LSM6DSO_CFG_IRQ(inst)), ()) \
|
(LSM6DSO_CFG_IRQ(inst)), ()) \
|
||||||
}
|
}
|
||||||
|
|
|
@ -101,6 +101,7 @@ union axis1bit16_t {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
struct lsm6dso_config {
|
struct lsm6dso_config {
|
||||||
|
stmdev_ctx_t ctx;
|
||||||
union {
|
union {
|
||||||
#if DT_ANY_INST_ON_BUS_STATUS_OKAY(i2c)
|
#if DT_ANY_INST_ON_BUS_STATUS_OKAY(i2c)
|
||||||
const struct stmemsc_cfg_i2c i2c;
|
const struct stmemsc_cfg_i2c i2c;
|
||||||
|
@ -109,7 +110,6 @@ struct lsm6dso_config {
|
||||||
const struct stmemsc_cfg_spi spi;
|
const struct stmemsc_cfg_spi spi;
|
||||||
#endif
|
#endif
|
||||||
} stmemsc_cfg;
|
} stmemsc_cfg;
|
||||||
int (*bus_init)(const struct device *dev);
|
|
||||||
#ifdef CONFIG_LSM6DSO_TRIGGER
|
#ifdef CONFIG_LSM6DSO_TRIGGER
|
||||||
const struct gpio_dt_spec gpio_drdy;
|
const struct gpio_dt_spec gpio_drdy;
|
||||||
uint8_t int_pin;
|
uint8_t int_pin;
|
||||||
|
@ -123,22 +123,6 @@ union samples {
|
||||||
};
|
};
|
||||||
} __aligned(2);
|
} __aligned(2);
|
||||||
|
|
||||||
/* sensor data forward declaration (member definition is below) */
|
|
||||||
struct lsm6dso_data;
|
|
||||||
|
|
||||||
struct lsm6dso_tf {
|
|
||||||
int (*read_data)(struct lsm6dso_data *data, uint8_t reg_addr,
|
|
||||||
uint8_t *value, uint8_t len);
|
|
||||||
int (*write_data)(struct lsm6dso_data *data, uint8_t reg_addr,
|
|
||||||
uint8_t *value, uint8_t len);
|
|
||||||
int (*read_reg)(struct lsm6dso_data *data, uint8_t reg_addr,
|
|
||||||
uint8_t *value);
|
|
||||||
int (*write_reg)(struct lsm6dso_data *data, uint8_t reg_addr,
|
|
||||||
uint8_t value);
|
|
||||||
int (*update_reg)(struct lsm6dso_data *data, uint8_t reg_addr,
|
|
||||||
uint8_t mask, uint8_t value);
|
|
||||||
};
|
|
||||||
|
|
||||||
#define LSM6DSO_SHUB_MAX_NUM_SLVS 2
|
#define LSM6DSO_SHUB_MAX_NUM_SLVS 2
|
||||||
|
|
||||||
struct lsm6dso_data {
|
struct lsm6dso_data {
|
||||||
|
@ -162,8 +146,6 @@ struct lsm6dso_data {
|
||||||
} hts221;
|
} hts221;
|
||||||
#endif /* CONFIG_LSM6DSO_SENSORHUB */
|
#endif /* CONFIG_LSM6DSO_SENSORHUB */
|
||||||
|
|
||||||
stmdev_ctx_t ctx;
|
|
||||||
|
|
||||||
uint16_t accel_freq;
|
uint16_t accel_freq;
|
||||||
uint8_t accel_fs;
|
uint8_t accel_fs;
|
||||||
uint16_t gyro_freq;
|
uint16_t gyro_freq;
|
||||||
|
@ -185,8 +167,6 @@ struct lsm6dso_data {
|
||||||
#endif /* CONFIG_LSM6DSO_TRIGGER */
|
#endif /* CONFIG_LSM6DSO_TRIGGER */
|
||||||
};
|
};
|
||||||
|
|
||||||
int lsm6dso_spi_init(const struct device *dev);
|
|
||||||
int lsm6dso_i2c_init(const struct device *dev);
|
|
||||||
#if defined(CONFIG_LSM6DSO_SENSORHUB)
|
#if defined(CONFIG_LSM6DSO_SENSORHUB)
|
||||||
int lsm6dso_shub_init(const struct device *dev);
|
int lsm6dso_shub_init(const struct device *dev);
|
||||||
int lsm6dso_shub_fetch_external_devs(const struct device *dev);
|
int lsm6dso_shub_fetch_external_devs(const struct device *dev);
|
||||||
|
|
|
@ -1,38 +0,0 @@
|
||||||
/* ST Microelectronics LSM6DSO 6-axis IMU sensor driver
|
|
||||||
*
|
|
||||||
* Copyright (c) 2019 STMicroelectronics
|
|
||||||
*
|
|
||||||
* SPDX-License-Identifier: Apache-2.0
|
|
||||||
*
|
|
||||||
* Datasheet:
|
|
||||||
* https://www.st.com/resource/en/datasheet/lsm6dso.pdf
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define DT_DRV_COMPAT st_lsm6dso
|
|
||||||
|
|
||||||
#include <logging/log.h>
|
|
||||||
#include "lsm6dso.h"
|
|
||||||
|
|
||||||
#if DT_ANY_INST_ON_BUS_STATUS_OKAY(i2c)
|
|
||||||
|
|
||||||
LOG_MODULE_DECLARE(LSM6DSO, CONFIG_SENSOR_LOG_LEVEL);
|
|
||||||
|
|
||||||
int lsm6dso_i2c_init(const struct device *dev)
|
|
||||||
{
|
|
||||||
struct lsm6dso_data *data = dev->data;
|
|
||||||
const struct lsm6dso_config *cfg = dev->config;
|
|
||||||
|
|
||||||
if (!device_is_ready(cfg->stmemsc_cfg.i2c.bus)) {
|
|
||||||
LOG_ERR("Cannot get pointer to bus device");
|
|
||||||
return -ENODEV;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Use generic stmemsc routine for read/write I2C bus */
|
|
||||||
data->ctx.read_reg = (stmdev_read_ptr) stmemsc_i2c_read,
|
|
||||||
data->ctx.write_reg = (stmdev_write_ptr) stmemsc_i2c_write,
|
|
||||||
|
|
||||||
data->ctx.handle = (void *)&cfg->stmemsc_cfg.i2c;
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
#endif /* DT_ANY_INST_ON_BUS_STATUS_OKAY(i2c) */
|
|
|
@ -49,13 +49,13 @@ LOG_MODULE_DECLARE(LSM6DSO, CONFIG_SENSOR_LOG_LEVEL);
|
||||||
static uint8_t num_ext_dev;
|
static uint8_t num_ext_dev;
|
||||||
static uint8_t shub_ext[LSM6DSO_SHUB_MAX_NUM_SLVS];
|
static uint8_t shub_ext[LSM6DSO_SHUB_MAX_NUM_SLVS];
|
||||||
|
|
||||||
static int lsm6dso_shub_write_slave_reg(struct lsm6dso_data *data,
|
static int lsm6dso_shub_write_slave_reg(const struct device *dev,
|
||||||
uint8_t slv_addr, uint8_t slv_reg,
|
uint8_t slv_addr, uint8_t slv_reg,
|
||||||
uint8_t *value, uint16_t len);
|
uint8_t *value, uint16_t len);
|
||||||
static int lsm6dso_shub_read_slave_reg(struct lsm6dso_data *data,
|
static int lsm6dso_shub_read_slave_reg(const struct device *dev,
|
||||||
uint8_t slv_addr, uint8_t slv_reg,
|
uint8_t slv_addr, uint8_t slv_reg,
|
||||||
uint8_t *value, uint16_t len);
|
uint8_t *value, uint16_t len);
|
||||||
static void lsm6dso_shub_enable(struct lsm6dso_data *data, uint8_t enable);
|
static void lsm6dso_shub_enable(const struct device *dev, uint8_t enable);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* LIS2MDL magn device specific part
|
* LIS2MDL magn device specific part
|
||||||
|
@ -73,15 +73,16 @@ static void lsm6dso_shub_enable(struct lsm6dso_data *data, uint8_t enable);
|
||||||
#define LIS2MDL_OFF_CANC 0x02
|
#define LIS2MDL_OFF_CANC 0x02
|
||||||
#define LIS2MDL_SENSITIVITY 1500
|
#define LIS2MDL_SENSITIVITY 1500
|
||||||
|
|
||||||
static int lsm6dso_lis2mdl_init(struct lsm6dso_data *data, uint8_t i2c_addr)
|
static int lsm6dso_lis2mdl_init(const struct device *dev, uint8_t i2c_addr)
|
||||||
{
|
{
|
||||||
|
struct lsm6dso_data *data = dev->data;
|
||||||
uint8_t mag_cfg[2];
|
uint8_t mag_cfg[2];
|
||||||
|
|
||||||
data->magn_gain = LIS2MDL_SENSITIVITY;
|
data->magn_gain = LIS2MDL_SENSITIVITY;
|
||||||
|
|
||||||
/* sw reset device */
|
/* sw reset device */
|
||||||
mag_cfg[0] = LIS2MDL_SW_RESET;
|
mag_cfg[0] = LIS2MDL_SW_RESET;
|
||||||
lsm6dso_shub_write_slave_reg(data, i2c_addr,
|
lsm6dso_shub_write_slave_reg(dev, i2c_addr,
|
||||||
LIS2MDL_CFG_REG_A, mag_cfg, 1);
|
LIS2MDL_CFG_REG_A, mag_cfg, 1);
|
||||||
|
|
||||||
k_sleep(K_MSEC(10)); /* turn-on time in ms */
|
k_sleep(K_MSEC(10)); /* turn-on time in ms */
|
||||||
|
@ -89,7 +90,7 @@ static int lsm6dso_lis2mdl_init(struct lsm6dso_data *data, uint8_t i2c_addr)
|
||||||
/* configure mag */
|
/* configure mag */
|
||||||
mag_cfg[0] = LIS2MDL_ODR_10HZ;
|
mag_cfg[0] = LIS2MDL_ODR_10HZ;
|
||||||
mag_cfg[1] = LIS2MDL_OFF_CANC;
|
mag_cfg[1] = LIS2MDL_OFF_CANC;
|
||||||
lsm6dso_shub_write_slave_reg(data, i2c_addr,
|
lsm6dso_shub_write_slave_reg(dev, i2c_addr,
|
||||||
LIS2MDL_CFG_REG_A, mag_cfg, 2);
|
LIS2MDL_CFG_REG_A, mag_cfg, 2);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
@ -97,7 +98,7 @@ static int lsm6dso_lis2mdl_init(struct lsm6dso_data *data, uint8_t i2c_addr)
|
||||||
|
|
||||||
static const uint16_t lis2mdl_map[] = {10, 20, 50, 100};
|
static const uint16_t lis2mdl_map[] = {10, 20, 50, 100};
|
||||||
|
|
||||||
static int lsm6dso_lis2mdl_odr_set(struct lsm6dso_data *data,
|
static int lsm6dso_lis2mdl_odr_set(const struct device *dev,
|
||||||
uint8_t i2c_addr, uint16_t freq)
|
uint8_t i2c_addr, uint16_t freq)
|
||||||
{
|
{
|
||||||
uint8_t odr, cfg;
|
uint8_t odr, cfg;
|
||||||
|
@ -114,21 +115,21 @@ static int lsm6dso_lis2mdl_odr_set(struct lsm6dso_data *data,
|
||||||
}
|
}
|
||||||
|
|
||||||
cfg = (odr << 2);
|
cfg = (odr << 2);
|
||||||
lsm6dso_shub_write_slave_reg(data, i2c_addr,
|
lsm6dso_shub_write_slave_reg(dev, i2c_addr,
|
||||||
LIS2MDL_CFG_REG_A, &cfg, 1);
|
LIS2MDL_CFG_REG_A, &cfg, 1);
|
||||||
|
|
||||||
lsm6dso_shub_enable(data, 1);
|
lsm6dso_shub_enable(dev, 1);
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int lsm6dso_lis2mdl_conf(struct lsm6dso_data *data, uint8_t i2c_addr,
|
static int lsm6dso_lis2mdl_conf(const struct device *dev, uint8_t i2c_addr,
|
||||||
enum sensor_channel chan,
|
enum sensor_channel chan,
|
||||||
enum sensor_attribute attr,
|
enum sensor_attribute attr,
|
||||||
const struct sensor_value *val)
|
const struct sensor_value *val)
|
||||||
{
|
{
|
||||||
switch (attr) {
|
switch (attr) {
|
||||||
case SENSOR_ATTR_SAMPLING_FREQUENCY:
|
case SENSOR_ATTR_SAMPLING_FREQUENCY:
|
||||||
return lsm6dso_lis2mdl_odr_set(data, i2c_addr, val->val1);
|
return lsm6dso_lis2mdl_odr_set(dev, i2c_addr, val->val1);
|
||||||
default:
|
default:
|
||||||
LOG_DBG("shub: LIS2MDL attribute not supported.");
|
LOG_DBG("shub: LIS2MDL attribute not supported.");
|
||||||
return -ENOTSUP;
|
return -ENOTSUP;
|
||||||
|
@ -152,7 +153,7 @@ static int lsm6dso_lis2mdl_conf(struct lsm6dso_data *data, uint8_t i2c_addr,
|
||||||
|
|
||||||
#define HTS221_REG_CONV_START 0x30
|
#define HTS221_REG_CONV_START 0x30
|
||||||
|
|
||||||
static int lsmdso_hts221_read_conv_data(struct lsm6dso_data *data,
|
static int lsmdso_hts221_read_conv_data(const struct device *dev,
|
||||||
uint8_t i2c_addr)
|
uint8_t i2c_addr)
|
||||||
{
|
{
|
||||||
uint8_t buf[16], i;
|
uint8_t buf[16], i;
|
||||||
|
@ -178,13 +179,13 @@ static int lsmdso_hts221_read_conv_data(struct lsm6dso_data *data,
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int lsm6dso_hts221_init(struct lsm6dso_data *data, uint8_t i2c_addr)
|
static int lsm6dso_hts221_init(const struct device *dev, uint8_t i2c_addr)
|
||||||
{
|
{
|
||||||
uint8_t hum_cfg;
|
uint8_t hum_cfg;
|
||||||
|
|
||||||
/* configure ODR and BDU */
|
/* configure ODR and BDU */
|
||||||
hum_cfg = HTS221_ODR_1HZ | HTS221_BDU | HTS221_PD;
|
hum_cfg = HTS221_ODR_1HZ | HTS221_BDU | HTS221_PD;
|
||||||
lsm6dso_shub_write_slave_reg(data, i2c_addr,
|
lsm6dso_shub_write_slave_reg(dev, i2c_addr,
|
||||||
HTS221_REG_CTRL1, &hum_cfg, 1);
|
HTS221_REG_CTRL1, &hum_cfg, 1);
|
||||||
|
|
||||||
return lsmdso_hts221_read_conv_data(data, i2c_addr);
|
return lsmdso_hts221_read_conv_data(data, i2c_addr);
|
||||||
|
@ -192,7 +193,7 @@ static int lsm6dso_hts221_init(struct lsm6dso_data *data, uint8_t i2c_addr)
|
||||||
|
|
||||||
static const uint16_t hts221_map[] = {0, 1, 7, 12};
|
static const uint16_t hts221_map[] = {0, 1, 7, 12};
|
||||||
|
|
||||||
static int lsm6dso_hts221_odr_set(struct lsm6dso_data *data,
|
static int lsm6dso_hts221_odr_set(const struct device *dev,
|
||||||
uint8_t i2c_addr, uint16_t freq)
|
uint8_t i2c_addr, uint16_t freq)
|
||||||
{
|
{
|
||||||
uint8_t odr, cfg;
|
uint8_t odr, cfg;
|
||||||
|
@ -209,14 +210,14 @@ static int lsm6dso_hts221_odr_set(struct lsm6dso_data *data,
|
||||||
}
|
}
|
||||||
|
|
||||||
cfg = odr | HTS221_BDU | HTS221_PD;
|
cfg = odr | HTS221_BDU | HTS221_PD;
|
||||||
lsm6dso_shub_write_slave_reg(data, i2c_addr,
|
lsm6dso_shub_write_slave_reg(dev, i2c_addr,
|
||||||
HTS221_REG_CTRL1, &cfg, 1);
|
HTS221_REG_CTRL1, &cfg, 1);
|
||||||
|
|
||||||
lsm6dso_shub_enable(data, 1);
|
lsm6dso_shub_enable(dev, 1);
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int lsm6dso_hts221_conf(struct lsm6dso_data *data, uint8_t i2c_addr,
|
static int lsm6dso_hts221_conf(const struct device *dev, uint8_t i2c_addr,
|
||||||
enum sensor_channel chan,
|
enum sensor_channel chan,
|
||||||
enum sensor_attribute attr,
|
enum sensor_attribute attr,
|
||||||
const struct sensor_value *val)
|
const struct sensor_value *val)
|
||||||
|
@ -246,20 +247,20 @@ static int lsm6dso_hts221_conf(struct lsm6dso_data *data, uint8_t i2c_addr,
|
||||||
#define LPS22HB_LPF_EN 0x08
|
#define LPS22HB_LPF_EN 0x08
|
||||||
#define LPS22HB_BDU_EN 0x02
|
#define LPS22HB_BDU_EN 0x02
|
||||||
|
|
||||||
static int lsm6dso_lps22hb_init(struct lsm6dso_data *data, uint8_t i2c_addr)
|
static int lsm6dso_lps22hb_init(const struct device *dev, uint8_t i2c_addr)
|
||||||
{
|
{
|
||||||
uint8_t baro_cfg[2];
|
uint8_t baro_cfg[2];
|
||||||
|
|
||||||
/* sw reset device */
|
/* sw reset device */
|
||||||
baro_cfg[0] = LPS22HB_SW_RESET;
|
baro_cfg[0] = LPS22HB_SW_RESET;
|
||||||
lsm6dso_shub_write_slave_reg(data, i2c_addr,
|
lsm6dso_shub_write_slave_reg(dev, i2c_addr,
|
||||||
LPS22HB_CTRL_REG2, baro_cfg, 1);
|
LPS22HB_CTRL_REG2, baro_cfg, 1);
|
||||||
|
|
||||||
k_sleep(K_MSEC(1)); /* turn-on time in ms */
|
k_sleep(K_MSEC(1)); /* turn-on time in ms */
|
||||||
|
|
||||||
/* configure device */
|
/* configure device */
|
||||||
baro_cfg[0] = LPS22HB_ODR_10HZ | LPS22HB_LPF_EN | LPS22HB_BDU_EN;
|
baro_cfg[0] = LPS22HB_ODR_10HZ | LPS22HB_LPF_EN | LPS22HB_BDU_EN;
|
||||||
lsm6dso_shub_write_slave_reg(data, i2c_addr,
|
lsm6dso_shub_write_slave_reg(dev, i2c_addr,
|
||||||
LPS22HB_CTRL_REG1, baro_cfg, 1);
|
LPS22HB_CTRL_REG1, baro_cfg, 1);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
@ -280,24 +281,24 @@ static int lsm6dso_lps22hb_init(struct lsm6dso_data *data, uint8_t i2c_addr)
|
||||||
#define LPS22HH_LPF_EN 0x08
|
#define LPS22HH_LPF_EN 0x08
|
||||||
#define LPS22HH_BDU_EN 0x02
|
#define LPS22HH_BDU_EN 0x02
|
||||||
|
|
||||||
static int lsm6dso_lps22hh_init(struct lsm6dso_data *data, uint8_t i2c_addr)
|
static int lsm6dso_lps22hh_init(const struct device *dev, uint8_t i2c_addr)
|
||||||
{
|
{
|
||||||
uint8_t baro_cfg[2];
|
uint8_t baro_cfg[2];
|
||||||
|
|
||||||
/* sw reset device */
|
/* sw reset device */
|
||||||
baro_cfg[0] = LPS22HH_SW_RESET;
|
baro_cfg[0] = LPS22HH_SW_RESET;
|
||||||
lsm6dso_shub_write_slave_reg(data, i2c_addr,
|
lsm6dso_shub_write_slave_reg(dev, i2c_addr,
|
||||||
LPS22HH_CTRL_REG2, baro_cfg, 1);
|
LPS22HH_CTRL_REG2, baro_cfg, 1);
|
||||||
|
|
||||||
k_sleep(K_MSEC(100)); /* turn-on time in ms */
|
k_sleep(K_MSEC(100)); /* turn-on time in ms */
|
||||||
|
|
||||||
/* configure device */
|
/* configure device */
|
||||||
baro_cfg[0] = LPS22HH_IF_ADD_INC;
|
baro_cfg[0] = LPS22HH_IF_ADD_INC;
|
||||||
lsm6dso_shub_write_slave_reg(data, i2c_addr,
|
lsm6dso_shub_write_slave_reg(dev, i2c_addr,
|
||||||
LPS22HH_CTRL_REG2, baro_cfg, 1);
|
LPS22HH_CTRL_REG2, baro_cfg, 1);
|
||||||
|
|
||||||
baro_cfg[0] = LPS22HH_ODR_10HZ | LPS22HH_LPF_EN | LPS22HH_BDU_EN;
|
baro_cfg[0] = LPS22HH_ODR_10HZ | LPS22HH_LPF_EN | LPS22HH_BDU_EN;
|
||||||
lsm6dso_shub_write_slave_reg(data, i2c_addr,
|
lsm6dso_shub_write_slave_reg(dev, i2c_addr,
|
||||||
LPS22HH_CTRL_REG1, baro_cfg, 1);
|
LPS22HH_CTRL_REG1, baro_cfg, 1);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
@ -305,7 +306,7 @@ static int lsm6dso_lps22hh_init(struct lsm6dso_data *data, uint8_t i2c_addr)
|
||||||
|
|
||||||
static const uint16_t lps22hh_map[] = {0, 1, 10, 25, 50, 75, 100, 200};
|
static const uint16_t lps22hh_map[] = {0, 1, 10, 25, 50, 75, 100, 200};
|
||||||
|
|
||||||
static int lsm6dso_lps22hh_odr_set(struct lsm6dso_data *data,
|
static int lsm6dso_lps22hh_odr_set(const struct device *dev,
|
||||||
uint8_t i2c_addr, uint16_t freq)
|
uint8_t i2c_addr, uint16_t freq)
|
||||||
{
|
{
|
||||||
uint8_t odr, cfg;
|
uint8_t odr, cfg;
|
||||||
|
@ -322,21 +323,21 @@ static int lsm6dso_lps22hh_odr_set(struct lsm6dso_data *data,
|
||||||
}
|
}
|
||||||
|
|
||||||
cfg = (odr << 4) | LPS22HH_LPF_EN | LPS22HH_BDU_EN;
|
cfg = (odr << 4) | LPS22HH_LPF_EN | LPS22HH_BDU_EN;
|
||||||
lsm6dso_shub_write_slave_reg(data, i2c_addr,
|
lsm6dso_shub_write_slave_reg(dev, i2c_addr,
|
||||||
LPS22HH_CTRL_REG1, &cfg, 1);
|
LPS22HH_CTRL_REG1, &cfg, 1);
|
||||||
|
|
||||||
lsm6dso_shub_enable(data, 1);
|
lsm6dso_shub_enable(dev, 1);
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int lsm6dso_lps22hh_conf(struct lsm6dso_data *data, uint8_t i2c_addr,
|
static int lsm6dso_lps22hh_conf(const struct device *dev, uint8_t i2c_addr,
|
||||||
enum sensor_channel chan,
|
enum sensor_channel chan,
|
||||||
enum sensor_attribute attr,
|
enum sensor_attribute attr,
|
||||||
const struct sensor_value *val)
|
const struct sensor_value *val)
|
||||||
{
|
{
|
||||||
switch (attr) {
|
switch (attr) {
|
||||||
case SENSOR_ATTR_SAMPLING_FREQUENCY:
|
case SENSOR_ATTR_SAMPLING_FREQUENCY:
|
||||||
return lsm6dso_lps22hh_odr_set(data, i2c_addr, val->val1);
|
return lsm6dso_lps22hh_odr_set(dev, i2c_addr, val->val1);
|
||||||
default:
|
default:
|
||||||
LOG_DBG("shub: LPS22HH attribute not supported.");
|
LOG_DBG("shub: LPS22HH attribute not supported.");
|
||||||
return -ENOTSUP;
|
return -ENOTSUP;
|
||||||
|
@ -356,8 +357,8 @@ static struct lsm6dso_shub_slist {
|
||||||
uint8_t out_data_addr;
|
uint8_t out_data_addr;
|
||||||
uint8_t out_data_len;
|
uint8_t out_data_len;
|
||||||
uint8_t sh_out_reg;
|
uint8_t sh_out_reg;
|
||||||
int (*dev_init)(struct lsm6dso_data *data, uint8_t i2c_addr);
|
int (*dev_init)(const struct device *dev, uint8_t i2c_addr);
|
||||||
int (*dev_conf)(struct lsm6dso_data *data, uint8_t i2c_addr,
|
int (*dev_conf)(const struct device *dev, uint8_t i2c_addr,
|
||||||
enum sensor_channel chan, enum sensor_attribute attr,
|
enum sensor_channel chan, enum sensor_attribute attr,
|
||||||
const struct sensor_value *val);
|
const struct sensor_value *val);
|
||||||
} lsm6dso_shub_slist[] = {
|
} lsm6dso_shub_slist[] = {
|
||||||
|
@ -417,88 +418,94 @@ static struct lsm6dso_shub_slist {
|
||||||
#endif /* CONFIG_LSM6DSO_EXT_LPS22HH */
|
#endif /* CONFIG_LSM6DSO_EXT_LPS22HH */
|
||||||
};
|
};
|
||||||
|
|
||||||
static inline void lsm6dso_shub_wait_completed(struct lsm6dso_data *data)
|
static inline void lsm6dso_shub_wait_completed(stmdev_ctx_t *ctx)
|
||||||
{
|
{
|
||||||
uint16_t freq;
|
lsm6dso_status_master_t status;
|
||||||
|
|
||||||
freq = (data->accel_freq == 0) ? 26 : data->accel_freq;
|
do {
|
||||||
k_msleep((2000U / freq) + 1);
|
k_msleep(1);
|
||||||
|
lsm6dso_sh_status_get(ctx, &status);
|
||||||
|
} while (status.sens_hub_endop == 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline void lsm6dso_shub_embedded_en(struct lsm6dso_data *data, bool on)
|
static inline void lsm6dso_shub_embedded_en(stmdev_ctx_t *ctx, bool on)
|
||||||
{
|
{
|
||||||
if (on) {
|
if (on) {
|
||||||
(void) lsm6dso_mem_bank_set(&data->ctx, LSM6DSO_SENSOR_HUB_BANK);
|
(void) lsm6dso_mem_bank_set(ctx, LSM6DSO_SENSOR_HUB_BANK);
|
||||||
} else {
|
} else {
|
||||||
(void) lsm6dso_mem_bank_set(&data->ctx, LSM6DSO_USER_BANK);
|
(void) lsm6dso_mem_bank_set(ctx, LSM6DSO_USER_BANK);
|
||||||
}
|
}
|
||||||
|
|
||||||
k_busy_wait(150);
|
k_busy_wait(150);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int lsm6dso_shub_read_embedded_regs(struct lsm6dso_data *data,
|
static int lsm6dso_shub_read_embedded_regs(stmdev_ctx_t *ctx,
|
||||||
uint8_t reg_addr,
|
uint8_t reg_addr,
|
||||||
uint8_t *value, int len)
|
uint8_t *value, int len)
|
||||||
{
|
{
|
||||||
lsm6dso_shub_embedded_en(data, true);
|
lsm6dso_shub_embedded_en(ctx, true);
|
||||||
|
|
||||||
if (lsm6dso_read_reg(&data->ctx, reg_addr, value, len) < 0) {
|
if (lsm6dso_read_reg(ctx, reg_addr, value, len) < 0) {
|
||||||
LOG_DBG("shub: failed to read external reg: %02x", reg_addr);
|
LOG_DBG("shub: failed to read external reg: %02x", reg_addr);
|
||||||
lsm6dso_shub_embedded_en(data, false);
|
lsm6dso_shub_embedded_en(ctx, false);
|
||||||
return -EIO;
|
return -EIO;
|
||||||
}
|
}
|
||||||
|
|
||||||
lsm6dso_shub_embedded_en(data, false);
|
lsm6dso_shub_embedded_en(ctx, false);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int lsm6dso_shub_write_embedded_regs(struct lsm6dso_data *data,
|
static int lsm6dso_shub_write_embedded_regs(stmdev_ctx_t *ctx,
|
||||||
uint8_t reg_addr,
|
uint8_t reg_addr,
|
||||||
uint8_t *value, uint8_t len)
|
uint8_t *value, uint8_t len)
|
||||||
{
|
{
|
||||||
lsm6dso_shub_embedded_en(data, true);
|
lsm6dso_shub_embedded_en(ctx, true);
|
||||||
|
|
||||||
if (lsm6dso_write_reg(&data->ctx, reg_addr, value, len) < 0) {
|
if (lsm6dso_write_reg(ctx, reg_addr, value, len) < 0) {
|
||||||
LOG_DBG("shub: failed to write external reg: %02x", reg_addr);
|
LOG_DBG("shub: failed to write external reg: %02x", reg_addr);
|
||||||
lsm6dso_shub_embedded_en(data, false);
|
lsm6dso_shub_embedded_en(ctx, false);
|
||||||
return -EIO;
|
return -EIO;
|
||||||
}
|
}
|
||||||
|
|
||||||
lsm6dso_shub_embedded_en(data, false);
|
lsm6dso_shub_embedded_en(ctx, false);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void lsm6dso_shub_enable(struct lsm6dso_data *data, uint8_t enable)
|
static void lsm6dso_shub_enable(const struct device *dev, uint8_t enable)
|
||||||
{
|
{
|
||||||
|
const struct lsm6dso_config *cfg = dev->config;
|
||||||
|
stmdev_ctx_t *ctx = (stmdev_ctx_t *)&cfg->ctx;
|
||||||
|
struct lsm6dso_data *data = dev->data;
|
||||||
|
|
||||||
/* Enable Accel @26hz */
|
/* Enable Accel @26hz */
|
||||||
if (!data->accel_freq) {
|
if (!data->accel_freq) {
|
||||||
uint8_t odr = (enable) ? 2 : 0;
|
uint8_t odr = (enable) ? 2 : 0;
|
||||||
|
|
||||||
if (lsm6dso_xl_data_rate_set(&data->ctx, odr) < 0) {
|
if (lsm6dso_xl_data_rate_set(ctx, odr) < 0) {
|
||||||
LOG_DBG("shub: failed to set XL sampling rate");
|
LOG_DBG("shub: failed to set XL sampling rate");
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
lsm6dso_shub_embedded_en(data, true);
|
lsm6dso_shub_embedded_en(ctx, true);
|
||||||
|
|
||||||
if (lsm6dso_sh_master_set(&data->ctx, enable) < 0) {
|
if (lsm6dso_sh_master_set(ctx, enable) < 0) {
|
||||||
LOG_DBG("shub: failed to set master on");
|
LOG_DBG("shub: failed to set master on");
|
||||||
lsm6dso_shub_embedded_en(data, false);
|
lsm6dso_shub_embedded_en(ctx, false);
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
lsm6dso_shub_embedded_en(data, false);
|
lsm6dso_shub_embedded_en(ctx, false);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* must be called with master on */
|
/* must be called with master on */
|
||||||
static int lsm6dso_shub_check_slv0_nack(struct lsm6dso_data *data)
|
static int lsm6dso_shub_check_slv0_nack(stmdev_ctx_t *ctx)
|
||||||
{
|
{
|
||||||
uint8_t status;
|
uint8_t status;
|
||||||
|
|
||||||
if (lsm6dso_shub_read_embedded_regs(data, LSM6DSO_SHUB_STATUS_MASTER,
|
if (lsm6dso_shub_read_embedded_regs(ctx, LSM6DSO_SHUB_STATUS_MASTER,
|
||||||
&status, 1) < 0) {
|
&status, 1) < 0) {
|
||||||
LOG_DBG("shub: error reading embedded reg");
|
LOG_DBG("shub: error reading embedded reg");
|
||||||
return -EIO;
|
return -EIO;
|
||||||
|
@ -515,51 +522,55 @@ static int lsm6dso_shub_check_slv0_nack(struct lsm6dso_data *data)
|
||||||
/*
|
/*
|
||||||
* use SLV0 for generic read to slave device
|
* use SLV0 for generic read to slave device
|
||||||
*/
|
*/
|
||||||
static int lsm6dso_shub_read_slave_reg(struct lsm6dso_data *data,
|
static int lsm6dso_shub_read_slave_reg(const struct device *dev,
|
||||||
uint8_t slv_addr, uint8_t slv_reg,
|
uint8_t slv_addr, uint8_t slv_reg,
|
||||||
uint8_t *value, uint16_t len)
|
uint8_t *value, uint16_t len)
|
||||||
{
|
{
|
||||||
|
const struct lsm6dso_config *cfg = dev->config;
|
||||||
|
stmdev_ctx_t *ctx = (stmdev_ctx_t *)&cfg->ctx;
|
||||||
uint8_t slave[3];
|
uint8_t slave[3];
|
||||||
|
|
||||||
slave[0] = (slv_addr << 1) | LSM6DSO_SHUB_SLVX_READ;
|
slave[0] = (slv_addr << 1) | LSM6DSO_SHUB_SLVX_READ;
|
||||||
slave[1] = slv_reg;
|
slave[1] = slv_reg;
|
||||||
slave[2] = (len & 0x7);
|
slave[2] = (len & 0x7);
|
||||||
|
|
||||||
if (lsm6dso_shub_write_embedded_regs(data, LSM6DSO_SHUB_SLV0_ADDR,
|
if (lsm6dso_shub_write_embedded_regs(ctx, LSM6DSO_SHUB_SLV0_ADDR,
|
||||||
slave, 3) < 0) {
|
slave, 3) < 0) {
|
||||||
LOG_DBG("shub: error writing embedded reg");
|
LOG_DBG("shub: error writing embedded reg");
|
||||||
return -EIO;
|
return -EIO;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* turn SH on */
|
/* turn SH on */
|
||||||
lsm6dso_shub_enable(data, 1);
|
lsm6dso_shub_enable(dev, 1);
|
||||||
lsm6dso_shub_wait_completed(data);
|
lsm6dso_shub_wait_completed(ctx);
|
||||||
|
|
||||||
/* read data from external slave */
|
/* read data from external slave */
|
||||||
lsm6dso_shub_embedded_en(data, true);
|
lsm6dso_shub_embedded_en(ctx, true);
|
||||||
if (lsm6dso_read_reg(&data->ctx, LSM6DSO_SHUB_DATA_OUT,
|
if (lsm6dso_read_reg(ctx, LSM6DSO_SHUB_DATA_OUT,
|
||||||
value, len) < 0) {
|
value, len) < 0) {
|
||||||
LOG_DBG("shub: error reading sensor data");
|
LOG_DBG("shub: error reading sensor data");
|
||||||
return -EIO;
|
return -EIO;
|
||||||
}
|
}
|
||||||
lsm6dso_shub_embedded_en(data, false);
|
lsm6dso_shub_embedded_en(ctx, false);
|
||||||
|
|
||||||
if (lsm6dso_shub_check_slv0_nack(data) < 0) {
|
if (lsm6dso_shub_check_slv0_nack(ctx) < 0) {
|
||||||
lsm6dso_shub_enable(data, 0);
|
lsm6dso_shub_enable(dev, 0);
|
||||||
return -EIO;
|
return -EIO;
|
||||||
}
|
}
|
||||||
|
|
||||||
lsm6dso_shub_enable(data, 0);
|
lsm6dso_shub_enable(dev, 0);
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* use SLV0 to configure slave device
|
* use SLV0 to configure slave device
|
||||||
*/
|
*/
|
||||||
static int lsm6dso_shub_write_slave_reg(struct lsm6dso_data *data,
|
static int lsm6dso_shub_write_slave_reg(const struct device *dev,
|
||||||
uint8_t slv_addr, uint8_t slv_reg,
|
uint8_t slv_addr, uint8_t slv_reg,
|
||||||
uint8_t *value, uint16_t len)
|
uint8_t *value, uint16_t len)
|
||||||
{
|
{
|
||||||
|
const struct lsm6dso_config *cfg = dev->config;
|
||||||
|
stmdev_ctx_t *ctx = (stmdev_ctx_t *)&cfg->ctx;
|
||||||
uint8_t slv_cfg[3];
|
uint8_t slv_cfg[3];
|
||||||
uint8_t cnt = 0U;
|
uint8_t cnt = 0U;
|
||||||
|
|
||||||
|
@ -567,7 +578,7 @@ static int lsm6dso_shub_write_slave_reg(struct lsm6dso_data *data,
|
||||||
slv_cfg[0] = (slv_addr << 1) & ~LSM6DSO_SHUB_SLVX_READ;
|
slv_cfg[0] = (slv_addr << 1) & ~LSM6DSO_SHUB_SLVX_READ;
|
||||||
slv_cfg[1] = slv_reg + cnt;
|
slv_cfg[1] = slv_reg + cnt;
|
||||||
|
|
||||||
if (lsm6dso_shub_write_embedded_regs(data,
|
if (lsm6dso_shub_write_embedded_regs(ctx,
|
||||||
LSM6DSO_SHUB_SLV0_ADDR,
|
LSM6DSO_SHUB_SLV0_ADDR,
|
||||||
slv_cfg, 2) < 0) {
|
slv_cfg, 2) < 0) {
|
||||||
LOG_DBG("shub: error writing embedded reg");
|
LOG_DBG("shub: error writing embedded reg");
|
||||||
|
@ -575,7 +586,7 @@ static int lsm6dso_shub_write_slave_reg(struct lsm6dso_data *data,
|
||||||
}
|
}
|
||||||
|
|
||||||
slv_cfg[0] = value[cnt];
|
slv_cfg[0] = value[cnt];
|
||||||
if (lsm6dso_shub_write_embedded_regs(data,
|
if (lsm6dso_shub_write_embedded_regs(ctx,
|
||||||
LSM6DSO_SHUB_SLV0_DATAWRITE,
|
LSM6DSO_SHUB_SLV0_DATAWRITE,
|
||||||
slv_cfg, 1) < 0) {
|
slv_cfg, 1) < 0) {
|
||||||
LOG_DBG("shub: error writing embedded reg");
|
LOG_DBG("shub: error writing embedded reg");
|
||||||
|
@ -583,15 +594,15 @@ static int lsm6dso_shub_write_slave_reg(struct lsm6dso_data *data,
|
||||||
}
|
}
|
||||||
|
|
||||||
/* turn SH on */
|
/* turn SH on */
|
||||||
lsm6dso_shub_enable(data, 1);
|
lsm6dso_shub_enable(dev, 1);
|
||||||
lsm6dso_shub_wait_completed(data);
|
lsm6dso_shub_wait_completed(ctx);
|
||||||
|
|
||||||
if (lsm6dso_shub_check_slv0_nack(data) < 0) {
|
if (lsm6dso_shub_check_slv0_nack(ctx) < 0) {
|
||||||
lsm6dso_shub_enable(data, 0);
|
lsm6dso_shub_enable(dev, 0);
|
||||||
return -EIO;
|
return -EIO;
|
||||||
}
|
}
|
||||||
|
|
||||||
lsm6dso_shub_enable(data, 0);
|
lsm6dso_shub_enable(dev, 0);
|
||||||
|
|
||||||
cnt++;
|
cnt++;
|
||||||
}
|
}
|
||||||
|
@ -600,7 +611,7 @@ static int lsm6dso_shub_write_slave_reg(struct lsm6dso_data *data,
|
||||||
slv_cfg[0] = 0x7;
|
slv_cfg[0] = 0x7;
|
||||||
slv_cfg[1] = 0x0;
|
slv_cfg[1] = 0x0;
|
||||||
slv_cfg[2] = 0x0;
|
slv_cfg[2] = 0x0;
|
||||||
if (lsm6dso_shub_write_embedded_regs(data, LSM6DSO_SHUB_SLV0_ADDR,
|
if (lsm6dso_shub_write_embedded_regs(ctx, LSM6DSO_SHUB_SLV0_ADDR,
|
||||||
slv_cfg, 3) < 0) {
|
slv_cfg, 3) < 0) {
|
||||||
LOG_DBG("shub: error writing embedded reg");
|
LOG_DBG("shub: error writing embedded reg");
|
||||||
return -EIO;
|
return -EIO;
|
||||||
|
@ -617,8 +628,10 @@ static int lsm6dso_shub_write_slave_reg(struct lsm6dso_data *data,
|
||||||
* - SLAVE 2: used as data read channel for external slave device #2
|
* - SLAVE 2: used as data read channel for external slave device #2
|
||||||
* - SLAVE 3: used for generic reads while data channel is enabled
|
* - SLAVE 3: used for generic reads while data channel is enabled
|
||||||
*/
|
*/
|
||||||
static int lsm6dso_shub_set_data_channel(struct lsm6dso_data *data)
|
static int lsm6dso_shub_set_data_channel(const struct device *dev)
|
||||||
{
|
{
|
||||||
|
const struct lsm6dso_config *cfg = dev->config;
|
||||||
|
stmdev_ctx_t *ctx = (stmdev_ctx_t *)&cfg->ctx;
|
||||||
uint8_t n, i, slv_cfg[6];
|
uint8_t n, i, slv_cfg[6];
|
||||||
struct lsm6dso_shub_slist *sp;
|
struct lsm6dso_shub_slist *sp;
|
||||||
|
|
||||||
|
@ -632,7 +645,7 @@ static int lsm6dso_shub_set_data_channel(struct lsm6dso_data *data)
|
||||||
slv_cfg[i + 2] = sp->out_data_len;
|
slv_cfg[i + 2] = sp->out_data_len;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (lsm6dso_shub_write_embedded_regs(data,
|
if (lsm6dso_shub_write_embedded_regs(ctx,
|
||||||
LSM6DSO_SHUB_SLV1_ADDR,
|
LSM6DSO_SHUB_SLV1_ADDR,
|
||||||
slv_cfg, n*3) < 0) {
|
slv_cfg, n*3) < 0) {
|
||||||
LOG_DBG("shub: error writing embedded reg");
|
LOG_DBG("shub: error writing embedded reg");
|
||||||
|
@ -642,22 +655,22 @@ static int lsm6dso_shub_set_data_channel(struct lsm6dso_data *data)
|
||||||
/* Configure the master */
|
/* Configure the master */
|
||||||
lsm6dso_aux_sens_on_t aux = LSM6DSO_SLV_0_1_2;
|
lsm6dso_aux_sens_on_t aux = LSM6DSO_SLV_0_1_2;
|
||||||
|
|
||||||
if (lsm6dso_sh_slave_connected_set(&data->ctx, aux) < 0) {
|
if (lsm6dso_sh_slave_connected_set(ctx, aux) < 0) {
|
||||||
LOG_DBG("shub: error setting aux sensors");
|
LOG_DBG("shub: error setting aux sensors");
|
||||||
return -EIO;
|
return -EIO;
|
||||||
}
|
}
|
||||||
|
|
||||||
lsm6dso_write_once_t wo = LSM6DSO_ONLY_FIRST_CYCLE;
|
lsm6dso_write_once_t wo = LSM6DSO_ONLY_FIRST_CYCLE;
|
||||||
|
|
||||||
if (lsm6dso_sh_write_mode_set(&data->ctx, wo) < 0) {
|
if (lsm6dso_sh_write_mode_set(ctx, wo) < 0) {
|
||||||
LOG_DBG("shub: error setting write once");
|
LOG_DBG("shub: error setting write once");
|
||||||
return -EIO;
|
return -EIO;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
/* turn SH on */
|
/* turn SH on */
|
||||||
lsm6dso_shub_enable(data, 1);
|
lsm6dso_shub_enable(dev, 1);
|
||||||
lsm6dso_shub_wait_completed(data);
|
lsm6dso_shub_wait_completed(ctx);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
@ -680,23 +693,26 @@ int lsm6dso_shub_get_idx(enum sensor_channel type)
|
||||||
int lsm6dso_shub_fetch_external_devs(const struct device *dev)
|
int lsm6dso_shub_fetch_external_devs(const struct device *dev)
|
||||||
{
|
{
|
||||||
uint8_t n;
|
uint8_t n;
|
||||||
|
const struct lsm6dso_config *cfg = dev->config;
|
||||||
|
stmdev_ctx_t *ctx = (stmdev_ctx_t *)&cfg->ctx;
|
||||||
struct lsm6dso_data *data = dev->data;
|
struct lsm6dso_data *data = dev->data;
|
||||||
struct lsm6dso_shub_slist *sp;
|
struct lsm6dso_shub_slist *sp;
|
||||||
|
|
||||||
/* read data from external slave */
|
/* read data from external slave */
|
||||||
lsm6dso_shub_embedded_en(data, true);
|
lsm6dso_shub_embedded_en(ctx, true);
|
||||||
|
|
||||||
for (n = 0; n < num_ext_dev; n++) {
|
for (n = 0; n < num_ext_dev; n++) {
|
||||||
sp = &lsm6dso_shub_slist[shub_ext[n]];
|
sp = &lsm6dso_shub_slist[shub_ext[n]];
|
||||||
|
|
||||||
if (lsm6dso_read_reg(&data->ctx, sp->sh_out_reg,
|
if (lsm6dso_read_reg(ctx, sp->sh_out_reg,
|
||||||
data->ext_data[n], sp->out_data_len) < 0) {
|
data->ext_data[n], sp->out_data_len) < 0) {
|
||||||
LOG_DBG("shub: failed to read sample");
|
LOG_DBG("shub: failed to read sample");
|
||||||
|
lsm6dso_shub_embedded_en(ctx, false);
|
||||||
return -EIO;
|
return -EIO;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
lsm6dso_shub_embedded_en(data, false);
|
lsm6dso_shub_embedded_en(ctx, false);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
@ -705,7 +721,6 @@ int lsm6dso_shub_config(const struct device *dev, enum sensor_channel chan,
|
||||||
enum sensor_attribute attr,
|
enum sensor_attribute attr,
|
||||||
const struct sensor_value *val)
|
const struct sensor_value *val)
|
||||||
{
|
{
|
||||||
struct lsm6dso_data *data = dev->data;
|
|
||||||
struct lsm6dso_shub_slist *sp = NULL;
|
struct lsm6dso_shub_slist *sp = NULL;
|
||||||
uint8_t n;
|
uint8_t n;
|
||||||
|
|
||||||
|
@ -726,12 +741,11 @@ int lsm6dso_shub_config(const struct device *dev, enum sensor_channel chan,
|
||||||
return -ENOTSUP;
|
return -ENOTSUP;
|
||||||
}
|
}
|
||||||
|
|
||||||
return sp->dev_conf(data, sp->ext_i2c_addr, chan, attr, val);
|
return sp->dev_conf(dev, sp->ext_i2c_addr, chan, attr, val);
|
||||||
}
|
}
|
||||||
|
|
||||||
int lsm6dso_shub_init(const struct device *dev)
|
int lsm6dso_shub_init(const struct device *dev)
|
||||||
{
|
{
|
||||||
struct lsm6dso_data *data = dev->data;
|
|
||||||
uint8_t i, n = 0, regn;
|
uint8_t i, n = 0, regn;
|
||||||
uint8_t chip_id;
|
uint8_t chip_id;
|
||||||
struct lsm6dso_shub_slist *sp;
|
struct lsm6dso_shub_slist *sp;
|
||||||
|
@ -749,7 +763,7 @@ int lsm6dso_shub_init(const struct device *dev)
|
||||||
* chip ID.
|
* chip ID.
|
||||||
*/
|
*/
|
||||||
for (i = 0U; i < ARRAY_SIZE(sp->i2c_addr); i++) {
|
for (i = 0U; i < ARRAY_SIZE(sp->i2c_addr); i++) {
|
||||||
if (lsm6dso_shub_read_slave_reg(data,
|
if (lsm6dso_shub_read_slave_reg(dev,
|
||||||
sp->i2c_addr[i],
|
sp->i2c_addr[i],
|
||||||
sp->wai_addr,
|
sp->wai_addr,
|
||||||
&chip_id, 1) < 0) {
|
&chip_id, 1) < 0) {
|
||||||
|
@ -781,10 +795,10 @@ int lsm6dso_shub_init(const struct device *dev)
|
||||||
sp = &lsm6dso_shub_slist[shub_ext[n]];
|
sp = &lsm6dso_shub_slist[shub_ext[n]];
|
||||||
sp->sh_out_reg = LSM6DSO_SHUB_DATA_OUT + regn;
|
sp->sh_out_reg = LSM6DSO_SHUB_DATA_OUT + regn;
|
||||||
regn += sp->out_data_len;
|
regn += sp->out_data_len;
|
||||||
sp->dev_init(data, sp->ext_i2c_addr);
|
sp->dev_init(dev, sp->ext_i2c_addr);
|
||||||
}
|
}
|
||||||
|
|
||||||
lsm6dso_shub_set_data_channel(data);
|
lsm6dso_shub_set_data_channel(dev);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
|
@ -1,38 +0,0 @@
|
||||||
/* ST Microelectronics LSM6DSO 6-axis IMU sensor driver
|
|
||||||
*
|
|
||||||
* Copyright (c) 2019 STMicroelectronics
|
|
||||||
*
|
|
||||||
* SPDX-License-Identifier: Apache-2.0
|
|
||||||
*
|
|
||||||
* Datasheet:
|
|
||||||
* https://www.st.com/resource/en/datasheet/lsm6dso.pdf
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define DT_DRV_COMPAT st_lsm6dso
|
|
||||||
|
|
||||||
#include "lsm6dso.h"
|
|
||||||
#include <logging/log.h>
|
|
||||||
|
|
||||||
#if DT_ANY_INST_ON_BUS_STATUS_OKAY(spi)
|
|
||||||
|
|
||||||
LOG_MODULE_DECLARE(LSM6DSO, CONFIG_SENSOR_LOG_LEVEL);
|
|
||||||
|
|
||||||
int lsm6dso_spi_init(const struct device *dev)
|
|
||||||
{
|
|
||||||
struct lsm6dso_data *data = dev->data;
|
|
||||||
const struct lsm6dso_config *cfg = dev->config;
|
|
||||||
|
|
||||||
if (!device_is_ready(cfg->stmemsc_cfg.spi.bus)) {
|
|
||||||
LOG_ERR("Cannot get pointer to bus device");
|
|
||||||
return -ENODEV;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Use generic stmemsc routine for read/write SPI bus */
|
|
||||||
data->ctx.read_reg = (stmdev_read_ptr) stmemsc_spi_read;
|
|
||||||
data->ctx.write_reg = (stmdev_write_ptr) stmemsc_spi_write;
|
|
||||||
|
|
||||||
data->ctx.handle = (void *)&cfg->stmemsc_cfg.spi;
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
#endif /* DT_ANY_INST_ON_BUS_STATUS_OKAY(spi) */
|
|
|
@ -26,6 +26,7 @@ LOG_MODULE_DECLARE(LSM6DSO, CONFIG_SENSOR_LOG_LEVEL);
|
||||||
static int lsm6dso_enable_t_int(const struct device *dev, int enable)
|
static int lsm6dso_enable_t_int(const struct device *dev, int enable)
|
||||||
{
|
{
|
||||||
const struct lsm6dso_config *cfg = dev->config;
|
const struct lsm6dso_config *cfg = dev->config;
|
||||||
|
stmdev_ctx_t *ctx = (stmdev_ctx_t *)&cfg->ctx;
|
||||||
struct lsm6dso_data *lsm6dso = dev->data;
|
struct lsm6dso_data *lsm6dso = dev->data;
|
||||||
lsm6dso_int2_ctrl_t int2_ctrl;
|
lsm6dso_int2_ctrl_t int2_ctrl;
|
||||||
|
|
||||||
|
@ -33,17 +34,16 @@ static int lsm6dso_enable_t_int(const struct device *dev, int enable)
|
||||||
union axis1bit16_t buf;
|
union axis1bit16_t buf;
|
||||||
|
|
||||||
/* dummy read: re-trigger interrupt */
|
/* dummy read: re-trigger interrupt */
|
||||||
lsm6dso_temperature_raw_get(&lsm6dso->ctx, buf.u8bit);
|
lsm6dso_temperature_raw_get(ctx, buf.u8bit);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* set interrupt (TEMP DRDY interrupt is only on INT2) */
|
/* set interrupt (TEMP DRDY interrupt is only on INT2) */
|
||||||
if (cfg->int_pin == 1)
|
if (cfg->int_pin == 1)
|
||||||
return -EIO;
|
return -EIO;
|
||||||
|
|
||||||
lsm6dso_read_reg(&lsm6dso->ctx, LSM6DSO_INT2_CTRL,
|
lsm6dso_read_reg(ctx, LSM6DSO_INT2_CTRL, (uint8_t *)&int2_ctrl, 1);
|
||||||
(uint8_t *)&int2_ctrl, 1);
|
|
||||||
int2_route.int2_ctrl.int2_drdy_temp = enable;
|
int2_route.int2_ctrl.int2_drdy_temp = enable;
|
||||||
return lsm6dso_write_reg(&lsm6dso->ctx, LSM6DSO_INT2_CTRL,
|
return lsm6dso_write_reg(ctx, LSM6DSO_INT2_CTRL,
|
||||||
(uint8_t *)&int2_ctrl, 1);
|
(uint8_t *)&int2_ctrl, 1);
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
@ -54,32 +54,32 @@ static int lsm6dso_enable_t_int(const struct device *dev, int enable)
|
||||||
static int lsm6dso_enable_xl_int(const struct device *dev, int enable)
|
static int lsm6dso_enable_xl_int(const struct device *dev, int enable)
|
||||||
{
|
{
|
||||||
const struct lsm6dso_config *cfg = dev->config;
|
const struct lsm6dso_config *cfg = dev->config;
|
||||||
struct lsm6dso_data *lsm6dso = dev->data;
|
stmdev_ctx_t *ctx = (stmdev_ctx_t *)&cfg->ctx;
|
||||||
|
|
||||||
if (enable) {
|
if (enable) {
|
||||||
union axis3bit16_t buf;
|
union axis3bit16_t buf;
|
||||||
|
|
||||||
/* dummy read: re-trigger interrupt */
|
/* dummy read: re-trigger interrupt */
|
||||||
lsm6dso_acceleration_raw_get(&lsm6dso->ctx, buf.u8bit);
|
lsm6dso_acceleration_raw_get(ctx, buf.u8bit);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* set interrupt */
|
/* set interrupt */
|
||||||
if (cfg->int_pin == 1) {
|
if (cfg->int_pin == 1) {
|
||||||
lsm6dso_int1_ctrl_t int1_ctrl;
|
lsm6dso_int1_ctrl_t int1_ctrl;
|
||||||
|
|
||||||
lsm6dso_read_reg(&lsm6dso->ctx, LSM6DSO_INT1_CTRL,
|
lsm6dso_read_reg(ctx, LSM6DSO_INT1_CTRL,
|
||||||
(uint8_t *)&int1_ctrl, 1);
|
(uint8_t *)&int1_ctrl, 1);
|
||||||
|
|
||||||
int1_ctrl.int1_drdy_xl = enable;
|
int1_ctrl.int1_drdy_xl = enable;
|
||||||
return lsm6dso_write_reg(&lsm6dso->ctx, LSM6DSO_INT1_CTRL,
|
return lsm6dso_write_reg(ctx, LSM6DSO_INT1_CTRL,
|
||||||
(uint8_t *)&int1_ctrl, 1);
|
(uint8_t *)&int1_ctrl, 1);
|
||||||
} else {
|
} else {
|
||||||
lsm6dso_int2_ctrl_t int2_ctrl;
|
lsm6dso_int2_ctrl_t int2_ctrl;
|
||||||
|
|
||||||
lsm6dso_read_reg(&lsm6dso->ctx, LSM6DSO_INT2_CTRL,
|
lsm6dso_read_reg(ctx, LSM6DSO_INT2_CTRL,
|
||||||
(uint8_t *)&int2_ctrl, 1);
|
(uint8_t *)&int2_ctrl, 1);
|
||||||
int2_ctrl.int2_drdy_xl = enable;
|
int2_ctrl.int2_drdy_xl = enable;
|
||||||
return lsm6dso_write_reg(&lsm6dso->ctx, LSM6DSO_INT2_CTRL,
|
return lsm6dso_write_reg(ctx, LSM6DSO_INT2_CTRL,
|
||||||
(uint8_t *)&int2_ctrl, 1);
|
(uint8_t *)&int2_ctrl, 1);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -90,31 +90,31 @@ static int lsm6dso_enable_xl_int(const struct device *dev, int enable)
|
||||||
static int lsm6dso_enable_g_int(const struct device *dev, int enable)
|
static int lsm6dso_enable_g_int(const struct device *dev, int enable)
|
||||||
{
|
{
|
||||||
const struct lsm6dso_config *cfg = dev->config;
|
const struct lsm6dso_config *cfg = dev->config;
|
||||||
struct lsm6dso_data *lsm6dso = dev->data;
|
stmdev_ctx_t *ctx = (stmdev_ctx_t *)&cfg->ctx;
|
||||||
|
|
||||||
if (enable) {
|
if (enable) {
|
||||||
union axis3bit16_t buf;
|
union axis3bit16_t buf;
|
||||||
|
|
||||||
/* dummy read: re-trigger interrupt */
|
/* dummy read: re-trigger interrupt */
|
||||||
lsm6dso_angular_rate_raw_get(&lsm6dso->ctx, buf.u8bit);
|
lsm6dso_angular_rate_raw_get(ctx, buf.u8bit);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* set interrupt */
|
/* set interrupt */
|
||||||
if (cfg->int_pin == 1) {
|
if (cfg->int_pin == 1) {
|
||||||
lsm6dso_int1_ctrl_t int1_ctrl;
|
lsm6dso_int1_ctrl_t int1_ctrl;
|
||||||
|
|
||||||
lsm6dso_read_reg(&lsm6dso->ctx, LSM6DSO_INT1_CTRL,
|
lsm6dso_read_reg(ctx, LSM6DSO_INT1_CTRL,
|
||||||
(uint8_t *)&int1_ctrl, 1);
|
(uint8_t *)&int1_ctrl, 1);
|
||||||
int1_ctrl.int1_drdy_g = enable;
|
int1_ctrl.int1_drdy_g = enable;
|
||||||
return lsm6dso_write_reg(&lsm6dso->ctx, LSM6DSO_INT1_CTRL,
|
return lsm6dso_write_reg(ctx, LSM6DSO_INT1_CTRL,
|
||||||
(uint8_t *)&int1_ctrl, 1);
|
(uint8_t *)&int1_ctrl, 1);
|
||||||
} else {
|
} else {
|
||||||
lsm6dso_int2_ctrl_t int2_ctrl;
|
lsm6dso_int2_ctrl_t int2_ctrl;
|
||||||
|
|
||||||
lsm6dso_read_reg(&lsm6dso->ctx, LSM6DSO_INT2_CTRL,
|
lsm6dso_read_reg(ctx, LSM6DSO_INT2_CTRL,
|
||||||
(uint8_t *)&int2_ctrl, 1);
|
(uint8_t *)&int2_ctrl, 1);
|
||||||
int2_ctrl.int2_drdy_g = enable;
|
int2_ctrl.int2_drdy_g = enable;
|
||||||
return lsm6dso_write_reg(&lsm6dso->ctx, LSM6DSO_INT2_CTRL,
|
return lsm6dso_write_reg(ctx, LSM6DSO_INT2_CTRL,
|
||||||
(uint8_t *)&int2_ctrl, 1);
|
(uint8_t *)&int2_ctrl, 1);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -168,10 +168,11 @@ static void lsm6dso_handle_interrupt(const struct device *dev)
|
||||||
.type = SENSOR_TRIG_DATA_READY,
|
.type = SENSOR_TRIG_DATA_READY,
|
||||||
};
|
};
|
||||||
const struct lsm6dso_config *cfg = dev->config;
|
const struct lsm6dso_config *cfg = dev->config;
|
||||||
|
stmdev_ctx_t *ctx = (stmdev_ctx_t *)&cfg->ctx;
|
||||||
lsm6dso_status_reg_t status;
|
lsm6dso_status_reg_t status;
|
||||||
|
|
||||||
while (1) {
|
while (1) {
|
||||||
if (lsm6dso_status_reg_get(&lsm6dso->ctx, &status) < 0) {
|
if (lsm6dso_status_reg_get(ctx, &status) < 0) {
|
||||||
LOG_DBG("failed reading status reg");
|
LOG_DBG("failed reading status reg");
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
@ -246,6 +247,7 @@ int lsm6dso_init_interrupt(const struct device *dev)
|
||||||
{
|
{
|
||||||
struct lsm6dso_data *lsm6dso = dev->data;
|
struct lsm6dso_data *lsm6dso = dev->data;
|
||||||
const struct lsm6dso_config *cfg = dev->config;
|
const struct lsm6dso_config *cfg = dev->config;
|
||||||
|
stmdev_ctx_t *ctx = (stmdev_ctx_t *)&cfg->ctx;
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
/* setup data ready gpio interrupt (INT1 or INT2) */
|
/* setup data ready gpio interrupt (INT1 or INT2) */
|
||||||
|
@ -283,8 +285,7 @@ int lsm6dso_init_interrupt(const struct device *dev)
|
||||||
}
|
}
|
||||||
|
|
||||||
/* enable interrupt on int1/int2 in pulse mode */
|
/* enable interrupt on int1/int2 in pulse mode */
|
||||||
if (lsm6dso_int_notification_set(&lsm6dso->ctx,
|
if (lsm6dso_int_notification_set(ctx, LSM6DSO_ALL_INT_PULSED) < 0) {
|
||||||
LSM6DSO_ALL_INT_PULSED) < 0) {
|
|
||||||
LOG_DBG("Could not set pulse mode");
|
LOG_DBG("Could not set pulse mode");
|
||||||
return -EIO;
|
return -EIO;
|
||||||
}
|
}
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue