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tracing: riscv: fix tracing of context switch

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We had switched_in and switched_out mixed up.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit is contained in:
Anas Nashif 2020-08-04 17:23:20 -04:00 • committed by Carles Cufí
commit caa348034f
1 changed files with 4 additions and 1 deletions
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5
arch/riscv/core/isr.S
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@ -371,7 +371,7 @@ on_thread_stack:
reschedule:
#if CONFIG_TRACING
call sys_trace_thread_switched_in
call sys_trace_thread_switched_out
#endif
/* Get reference to _kernel */
la t0, _kernel
@ -526,6 +526,9 @@ skip_load_fp_caller_saved_benchmark:
/* Release stack space */
addi sp, sp, __z_arch_esf_t_SIZEOF
#endif
#if CONFIG_TRACING
call sys_trace_thread_switched_in
#endif
no_reschedule:
#ifdef CONFIG_RISCV_SOC_CONTEXT_SAVE