serial: sam0: Add support for SAME54
The SAME5x/SAMD5x MCUs share their SERCOM peripherals with the samd2x and saml1x MCUs with only few registers changed. Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
This commit is contained in:
Benjamin Valentin
Andrew Boie
parent
2e1d2889e2
commit
ca9a64bd13
1 changed files with 90 additions and 30 deletions
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@ -12,13 +12,23 @@
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#include <drivers/uart.h>
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#include <drivers/dma.h>
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#ifndef SERCOM_USART_CTRLA_MODE_USART_INT_CLK
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#define SERCOM_USART_CTRLA_MODE_USART_INT_CLK SERCOM_USART_CTRLA_MODE(0x1)
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#endif
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/* Device constant configuration parameters */
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struct uart_sam0_dev_cfg {
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SercomUsart *regs;
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u32_t baudrate;
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u32_t pads;
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#ifdef MCLK
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volatile uint32_t *mclk;
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u32_t mclk_mask;
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u16_t gclk_core_id;
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#else
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u32_t pm_apbcmask;
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u16_t gclk_clkctrl_id;
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#endif
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#if CONFIG_UART_INTERRUPT_DRIVEN || CONFIG_UART_ASYNC_API
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void (*irq_config_func)(struct device *dev);
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#endif
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@ -373,12 +383,21 @@ static int uart_sam0_init(struct device *dev)
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const struct uart_sam0_dev_cfg *const cfg = DEV_CFG(dev);
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SercomUsart *const usart = cfg->regs;
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#ifdef MCLK
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/* Enable the GCLK */
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GCLK->CLKCTRL.reg =
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cfg->gclk_clkctrl_id | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_CLKEN;
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GCLK->PCHCTRL[cfg->gclk_core_id].reg = GCLK_PCHCTRL_GEN_GCLK0 |
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GCLK_PCHCTRL_CHEN;
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/* Enable SERCOM clock in MCLK */
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*cfg->mclk |= cfg->mclk_mask;
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#else
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/* Enable the GCLK */
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GCLK->CLKCTRL.reg = cfg->gclk_clkctrl_id | GCLK_CLKCTRL_GEN_GCLK0 |
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GCLK_CLKCTRL_CLKEN;
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/* Enable SERCOM clock in PM */
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PM->APBCMASK.reg |= cfg->pm_apbcmask;
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#endif
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/* Disable all USART interrupts */
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usart->INTENCLR.reg = SERCOM_USART_INTENCLR_MASK;
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@ -386,9 +405,9 @@ static int uart_sam0_init(struct device *dev)
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/* 8 bits of data, no parity, 1 stop bit in normal mode */
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usart->CTRLA.reg =
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cfg->pads |
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cfg->pads
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/* Internal clock */
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SERCOM_USART_CTRLA_MODE_USART_INT_CLK
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| SERCOM_USART_CTRLA_MODE_USART_INT_CLK
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#if defined(SERCOM_USART_CTRLA_SAMPR)
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/* 16x oversampling with arithmetic baud rate generation */
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| SERCOM_USART_CTRLA_SAMPR(0)
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@ -398,7 +417,7 @@ static int uart_sam0_init(struct device *dev)
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wait_synchronization(usart);
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/* Enable receiver and transmitter */
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usart->CTRLB.reg = SERCOM_SPI_CTRLB_CHSIZE(0) |
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usart->CTRLB.reg = SERCOM_USART_CTRLB_CHSIZE(0) |
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SERCOM_USART_CTRLB_RXEN | SERCOM_USART_CTRLB_TXEN;
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wait_synchronization(usart);
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@ -905,20 +924,39 @@ static const struct uart_driver_api uart_sam0_driver_api = {
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};
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#if CONFIG_UART_INTERRUPT_DRIVEN || CONFIG_UART_ASYNC_API
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#define DT_ATMEL_SAM0_UART_SERCOM_IRQ(n, m) DT_ATMEL_SAM0_UART_SERCOM_ ## n ## _IRQ_ ## m
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#define DT_ATMEL_SAM0_UART_SERCOM_IRQ_PRIORITY(n, m) DT_ATMEL_SAM0_UART_SERCOM_ ## n ## _IRQ_ ## m ## _PRIORITY
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#define SAM0_UART_IRQ_CONNECT(n, m) \
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do { \
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IRQ_CONNECT(DT_ATMEL_SAM0_UART_SERCOM_IRQ(n, m), \
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DT_ATMEL_SAM0_UART_SERCOM_IRQ_PRIORITY(n, m), \
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uart_sam0_isr, DEVICE_GET(uart_sam0_##n), 0); \
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irq_enable(DT_ATMEL_SAM0_UART_SERCOM_IRQ(n, m)); \
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} while (0)
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#define UART_SAM0_IRQ_HANDLER_DECL(n) \
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static void uart_sam0_irq_config_##n(struct device *dev)
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static void uart_sam0_irq_config_##n(struct device *dev)
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#define UART_SAM0_IRQ_HANDLER_FUNC(n) \
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.irq_config_func = uart_sam0_irq_config_##n,
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#ifdef DT_ATMEL_SAM0_UART_0_IRQ_3
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#define UART_SAM0_IRQ_HANDLER(n) \
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static void uart_sam0_irq_config_##n(struct device *dev) \
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{ \
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IRQ_CONNECT(DT_ATMEL_SAM0_UART_SERCOM_##n##_IRQ_0, \
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DT_ATMEL_SAM0_UART_SERCOM_##n##_IRQ_0_PRIORITY, \
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uart_sam0_isr, DEVICE_GET(uart_sam0_##n), \
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0); \
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irq_enable(DT_ATMEL_SAM0_UART_SERCOM_##n##_IRQ_0); \
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SAM0_UART_IRQ_CONNECT(n, 0); \
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SAM0_UART_IRQ_CONNECT(n, 1); \
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SAM0_UART_IRQ_CONNECT(n, 2); \
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SAM0_UART_IRQ_CONNECT(n, 3); \
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}
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#else
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#define UART_SAM0_IRQ_HANDLER(n) \
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static void uart_sam0_irq_config_##n(struct device *dev) \
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{ \
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SAM0_UART_IRQ_CONNECT(n, 0); \
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}
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#endif
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#else
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#define UART_SAM0_IRQ_HANDLER_DECL(n)
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#define UART_SAM0_IRQ_HANDLER_FUNC(n)
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#define UART_SAM0_IRQ_HANDLER(n)
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@ -972,29 +1010,43 @@ static void uart_sam0_irq_config_##n(struct device *dev) \
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#endif
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#define UART_SAM0_SERCOM_PADS(n) \
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(DT_ATMEL_SAM0_UART_SERCOM_##n##_RXPO << SERCOM_USART_CTRLA_RXPO_Pos) |\
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(DT_ATMEL_SAM0_UART_SERCOM_##n##_RXPO << SERCOM_USART_CTRLA_RXPO_Pos) | \
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(DT_ATMEL_SAM0_UART_SERCOM_##n##_TXPO << SERCOM_USART_CTRLA_TXPO_Pos)
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#define UART_SAM0_CONFIG_DEFN(n) \
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static const struct uart_sam0_dev_cfg uart_sam0_config_##n = { \
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.regs = (SercomUsart *)DT_ATMEL_SAM0_UART_SERCOM_##n##_BASE_ADDRESS, \
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.baudrate = DT_ATMEL_SAM0_UART_SERCOM_##n##_CURRENT_SPEED, \
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.pm_apbcmask = PM_APBCMASK_SERCOM##n, \
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.gclk_clkctrl_id = GCLK_CLKCTRL_ID_SERCOM##n##_CORE, \
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.pads = UART_SAM0_SERCOM_PADS(n), \
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UART_SAM0_IRQ_HANDLER_FUNC(n) \
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UART_SAM0_DMA_CHANNELS(n) \
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#ifdef MCLK
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#define UART_SAM0_CONFIG_DEFN(n) \
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static const struct uart_sam0_dev_cfg uart_sam0_config_##n = { \
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.regs = (SercomUsart *)DT_ATMEL_SAM0_UART_SERCOM_##n##_BASE_ADDRESS, \
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.baudrate = DT_ATMEL_SAM0_UART_SERCOM_##n##_CURRENT_SPEED, \
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.mclk = MCLK_SERCOM##n, \
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.mclk_mask = MCLK_SERCOM##n##_MASK, \
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.gclk_core_id = SERCOM##n##_GCLK_ID_CORE, \
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.pads = UART_SAM0_SERCOM_PADS(n), \
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UART_SAM0_IRQ_HANDLER_FUNC(n) \
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UART_SAM0_DMA_CHANNELS(n) \
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}
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#else
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#define UART_SAM0_CONFIG_DEFN(n) \
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static const struct uart_sam0_dev_cfg uart_sam0_config_##n = { \
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.regs = (SercomUsart *)DT_ATMEL_SAM0_UART_SERCOM_##n##_BASE_ADDRESS, \
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.baudrate = DT_ATMEL_SAM0_UART_SERCOM_##n##_CURRENT_SPEED, \
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.pm_apbcmask = PM_APBCMASK_SERCOM##n, \
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.gclk_clkctrl_id = GCLK_CLKCTRL_ID_SERCOM##n##_CORE, \
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.pads = UART_SAM0_SERCOM_PADS(n), \
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UART_SAM0_IRQ_HANDLER_FUNC(n) \
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UART_SAM0_DMA_CHANNELS(n) \
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}
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#endif
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#define UART_SAM0_DEVICE_INIT(n) \
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static struct uart_sam0_dev_data uart_sam0_data_##n; \
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UART_SAM0_IRQ_HANDLER_DECL(n); \
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UART_SAM0_CONFIG_DEFN(n); \
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DEVICE_AND_API_INIT(uart_sam0_##n, DT_ATMEL_SAM0_UART_SERCOM_##n##_LABEL, \
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uart_sam0_init, &uart_sam0_data_##n, \
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&uart_sam0_config_##n, PRE_KERNEL_1, \
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
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&uart_sam0_driver_api); \
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#define UART_SAM0_DEVICE_INIT(n) \
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static struct uart_sam0_dev_data uart_sam0_data_##n; \
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UART_SAM0_IRQ_HANDLER_DECL(n); \
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UART_SAM0_CONFIG_DEFN(n); \
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DEVICE_AND_API_INIT(uart_sam0_##n, DT_ATMEL_SAM0_UART_SERCOM_##n##_LABEL, \
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uart_sam0_init, &uart_sam0_data_##n, \
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&uart_sam0_config_##n, PRE_KERNEL_1, \
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
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&uart_sam0_driver_api); \
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UART_SAM0_IRQ_HANDLER(n)
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#if DT_ATMEL_SAM0_UART_SERCOM_0_BASE_ADDRESS
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@ -1020,3 +1072,11 @@ UART_SAM0_DEVICE_INIT(4)
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#if DT_ATMEL_SAM0_UART_SERCOM_5_BASE_ADDRESS
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UART_SAM0_DEVICE_INIT(5)
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#endif
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#if DT_ATMEL_SAM0_UART_SERCOM_6_BASE_ADDRESS
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UART_SAM0_DEVICE_INIT(6)
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#endif
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#if DT_ATMEL_SAM0_UART_SERCOM7_BASE_ADDRESS
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UART_SAM0_DEVICE_INIT(7)
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#endif
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