From ca346ba21690aa643da61a44c0eee04c9f2f8b2a Mon Sep 17 00:00:00 2001 From: Sylvio Alves Date: Thu, 23 Nov 2023 09:35:12 -0300 Subject: [PATCH] soc: esp32: call reset cause reason init Reset cause reason was not initalized properly, making hwinfo feature not to work as expected. Fixes #65634 Signed-off-by: Sylvio Alves --- soc/riscv/espressif_esp32/esp32c3/soc.c | 4 ++++ soc/xtensa/espressif_esp32/esp32/soc.c | 3 +++ soc/xtensa/espressif_esp32/esp32s2/soc.c | 3 +++ soc/xtensa/espressif_esp32/esp32s3/soc.c | 3 +++ west.yml | 2 +- 5 files changed, 14 insertions(+), 1 deletion(-) diff --git a/soc/riscv/espressif_esp32/esp32c3/soc.c b/soc/riscv/espressif_esp32/esp32c3/soc.c index 8bb32a5febd..c125450a4d9 100644 --- a/soc/riscv/espressif_esp32/esp32c3/soc.c +++ b/soc/riscv/espressif_esp32/esp32c3/soc.c @@ -30,6 +30,8 @@ #include "bootloader_init.h" #endif /* CONFIG_MCUBOOT */ +extern void esp_reset_reason_init(void); + /* * This is written in C rather than assembly since, during the port bring up, * Zephyr is being booted by the Espressif bootloader. With it, the C stack @@ -56,6 +58,8 @@ void __attribute__((section(".iram1"))) __esp_platform_start(void) /* Disable normal interrupts. */ csr_read_clear(mstatus, MSTATUS_MIE); + esp_reset_reason_init(); + #ifdef CONFIG_MCUBOOT /* MCUboot early initialisation. */ diff --git a/soc/xtensa/espressif_esp32/esp32/soc.c b/soc/xtensa/espressif_esp32/esp32/soc.c index 2abd0f6a88a..7834406f37b 100644 --- a/soc/xtensa/espressif_esp32/esp32/soc.c +++ b/soc/xtensa/espressif_esp32/esp32/soc.c @@ -41,6 +41,7 @@ #include extern void z_cstart(void); +extern void esp_reset_reason_init(void); #ifdef CONFIG_ESP32_NETWORK_CORE extern const unsigned char esp32_net_fw_array[]; @@ -119,6 +120,8 @@ void __attribute__((section(".iram1"))) __esp_platform_start(void) */ __asm__ volatile("wsr.MISC0 %0; rsync" : : "r"(&_kernel.cpus[0])); + esp_reset_reason_init(); + #ifdef CONFIG_MCUBOOT /* MCUboot early initialisation. */ if (bootloader_init()) { diff --git a/soc/xtensa/espressif_esp32/esp32s2/soc.c b/soc/xtensa/espressif_esp32/esp32s2/soc.c index 45edde47178..5e1ec21c075 100644 --- a/soc/xtensa/espressif_esp32/esp32s2/soc.c +++ b/soc/xtensa/espressif_esp32/esp32s2/soc.c @@ -37,6 +37,7 @@ #endif /* CONFIG_MCUBOOT */ extern void rtc_clk_cpu_freq_set_xtal(void); +extern void esp_reset_reason_init(void); #if CONFIG_ESP_SPIRAM extern int _ext_ram_bss_start; @@ -91,6 +92,8 @@ void __attribute__((section(".iram1"))) __esp_platform_start(void) */ __asm__ volatile("wsr.MISC0 %0; rsync" : : "r"(&_kernel.cpus[0])); + esp_reset_reason_init(); + #ifdef CONFIG_MCUBOOT /* MCUboot early initialisation. */ if (bootloader_init()) { diff --git a/soc/xtensa/espressif_esp32/esp32s3/soc.c b/soc/xtensa/espressif_esp32/esp32s3/soc.c index ad971b907b2..d250657c49e 100644 --- a/soc/xtensa/espressif_esp32/esp32s3/soc.c +++ b/soc/xtensa/espressif_esp32/esp32s3/soc.c @@ -47,6 +47,7 @@ extern int _ext_ram_bss_end; #endif extern void z_cstart(void); +extern void esp_reset_reason_init(void); #ifdef CONFIG_SOC_ESP32S3_PROCPU extern const unsigned char esp32s3_appcpu_fw_array[]; @@ -184,6 +185,8 @@ void IRAM_ATTR __esp_platform_start(void) wdt_hal_disable(&rtc_wdt_ctx); wdt_hal_write_protect_enable(&rtc_wdt_ctx); + esp_reset_reason_init(); + esp_clk_init(); esp_timer_early_init(); diff --git a/west.yml b/west.yml index 71cbf94efb2..afaa1203891 100644 --- a/west.yml +++ b/west.yml @@ -152,7 +152,7 @@ manifest: groups: - hal - name: hal_espressif - revision: b3cb13f06586543ae1d156dc3e84b2fd3dc2f1fb + revision: ca3be152414bb269647806c4d3091e04168d1add path: modules/hal/espressif west-commands: west/west-commands.yml groups: