soc: arm: silabs: remove custom fixed MPU region definition
We remove the custom fixed MPU region definition from Silicon Labs exx32 SoC definitions, as the common fixed MPU region definition is now used. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
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3 changed files with 0 additions and 90 deletions
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@ -3,5 +3,3 @@
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zephyr_sources(soc.c soc_gpio.c)
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zephyr_sources_ifdef(CONFIG_SYS_POWER_MANAGEMENT soc_power.c)
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zephyr_sources_ifdef(CONFIG_ARM_MPU arm_mpu_regions.c)
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@ -1,55 +0,0 @@
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/*
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* Copyright (c) 2017 Linaro Limited.
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* Copyright (c) 2019 Christian Taedcke <hacking@taedcke.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef _ARM_MPU_MEM_CFG_H_
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#define _ARM_MPU_MEM_CFG_H_
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#include <soc.h>
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#include <arch/arm/cortex_m/mpu/arm_mpu.h>
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/* Flash Region Definitions */
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#if CONFIG_FLASH_SIZE == 64
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#define REGION_FLASH_SIZE REGION_64K
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#elif CONFIG_FLASH_SIZE == 128
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#define REGION_FLASH_SIZE REGION_128K
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#elif CONFIG_FLASH_SIZE == 256
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#define REGION_FLASH_SIZE REGION_256K
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#elif CONFIG_FLASH_SIZE == 512
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#define REGION_FLASH_SIZE REGION_512K
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#elif CONFIG_FLASH_SIZE == 1024
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#define REGION_FLASH_SIZE REGION_1M
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#elif CONFIG_FLASH_SIZE == 2048
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#define REGION_FLASH_SIZE REGION_2M
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#else
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#error "Unsupported configuration"
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#endif
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/* SRAM Region Definitions */
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#if CONFIG_SRAM_SIZE == 16
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#define REGION_SRAM_0_SIZE REGION_16K
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#elif CONFIG_SRAM_SIZE == 32
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#define REGION_SRAM_0_SIZE REGION_32K
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#elif CONFIG_SRAM_SIZE == 64
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#define REGION_SRAM_0_SIZE REGION_64K
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#elif CONFIG_SRAM_SIZE == 128
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#define REGION_SRAM_0_SIZE REGION_128K
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#elif CONFIG_SRAM_SIZE == 192
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#define REGION_SRAM_0_SIZE REGION_128K
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#define REGION_SRAM_1_START 0x20000
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#define REGION_SRAM_1_SIZE REGION_64K
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#elif CONFIG_SRAM_SIZE == 256
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#define REGION_SRAM_0_SIZE REGION_256K
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#elif CONFIG_SRAM_SIZE == 384
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#define REGION_SRAM_0_SIZE REGION_256K
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#define REGION_SRAM_1_START 0x40000
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#define REGION_SRAM_1_SIZE REGION_128K
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#elif CONFIG_SRAM_SIZE == 512
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#define REGION_SRAM_0_SIZE REGION_512K
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#else
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#error "Unsupported configuration"
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#endif
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#endif /* _ARM_MPU_MEM_CFG_H_ */
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@ -1,33 +0,0 @@
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/*
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* Copyright (c) 2017 Linaro Limited.
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* Copyright (c) 2019 Christian Taedcke <hacking@taedcke.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <soc.h>
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#include <arch/arm/cortex_m/mpu/arm_mpu.h>
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#include "arm_mpu_mem_cfg.h"
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static const struct arm_mpu_region mpu_regions[] = {
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/* Region 0 */
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MPU_REGION_ENTRY("FLASH_0",
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CONFIG_FLASH_BASE_ADDRESS,
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REGION_FLASH_ATTR(REGION_FLASH_SIZE)),
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/* Region 1 */
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MPU_REGION_ENTRY("RAM_0",
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CONFIG_SRAM_BASE_ADDRESS,
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REGION_RAM_ATTR(REGION_SRAM_0_SIZE)),
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/* Region 2 */
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#ifdef REGION_SRAM_1_SIZE
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MPU_REGION_ENTRY("RAM_1",
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(CONFIG_SRAM_BASE_ADDRESS + REGION_SRAM_1_START),
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REGION_RAM_ATTR(REGION_SRAM_1_SIZE)),
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#endif
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};
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const struct arm_mpu_config mpu_config = {
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.num_regions = ARRAY_SIZE(mpu_regions),
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.mpu_regions = mpu_regions,
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};
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