From c9849c1d24c9432c884da7ebdca9f4d39019151d Mon Sep 17 00:00:00 2001
From: Marek Matej <marek.matej@espressif.com>
Date: Mon, 10 Feb 2025 14:52:45 +0100
Subject: [PATCH] dts: esp32s3: add cache node to common dtsi

Create the cache memory node instead of hardcoding addresses.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
---
 dts/xtensa/espressif/esp32s3/esp32s3_common.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/dts/xtensa/espressif/esp32s3/esp32s3_common.dtsi b/dts/xtensa/espressif/esp32s3/esp32s3_common.dtsi
index 0b16336bf5c..95c935a1de6 100644
--- a/dts/xtensa/espressif/esp32s3/esp32s3_common.dtsi
+++ b/dts/xtensa/espressif/esp32s3/esp32s3_common.dtsi
@@ -86,6 +86,18 @@
 		compatible = "simple-bus";
 		ranges;
 
+		icache0: memory@42000000 {
+			compatible = "zephyr,memory-region";
+			reg = <0x42000000 DT_SIZE_M(32)>;
+			zephyr,memory-region = "ICACHE";
+		};
+
+		dcache0: memory@3c000000 {
+			compatible = "zephyr,memory-region";
+			reg = <0x3c000000 DT_SIZE_M(32)>;
+			zephyr,memory-region = "DCACHE";
+		};
+
 		sram0: memory@40370000 {
 			compatible = "zephyr,memory-region", "mmio-sram";
 			reg = <0x40370000 DT_SIZE_K(32)>;