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drivers: timer: Machine timer driver enablement for NIOSV

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Update machine timer drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on NIOSV devicetree.

Signed-off-by: Khor Swee Aun <swee.aun.khor@intel.com>
This commit is contained in:
Khor Swee Aun 2023-02-03 15:13:53 +08:00 • committed by Anas Nashif
commit c93c853cba
3 changed files with 15 additions and 7 deletions
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5
drivers/timer/Kconfig.riscv_machine
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@ -1,6 +1,6 @@
# Copyright (c) 2014-2015 Wind River Systems, Inc. # Copyright (c) 2014-2015 Wind River Systems, Inc.
# Copyright (c) 2016 Cadence Design Systems, Inc. # Copyright (c) 2016 Cadence Design Systems, Inc.
# Copyright (c) 2019 Intel Corp. # Copyright (c) 2019-2023 Intel Corp.
# SPDX-License-Identifier: Apache-2.0 # SPDX-License-Identifier: Apache-2.0
config RISCV_MACHINE_TIMER config RISCV_MACHINE_TIMER
@ -11,7 +11,8 @@ config RISCV_MACHINE_TIMER
DT_HAS_NUCLEI_SYSTIMER_ENABLED || \ DT_HAS_NUCLEI_SYSTIMER_ENABLED || \
DT_HAS_SIFIVE_CLINT0_ENABLED || \ DT_HAS_SIFIVE_CLINT0_ENABLED || \
DT_HAS_TELINK_MACHINE_TIMER_ENABLED || \ DT_HAS_TELINK_MACHINE_TIMER_ENABLED || \
DT_HAS_LOWRISC_MACHINE_TIMER_ENABLED DT_HAS_LOWRISC_MACHINE_TIMER_ENABLED || \
DT_HAS_NIOSV_MACHINE_TIMER_ENABLED
select TICKLESS_CAPABLE select TICKLESS_CAPABLE
select TIMER_HAS_64BIT_CYCLE_COUNTER select TIMER_HAS_64BIT_CYCLE_COUNTER
help help

9
drivers/timer/riscv_machine_timer.c
View file

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2018 Intel Corporation * Copyright (c) 2018-2023 Intel Corporation
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@ -55,6 +55,13 @@
#define MTIME_REG (DT_INST_REG_ADDR(0) + 0x110) #define MTIME_REG (DT_INST_REG_ADDR(0) + 0x110)
#define MTIMECMP_REG (DT_INST_REG_ADDR(0) + 0x118) #define MTIMECMP_REG (DT_INST_REG_ADDR(0) + 0x118)
#define TIMER_IRQN DT_INST_IRQN(0) #define TIMER_IRQN DT_INST_IRQN(0)
/* niosv-machine-timer */
#elif DT_HAS_COMPAT_STATUS_OKAY(niosv_machine_timer)
#define DT_DRV_COMPAT niosv_machine_timer
#define MTIMECMP_REG DT_INST_REG_ADDR(0)
#define MTIME_REG (DT_INST_REG_ADDR(0) + 8)
#define TIMER_IRQN DT_INST_IRQN(0)
#endif #endif
#define CYC_PER_TICK ((uint32_t)((uint64_t) (sys_clock_hw_cycles_per_sec() \ #define CYC_PER_TICK ((uint32_t)((uint64_t) (sys_clock_hw_cycles_per_sec() \