boards: st: Add support for STM32H745I-Disco
Supported features: - GPIO - RTC - PWM - Ethernet - UART - FMC - QSPI NOR Flash Signed-off-by: Tomáš Juřena <jurenatomas@gmail.com>
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23
boards/st/stm32h745i_disco/Kconfig.defconfig
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boards/st/stm32h745i_disco/Kconfig.defconfig
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# STM32H745XI DISCOVERY board configuration
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# Copyright (c) 2020 Alexander Kozhinov <AlexanderKozhinov@yandex.com>
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# Copyright (c) 2024 Tomas Jurena <jurena@utb.cz>
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_STM32H745I_DISCO
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if NETWORKING
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config NET_L2_ETHERNET
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default y
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config ETH_STM32_HAL_MII
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default y
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endif # NETWORKING
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config MEMC
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default y if DISPLAY
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endif # BOARD_STM32H745I_DISCO
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boards/st/stm32h745i_disco/Kconfig.stm32h745i_disco
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boards/st/stm32h745i_disco/Kconfig.stm32h745i_disco
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# STM32H745XI DISCOVERY board configuration
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# Copyright (c) 2020 Alexander Kozhinov <AlexanderKozhinov@yandex.com>
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# Copyright (c) 2024 Tomas Jurena <jurena@utb.cz>
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_STM32H745I_DISCO
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select SOC_STM32H745XX_M7 if BOARD_STM32H745I_DISCO_STM32H745XX_M7
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select SOC_STM32H745XX_M4 if BOARD_STM32H745I_DISCO_STM32H745XX_M4
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42
boards/st/stm32h745i_disco/arduino_r3_connector.dtsi
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boards/st/stm32h745i_disco/arduino_r3_connector.dtsi
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/*
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* Copyright (c) 2020 Alexander Kozhinov <AlexanderKozhinov@yandex.com>
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* Copyright (c) 2024 Tomas Jurena <jurena@utb.cz>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/ {
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arduino_header: connector {
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compatible = "arduino-header-r3";
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#gpio-cells = <2>;
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gpio-map-mask = <0xffffffff 0xffffffc0>;
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gpio-map-pass-thru = <0 0x3f>;
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gpio-map = <0 0 &gpioc 0 0>, /* A0 */
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<1 0 &gpiof 8 0>, /* A1 */
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<2 0 &gpioa 0 0>, /* A2 */
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<3 0 &gpioa 1 0>, /* A3 */
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<4 0 &gpioc 2 0>, /* A4 */
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<5 0 &gpioc 3 0>, /* A5 */
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<6 0 &gpiob 7 0>, /* D0 */
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<7 0 &gpiob 6 0>, /* D1 */
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<8 0 &gpiog 3 0>, /* D2 */
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<9 0 &gpioa 6 0>, /* D3 */
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<10 0 &gpiok 1 0>, /* D4 */
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<11 0 &gpioa 8 0>, /* D5 */
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<12 0 &gpioe 6 0>, /* D6 */
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<13 0 &gpioi 6 0>, /* D7 */
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<14 0 &gpioe 3 0>, /* D8 */
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<15 0 &gpioh 15 0>, /* D9 */
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<16 0 &gpiob 4 0>, /* D10 */
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<17 0 &gpiob 15 0>, /* D11 */
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<18 0 &gpioi 2 0>, /* D12 */
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<19 0 &gpiod 3 0>, /* D13 */
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<20 0 &gpiod 13 0>, /* D14 */
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<21 0 &gpiod 12 0>; /* D15 */
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};
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};
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arduino_i2c: &i2c1 {};
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arduino_serial: &usart1 {};
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boards/st/stm32h745i_disco/board.cmake
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boards/st/stm32h745i_disco/board.cmake
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# SPDX-License-Identifier: Apache-2.0
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# Copyright (c) 2020 Alexander Kozhinov <AlexanderKozhinov@yandex.com>
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# Copyright (c) 2024 Tomas Jurena <jurena@utb.cz>
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board_runner_args(jlink "--device=STM32H745XI" "--speed=4000")
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if(CONFIG_BOARD_STM32H745I_DISCO_STM32H745XX_M7)
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board_runner_args(openocd --target-handle=_CHIPNAME.cpu0)
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elseif(CONFIG_BOARD_STM32H745I_DISCO_STM32H745XX_M4)
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board_runner_args(openocd --target-handle=_CHIPNAME.cpu1)
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endif()
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board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
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include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
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5
boards/st/stm32h745i_disco/board.yml
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boards/st/stm32h745i_disco/board.yml
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board:
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name: stm32h745i_disco
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vendor: st
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socs:
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- name: stm32h745xx
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BIN
boards/st/stm32h745i_disco/doc/img/stm32h745i-disco.jpg
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BIN
boards/st/stm32h745i_disco/doc/img/stm32h745i-disco.jpg
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272
boards/st/stm32h745i_disco/doc/index.rst
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boards/st/stm32h745i_disco/doc/index.rst
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.. _stm32h745i_disco_board:
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ST STM32H745I Discovery
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#######################
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Overview
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********
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The STM32H745I-DISCO Discovery kit is a complete demonstration and development
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platform for STMicroelectronics Arm |reg| Cortex |reg|‑M7 and Cortex |reg|‑M4 core-based STM32H745XI microcontroller.
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The full range of hardware features available on the board helps users enhance their application
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development by an evaluation of almost all peripherals (such as USB OTG FS, Ethernet 10/100Mb/s,
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eMMC, USART, SAI audio DAC stereo with audio jack input and output, MEMS digital microphone, SDRAM,
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Quad-SPI flash memory, and RGB interface LCD with capacitive multi-touch panel). ARDUINO |reg| Uno V3
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connectors provide easy connection to extension shields or daughterboards for specific applications.
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STLINK-V3E is integrated into the board, as an embedded in-circuit debugger and programmer for the
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STM32 MCU and the USB Virtual COM port bridge
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Key Features
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- Arm |reg| Cortex |reg| core-based microcontroller with 2 Mbytes of flash memory and 1 Mbyte of RAM, in a TFBGA240+25 package
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- 4.3” RGB interface LCD with touch panel connector
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- Ethernet compliant with IEEE-802.3-2002, and PoE
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- USB OTG FS
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- SAI audio codec
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- One ST-MEMS digital microphone
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- 2× 512-Mbit Quad-SPI NOR flash memory
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- 128-Mbit SDRAM
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- 4-Gbyte on-board eMMC
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- 1 user and reset push-button
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- Fanout daughterboard
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- 2× CAN FDs
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- Board connectors:
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- USB FS Micro-AB connectors
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- ST-LINK Micro-B USB connector
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- USB power Micro-B connector
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- Ethernet RJ45
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- Stereo headset jack including analog microphone input
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- Audio header for external speakers
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- Tag‑Connect |trade| (TAG) 10-pin footprint
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- Arm |reg| Cortex |reg| 10-pin 1.27 mm pitch debug connector over STDC14 footprint
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- ARDUINO |reg| Uno V3 expansion connectors
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- STMod+
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- Flexible power-supply options:
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- STLINK-V3E USB connector, USB FS connector
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- 5 V delivered by RJ45 (Power over Ethernet)
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- 5 V delivered by ARDUINO |reg| or external connector
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- USB charger
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- USB power
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.. image:: img/stm32h745i-disco.jpg
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:align: center
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:alt: STM32H745I-DISCO
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More information about the board can be found at the `STM32H745I-DISCO website`_.
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More information about STM32H747XIH6 can be found here:
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- `STM32H745XI on www.st.com`_
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- `STM32H745xx reference manual`_
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- `STM32H745xx datasheet`_
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Supported Features
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==================
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The current Zephyr stm32h745i_disco board configuration supports the following hardware features:
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+-----------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+===========+============+=====================================+
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| NVIC | on-chip | nested vector interrupt controller |
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+-----------+------------+-------------------------------------+
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| UART | on-chip | serial port |
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+-----------+------------+-------------------------------------+
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| PINMUX | on-chip | pinmux |
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+-----------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+-----------+------------+-------------------------------------+
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| RTC | on-chip | counter |
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+-----------+------------+-------------------------------------+
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| I2C | on-chip | i2c |
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+-----------+------------+-------------------------------------+
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| PWM | on-chip | pwm |
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+-----------+------------+-------------------------------------+
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| ETHERNET | on-chip | ethernet |
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+-----------+------------+-------------------------------------+
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| SPI | on-chip | spi |
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+-----------+------------+-------------------------------------+
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| QSPI NOR | on-chip | off-chip flash |
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+-----------+------------+-------------------------------------+
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| FDCAN | on-chip | fdcan |
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+-----------+------------+-------------------------------------+
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| FMC | on-chip | memc (SDRAM) |
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+-----------+------------+-------------------------------------+
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| RTC | on-chip | rtc |
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+-----------+------------+-------------------------------------+
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Other hardware features are not yet supported on this Zephyr port.
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The default configuration per core can be found in the defconfig files:
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:zephyr_file:`boards/st/stm32h745i_disco/stm32h745i_disco_stm32h745xx_m7_defconfig`` and
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:zephyr_file:`boards/st/stm32h745i_disco/stm32h745i_disco_stm32h745xx_m4_defconfig`
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For more details please refer to `STM32H745-Disco UM`_.
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Default Zephyr Peripheral Mapping:
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----------------------------------
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- USART_3 TX/RX : PB10/PB11 (ST-Link Virtual Port Com)
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- USART_1 TX/RX : PB6/PB7 (Arduino Serial)
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- SPI_2 NSS/SCK/MISO/MOSI : PB4/PD3/PI2/PB15 (Arduino SPI)
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- I2C_4 SCL/SDA: PD12, PD13 (Arduino I2C)
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- USER_PB : PC13
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- LD1 : PI13
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- LD2 : PJ2
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- LD3 : PD3
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System Clock
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------------
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STM32H745I-DISCO System Clock could be driven by an internal or external
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oscillator, as well as the main PLL clock. By default, the System clock is
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driven by the PLL clock at 480MHz, driven by an 25MHz high-speed external clock.
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Serial Port
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-----------
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STM32H745I-DISCO board has 4 UARTs and 4 USARTs. The Zephyr console output is
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assigned to UART3. Default settings are 115200 8N1.
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Resources sharing
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-----------------
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The dual core nature of STM32H745 SoC requires sharing HW resources between the
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two cores. This is done in 3 ways:
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- **Compilation**: Clock configuration is only accessible to M7 core. M4 core only
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has access to bus clock activation and deactivation.
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- **Static pre-compilation assignment**: Peripherals such as a UART are assigned in
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devicetree before compilation. The user must ensure peripherals are not assigned
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to both cores at the same time.
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- **Run time protection**: Interrupt-controller and GPIO configurations could be
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accessed by both cores at run time. Accesses are protected by a hardware semaphore
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to avoid potential concurrent access issues.
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Programming and Debugging
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*************************
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Applications for the ``stm32h745i_disco`` board should be built per core target,
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using either ``stm32h745i_disco/stm32h745xx/m7`` or ``stm32h745i_disco/stm32h745xx/m4`` as the target
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(see :ref:`build_an_application` and :ref:`application_run` for more details).
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.. note::
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Check if the on-board ST-LINK V3 has the latest firmware version. It can be done with either `STM32CubeIDE`_ or `STM32CubeProgrammer`_
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Flashing
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========
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STM32H745I-DISCO board includes an ST-LINK/V3 embedded debug tool interface.
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Flashing operation will depend on the target and the SoC
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option bytes configuration.
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By default:
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- CPU0 (Cortex-M7) boot address is set to 0x80000000 (OB: BOOT_CM7_ADD0)
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- CPU1 (Cortex-M4) boot address is set to 0x81000000 (OB: BOOT_CM4_ADD0)
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Also, the out of the box default board configuration enables CM7 and CM4 boot when
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board is powered (Option bytes BCM7 and BCM4 are checked).
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In that configuration, Kconfig boot option ``STM32H7_BOOT_CM4_CM7`` should be selected.
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Zephyr flash configuration has been set to meet these default settings.
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Alternatively, west `STM32CubeProgrammer`_ runner can be used, after installing
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it, to flash applications for both cores. The target core is detected automatically.
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.. code-block:: console
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$ west flash --runner stm32cubeprogrammer
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Flashing an application to STM32H745XI M7 Core
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----------------------------------------------
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First, connect the STM32H745I-DISCO to your host computer using
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the USB port to prepare it for flashing. Then build and flash your application.
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Here is an example for the :ref:`hello_world` application.
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Run a serial host program to connect with your STM32H745I-DISCO board.
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.. code-block:: console
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$ minicom -b 115200 -D /dev/ttyACM0
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or use screen:
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.. code-block:: console
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$ screen /dev/ttyACM0 115200
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Build and flash the application:
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: stm32h745i_disco/stm32h745xx/m7
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:goals: build flash
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You should see the following message on the console:
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.. code-block:: console
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$ Hello World! stm32h745i_disco
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.. note::
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Sometimes, flashing does not work properly. It is necessary to erase the flash
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(with STM32CubeProgrammer for example) to make it work again.
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Similarly, you can build and flash samples on the M4 target. For this, please
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take care of the resource sharing (UART port used for console for instance).
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Here is an example for the :zephyr:code-sample:`blinky` application on M4 core.
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.. zephyr-app-commands::
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:zephyr-app: samples/basic/blinky
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:board: stm32h745i_disco/stm32h745xx/m7
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:goals: build flash
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.. note::
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Flashing both M4 and M7 and pushing RESTART button on the board leads
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to LD1 and LD2 flashing simultaneously.
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Debugging
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=========
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You can debug an application in the usual way. Here is an example for the
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:ref:`hello_world` application.
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
|
||||||
|
:board: stm32h745i_disco/stm32h745xx/m7
|
||||||
|
:maybe-skip-config:
|
||||||
|
:goals: debug
|
||||||
|
|
||||||
|
Debugging with west is currently not available on Cortex M4 side.
|
||||||
|
In order to debug a Zephyr application on Cortex M4 side, you can use
|
||||||
|
`STM32CubeIDE`_.
|
||||||
|
|
||||||
|
.. _STM32H745I-DISCO website:
|
||||||
|
https://www.st.com/en/evaluation-tools/stm32h745i-disco.html
|
||||||
|
|
||||||
|
.. _STM32H745XI on www.st.com:
|
||||||
|
https://www.st.com/en/microcontrollers-microprocessors/stm32h745xi.html
|
||||||
|
|
||||||
|
.. _STM32H745xx reference manual:
|
||||||
|
https://www.st.com/resource/en/reference_manual/rm0399-stm32h745755-and-stm32h747757-advanced-armbased-32bit-mcus-stmicroelectronics.pdf
|
||||||
|
|
||||||
|
.. _STM32H745xx datasheet:
|
||||||
|
https://www.st.com/resource/en/datasheet/stm32h745xi.pdf
|
||||||
|
|
||||||
|
.. _STM32H745-Disco UM:
|
||||||
|
https://www.st.com/resource/en/user_manual/um2488-discovery-kits-with-stm32h745xi-and-stm32h750xb-mcus-stmicroelectronics.pdf
|
||||||
|
|
||||||
|
.. _STM32CubeProgrammer:
|
||||||
|
https://www.st.com/en/development-tools/stm32cubeprog.html
|
||||||
|
|
||||||
|
.. _STM32CubeIDE:
|
||||||
|
https://www.st.com/en/development-tools/stm32cubeide.html
|
50
boards/st/stm32h745i_disco/stm32h745i_disco.dtsi
Normal file
50
boards/st/stm32h745i_disco/stm32h745i_disco.dtsi
Normal file
|
@ -0,0 +1,50 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2020 Alexander Kozhinov <AlexanderKozhinov@yandex.com>
|
||||||
|
* Copyright (c) 2024 Tomas Jurena <jurena@utb.cz>
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <st/h7/stm32h745xihx-pinctrl.dtsi>
|
||||||
|
#include "arduino_r3_connector.dtsi"
|
||||||
|
#include <zephyr/dt-bindings/input/input-event-codes.h>
|
||||||
|
|
||||||
|
/ {
|
||||||
|
leds: leds {
|
||||||
|
compatible = "gpio-leds";
|
||||||
|
green_led: led_1 {
|
||||||
|
gpios = <&gpioj 2 GPIO_ACTIVE_HIGH>;
|
||||||
|
label = "User LD7";
|
||||||
|
};
|
||||||
|
red_led: led_2 {
|
||||||
|
gpios = <&gpioi 13 GPIO_ACTIVE_HIGH>;
|
||||||
|
label = "User LD6";
|
||||||
|
};
|
||||||
|
green_led_2: led_3 {
|
||||||
|
gpios = <&gpiod 3 GPIO_ACTIVE_HIGH>;
|
||||||
|
label = "User LD8";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
gpio_keys {
|
||||||
|
compatible = "gpio-keys";
|
||||||
|
user_button: button_0 {
|
||||||
|
gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
|
||||||
|
label = "User SB1";
|
||||||
|
zephyr,code = <INPUT_KEY_0>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&rcc {
|
||||||
|
d1cpre = <1>;
|
||||||
|
hpre = <2>;
|
||||||
|
d1ppre = <2>;
|
||||||
|
d2ppre1 = <2>;
|
||||||
|
d2ppre2 = <2>;
|
||||||
|
d3ppre = <2>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&mailbox {
|
||||||
|
status = "okay";
|
||||||
|
};
|
|
@ -0,0 +1,38 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2020 Alexander Kozhinov <AlexanderKozhinov@yandex.com>
|
||||||
|
* Copyright (c) 2024 Tomas Jurena <jurena@utb.cz>
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
#include <st/h7/stm32h745Xi_m4.dtsi>
|
||||||
|
#include "stm32h745i_disco.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "STMicroelectronics STM32H745I-DISCO board";
|
||||||
|
compatible = "st,stm32h745i-disco";
|
||||||
|
|
||||||
|
/* HW resources belonging to CM4 */
|
||||||
|
chosen {
|
||||||
|
zephyr,console = &usart2;
|
||||||
|
zephyr,shell-uart = &usart2;
|
||||||
|
zephyr,sram = &sram1;
|
||||||
|
zephyr,flash = &flash1;
|
||||||
|
};
|
||||||
|
|
||||||
|
aliases {
|
||||||
|
led0 = &green_led;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&usart2 {
|
||||||
|
pinctrl-0 = <&usart2_tx_pd5 &usart2_rx_pd6>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
current-speed = <115200>;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&rcc {
|
||||||
|
clock-frequency = <DT_FREQ_M(240)>;
|
||||||
|
};
|
|
@ -0,0 +1,17 @@
|
||||||
|
identifier: stm32h745i_disco/stm32h745xx/m4
|
||||||
|
name: STM32H745XI Discovery (M4)
|
||||||
|
type: mcu
|
||||||
|
arch: arm
|
||||||
|
toolchain:
|
||||||
|
- zephyr
|
||||||
|
- gnuarmemb
|
||||||
|
ram: 288
|
||||||
|
flash: 1024
|
||||||
|
supported:
|
||||||
|
- arduino_gpio
|
||||||
|
- gpio
|
||||||
|
testing:
|
||||||
|
ignore_tags:
|
||||||
|
- mpu
|
||||||
|
- nfc
|
||||||
|
vendor: st
|
|
@ -0,0 +1,21 @@
|
||||||
|
# SPDX-License-Identifier: Apache-2.0
|
||||||
|
# Copyright (c) 2020 Alexander Kozhinov <AlexanderKozhinov@yandex.com>
|
||||||
|
# Copyright (c) 2024 Tomas Jurena <jurena@utb.cz>
|
||||||
|
|
||||||
|
# Enable GPIO
|
||||||
|
CONFIG_GPIO=y
|
||||||
|
|
||||||
|
# Enable clock
|
||||||
|
CONFIG_CLOCK_CONTROL=y
|
||||||
|
|
||||||
|
# By default SERIAL peripherals are assigned to m7
|
||||||
|
|
||||||
|
# Enable uart driver
|
||||||
|
#CONFIG_SERIAL=y
|
||||||
|
|
||||||
|
# Console
|
||||||
|
#CONFIG_CONSOLE=y
|
||||||
|
#CONFIG_UART_CONSOLE=y
|
||||||
|
|
||||||
|
# enable pin controller
|
||||||
|
CONFIG_PINCTRL=y
|
269
boards/st/stm32h745i_disco/stm32h745i_disco_stm32h745xx_m7.dts
Normal file
269
boards/st/stm32h745i_disco/stm32h745i_disco_stm32h745xx_m7.dts
Normal file
|
@ -0,0 +1,269 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2020 Alexander Kozhinov <AlexanderKozhinov@yandex.com>
|
||||||
|
* Copyright (c) 2024 Tomas Jurena <jurena@utb.cz>
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
#include <st/h7/stm32h745Xi_m7.dtsi>
|
||||||
|
#include "stm32h745i_disco.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "STMicroelectronics STM32H745I-DISCO board";
|
||||||
|
compatible = "st,stm32h745i-disco";
|
||||||
|
|
||||||
|
/* HW resources belonging to CM7 */
|
||||||
|
chosen {
|
||||||
|
zephyr,console = &usart3;
|
||||||
|
zephyr,shell-uart = &usart3;
|
||||||
|
zephyr,dtcm = &dtcm;
|
||||||
|
zephyr,sram = &sram0;
|
||||||
|
zephyr,flash = &flash0;
|
||||||
|
zephyr,flash-controller = &mt25ql512ab1;
|
||||||
|
zephyr,canbus = &fdcan1;
|
||||||
|
};
|
||||||
|
|
||||||
|
pwmleds {
|
||||||
|
compatible = "pwm-leds";
|
||||||
|
|
||||||
|
green_pwm_led: green_pwm_led {
|
||||||
|
pwms = <&pwm11 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
|
||||||
|
label = "User LD8 - PWM11";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
transceiver0: can-phy0 {
|
||||||
|
compatible = "microchip,mcp2562fd", "can-transceiver-gpio";
|
||||||
|
max-bitrate = <5000000>;
|
||||||
|
#phy-cells = <0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
transceiver1: can-phy1 {
|
||||||
|
compatible = "microchip,mcp2562fd", "can-transceiver-gpio";
|
||||||
|
max-bitrate = <5000000>;
|
||||||
|
#phy-cells = <0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
/* RM0455 - 23.6 External device address mapping */
|
||||||
|
sdram2: sdram@d0000000 {
|
||||||
|
compatible = "zephyr,memory-region", "mmio-sram";
|
||||||
|
device_type = "memory";
|
||||||
|
reg = <0xd0000000 DT_SIZE_M(16)>; /* 128Mbit */
|
||||||
|
zephyr,memory-region = "SDRAM2";
|
||||||
|
zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
|
||||||
|
};
|
||||||
|
|
||||||
|
aliases {
|
||||||
|
led0 = &green_led;
|
||||||
|
pwm-led0 = &green_pwm_led;
|
||||||
|
sw0 = &user_button;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&clk_lsi {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&clk_hsi48 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&clk_hse {
|
||||||
|
clock-frequency = <DT_FREQ_M(25)>; /* X1: 25MHz */
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&pll {
|
||||||
|
div-m = <5>;
|
||||||
|
mul-n = <192>;
|
||||||
|
div-p = <2>;
|
||||||
|
div-q = <15>;
|
||||||
|
div-r = <4>;
|
||||||
|
clocks = <&clk_hse>;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&rcc {
|
||||||
|
clocks = <&pll>;
|
||||||
|
clock-frequency = <DT_FREQ_M(480)>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&usart1 {
|
||||||
|
pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
current-speed = <57600>;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&usart3 {
|
||||||
|
pinctrl-0 = <&usart3_tx_pb10 &usart3_rx_pb11>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
current-speed = <115200>;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&rtc {
|
||||||
|
clocks = <&rcc STM32_CLOCK_BUS_APB4 0x00010000>,
|
||||||
|
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&timers1 {
|
||||||
|
st,prescaler = <10000>;
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
pwm11: pwm {
|
||||||
|
status = "okay";
|
||||||
|
pinctrl-0 = <&tim1_ch1_pa8>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&mac {
|
||||||
|
status = "okay";
|
||||||
|
/* MII */
|
||||||
|
pinctrl-0 = <ð_ref_clk_pa1
|
||||||
|
ð_crs_dv_pa7
|
||||||
|
ð_rxd2_pb0
|
||||||
|
ð_rxd3_pb1
|
||||||
|
ð_txd2_pc2
|
||||||
|
ð_tx_clk_pc3
|
||||||
|
ð_rxd0_pc4
|
||||||
|
ð_rxd1_pc5
|
||||||
|
ð_txd3_pe2
|
||||||
|
ð_tx_en_pg11
|
||||||
|
ð_txd1_pg12
|
||||||
|
ð_txd0_pg13
|
||||||
|
ð_rx_er_pi10>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
};
|
||||||
|
|
||||||
|
&mdio {
|
||||||
|
status = "okay";
|
||||||
|
pinctrl-0 = <ð_mdio_pa2 ð_mdc_pc1>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
|
||||||
|
ethernet-phy@0 {
|
||||||
|
compatible = "ethernet-phy";
|
||||||
|
reg = <0x00>;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&rng {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&quadspi {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <
|
||||||
|
&quadspi_bk1_io0_pd11
|
||||||
|
&quadspi_bk1_io3_pf6
|
||||||
|
&quadspi_bk1_io2_pf7
|
||||||
|
&quadspi_bk1_io1_pf9
|
||||||
|
&quadspi_clk_pf10
|
||||||
|
&quadspi_bk1_ncs_pg6
|
||||||
|
&quadspi_bk2_io2_pg9
|
||||||
|
&quadspi_bk2_io3_pg14
|
||||||
|
&quadspi_bk2_io0_ph2
|
||||||
|
&quadspi_bk2_io1_ph3
|
||||||
|
>;
|
||||||
|
flash-id = <1>;
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
mt25ql512ab1: qspi-nor-flash-1@90000000 {
|
||||||
|
compatible = "st,stm32-qspi-nor";
|
||||||
|
reg = <0x90000000 DT_SIZE_M(64)>; /* 512 Mbits */
|
||||||
|
qspi-max-frequency = <72000000>;
|
||||||
|
spi-bus-width = <4>;
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
partitions {
|
||||||
|
compatible = "fixed-partitions";
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
|
||||||
|
storage_partition: partition@0 {
|
||||||
|
reg = <0x0 DT_SIZE_M(64)>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
mt25ql512ab2: qspi-nor-flash-2@90000000 {
|
||||||
|
compatible = "st,stm32-qspi-nor";
|
||||||
|
reg = <0x90000000 DT_SIZE_M(64)>; /* 512 Mbits */
|
||||||
|
qspi-max-frequency = <72000000>;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c4 {
|
||||||
|
status = "okay";
|
||||||
|
pinctrl-0 = <&i2c4_scl_pd12 &i2c4_sda_pd13>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
};
|
||||||
|
|
||||||
|
&spi2 {
|
||||||
|
status = "okay";
|
||||||
|
pinctrl-0 = <&spi2_nss_pb4 &spi2_mosi_pb15 &spi2_miso_pi2 &spi2_sck_pd3>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
};
|
||||||
|
|
||||||
|
&fdcan1 {
|
||||||
|
status = "okay";
|
||||||
|
pinctrl-0 = <&fdcan1_tx_ph13 &fdcan1_rx_ph14>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
bus-speed = <125000>;
|
||||||
|
bus-speed-data = <1000000>;
|
||||||
|
sample-point = <875>;
|
||||||
|
sample-point-data = <875>;
|
||||||
|
phys = <&transceiver0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&fdcan2 {
|
||||||
|
status = "okay";
|
||||||
|
pinctrl-0 = <&fdcan2_tx_pb13 &fdcan2_rx_pb5>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
bus-speed = <125000>;
|
||||||
|
bus-speed-data = <1000000>;
|
||||||
|
sample-point = <875>;
|
||||||
|
sample-point-data = <875>;
|
||||||
|
phys = <&transceiver1>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&fmc {
|
||||||
|
pinctrl-0 = <&fmc_nbl0_pe0 &fmc_nbl1_pe1
|
||||||
|
&fmc_sdclk_pg8 &fmc_sdnwe_ph5 &fmc_sdcke1_ph7
|
||||||
|
&fmc_sdne1_ph6 &fmc_sdnras_pf11 &fmc_sdncas_pg15
|
||||||
|
&fmc_a0_pf0 &fmc_a1_pf1 &fmc_a2_pf2 &fmc_a3_pf3 &fmc_a4_pf4
|
||||||
|
&fmc_a5_pf5 &fmc_a6_pf12 &fmc_a7_pf13 &fmc_a8_pf14
|
||||||
|
&fmc_a9_pf15 &fmc_a10_pg0 &fmc_a11_pg1
|
||||||
|
&fmc_a14_pg4 &fmc_a15_pg5 &fmc_d0_pd14 &fmc_d1_pd15
|
||||||
|
&fmc_d2_pd0 &fmc_d3_pd1 &fmc_d4_pe7 &fmc_d5_pe8 &fmc_d6_pe9
|
||||||
|
&fmc_d7_pe10 &fmc_d8_pe11 &fmc_d9_pe12 &fmc_d10_pe13
|
||||||
|
&fmc_d11_pe14 &fmc_d12_pe15 &fmc_d13_pd8 &fmc_d14_pd9
|
||||||
|
&fmc_d15_pd10>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
sdram {
|
||||||
|
status = "okay";
|
||||||
|
power-up-delay = <100>;
|
||||||
|
num-auto-refresh = <8>;
|
||||||
|
mode-register = <0x220>;
|
||||||
|
refresh-rate = <0x603>;
|
||||||
|
bank@1 {
|
||||||
|
reg = <1>;
|
||||||
|
st,sdram-control = <STM32_FMC_SDRAM_NC_8
|
||||||
|
STM32_FMC_SDRAM_NR_12
|
||||||
|
STM32_FMC_SDRAM_MWID_16
|
||||||
|
STM32_FMC_SDRAM_NB_4
|
||||||
|
STM32_FMC_SDRAM_CAS_2
|
||||||
|
STM32_FMC_SDRAM_SDCLK_PERIOD_2
|
||||||
|
STM32_FMC_SDRAM_RBURST_ENABLE
|
||||||
|
STM32_FMC_SDRAM_RPIPE_0>;
|
||||||
|
st,sdram-timing = <2 7 4 7 2 2 2>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
|
@ -0,0 +1,23 @@
|
||||||
|
identifier: stm32h745i_disco/stm32h745xx/m7
|
||||||
|
name: STM32H745XI Discovery (M7)
|
||||||
|
type: mcu
|
||||||
|
arch: arm
|
||||||
|
toolchain:
|
||||||
|
- zephyr
|
||||||
|
- gnuarmemb
|
||||||
|
ram: 512
|
||||||
|
flash: 1024
|
||||||
|
supported:
|
||||||
|
- arduino_gpio
|
||||||
|
- arduino_i2c
|
||||||
|
- uart
|
||||||
|
- gpio
|
||||||
|
- counter
|
||||||
|
- i2c
|
||||||
|
- pwm
|
||||||
|
- netif:eth
|
||||||
|
- qspi
|
||||||
|
- memc
|
||||||
|
- spi
|
||||||
|
- rtc
|
||||||
|
vendor: st
|
|
@ -0,0 +1,28 @@
|
||||||
|
# SPDX-License-Identifier: Apache-2.0
|
||||||
|
# Copyright (c) 2020 Alexander Kozhinov <AlexanderKozhinov@yandex.com>
|
||||||
|
# Copyright (c) 2024 Tomas Jurena <jurena@utb.cz>
|
||||||
|
|
||||||
|
# Enable the internal SMPS regulator
|
||||||
|
CONFIG_POWER_SUPPLY_DIRECT_SMPS=y
|
||||||
|
|
||||||
|
# Enable MPU
|
||||||
|
CONFIG_ARM_MPU=y
|
||||||
|
|
||||||
|
# Enable HW stack protection
|
||||||
|
CONFIG_HW_STACK_PROTECTION=y
|
||||||
|
|
||||||
|
# Enable UART ( disable to assign to M4 core)
|
||||||
|
CONFIG_SERIAL=y
|
||||||
|
|
||||||
|
# Console ( disable to assign to M4 core)
|
||||||
|
CONFIG_CONSOLE=y
|
||||||
|
CONFIG_UART_CONSOLE=y
|
||||||
|
|
||||||
|
# Enable GPIO
|
||||||
|
CONFIG_GPIO=y
|
||||||
|
|
||||||
|
# Enable Clock
|
||||||
|
CONFIG_CLOCK_CONTROL=y
|
||||||
|
|
||||||
|
# enable pin controller
|
||||||
|
CONFIG_PINCTRL=y
|
30
boards/st/stm32h745i_disco/support/openocd.cfg
Normal file
30
boards/st/stm32h745i_disco/support/openocd.cfg
Normal file
|
@ -0,0 +1,30 @@
|
||||||
|
# STM32H745XI DISCOVERY board OpenOCD ST-LINK V3 configuration
|
||||||
|
#
|
||||||
|
# Copyright (c) 2020 Alexander Kozhinov <AlexanderKozhinov@yandex.com>
|
||||||
|
# Copyright (c) 2024 Tomas Jurena <jurena@utb.cz>
|
||||||
|
# SPDX-License-Identifier: Apache-2.0
|
||||||
|
#
|
||||||
|
|
||||||
|
source [find board/stm32h745i-disco.cfg]
|
||||||
|
|
||||||
|
# Use connect_assert_srst here to be able to program
|
||||||
|
# even when core is in sleep mode
|
||||||
|
reset_config srst_only srst_nogate connect_assert_srst
|
||||||
|
|
||||||
|
$_CHIPNAME.cpu0 configure -event gdb-attach {
|
||||||
|
echo "Debugger attaching: halting execution"
|
||||||
|
gdb_breakpoint_override hard
|
||||||
|
}
|
||||||
|
|
||||||
|
$_CHIPNAME.cpu0 configure -event gdb-detach {
|
||||||
|
echo "Debugger detaching: resuming execution"
|
||||||
|
resume
|
||||||
|
}
|
||||||
|
|
||||||
|
# Due to the use of connect_assert_srst, running gdb requires
|
||||||
|
# to reset halt just after openocd init.
|
||||||
|
rename init old_init
|
||||||
|
proc init {} {
|
||||||
|
old_init
|
||||||
|
reset halt
|
||||||
|
}
|
Loading…
Add table
Add a link
Reference in a new issue