boards: st: Add support for STM32H745I-Disco

Supported features:
- GPIO
- RTC
- PWM
- Ethernet
- UART
- FMC
- QSPI NOR Flash

Signed-off-by: Tomáš Juřena <jurenatomas@gmail.com>
This commit is contained in:
Tomáš Juřena 2024-05-09 12:38:00 +02:00 committed by Alberto Escolar
commit c8faa1e380
15 changed files with 842 additions and 0 deletions

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# STM32H745XI DISCOVERY board configuration
# Copyright (c) 2020 Alexander Kozhinov <AlexanderKozhinov@yandex.com>
# Copyright (c) 2024 Tomas Jurena <jurena@utb.cz>
# SPDX-License-Identifier: Apache-2.0
if BOARD_STM32H745I_DISCO
if NETWORKING
config NET_L2_ETHERNET
default y
config ETH_STM32_HAL_MII
default y
endif # NETWORKING
config MEMC
default y if DISPLAY
endif # BOARD_STM32H745I_DISCO

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# STM32H745XI DISCOVERY board configuration
# Copyright (c) 2020 Alexander Kozhinov <AlexanderKozhinov@yandex.com>
# Copyright (c) 2024 Tomas Jurena <jurena@utb.cz>
# SPDX-License-Identifier: Apache-2.0
config BOARD_STM32H745I_DISCO
select SOC_STM32H745XX_M7 if BOARD_STM32H745I_DISCO_STM32H745XX_M7
select SOC_STM32H745XX_M4 if BOARD_STM32H745I_DISCO_STM32H745XX_M4

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/*
* Copyright (c) 2020 Alexander Kozhinov <AlexanderKozhinov@yandex.com>
* Copyright (c) 2024 Tomas Jurena <jurena@utb.cz>
*
* SPDX-License-Identifier: Apache-2.0
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = <0 0 &gpioc 0 0>, /* A0 */
<1 0 &gpiof 8 0>, /* A1 */
<2 0 &gpioa 0 0>, /* A2 */
<3 0 &gpioa 1 0>, /* A3 */
<4 0 &gpioc 2 0>, /* A4 */
<5 0 &gpioc 3 0>, /* A5 */
<6 0 &gpiob 7 0>, /* D0 */
<7 0 &gpiob 6 0>, /* D1 */
<8 0 &gpiog 3 0>, /* D2 */
<9 0 &gpioa 6 0>, /* D3 */
<10 0 &gpiok 1 0>, /* D4 */
<11 0 &gpioa 8 0>, /* D5 */
<12 0 &gpioe 6 0>, /* D6 */
<13 0 &gpioi 6 0>, /* D7 */
<14 0 &gpioe 3 0>, /* D8 */
<15 0 &gpioh 15 0>, /* D9 */
<16 0 &gpiob 4 0>, /* D10 */
<17 0 &gpiob 15 0>, /* D11 */
<18 0 &gpioi 2 0>, /* D12 */
<19 0 &gpiod 3 0>, /* D13 */
<20 0 &gpiod 13 0>, /* D14 */
<21 0 &gpiod 12 0>; /* D15 */
};
};
arduino_i2c: &i2c1 {};
arduino_serial: &usart1 {};

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# SPDX-License-Identifier: Apache-2.0
# Copyright (c) 2020 Alexander Kozhinov <AlexanderKozhinov@yandex.com>
# Copyright (c) 2024 Tomas Jurena <jurena@utb.cz>
board_runner_args(jlink "--device=STM32H745XI" "--speed=4000")
if(CONFIG_BOARD_STM32H745I_DISCO_STM32H745XX_M7)
board_runner_args(openocd --target-handle=_CHIPNAME.cpu0)
elseif(CONFIG_BOARD_STM32H745I_DISCO_STM32H745XX_M4)
board_runner_args(openocd --target-handle=_CHIPNAME.cpu1)
endif()
board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

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board:
name: stm32h745i_disco
vendor: st
socs:
- name: stm32h745xx

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.. _stm32h745i_disco_board:
ST STM32H745I Discovery
#######################
Overview
********
The STM32H745I-DISCO Discovery kit is a complete demonstration and development
platform for STMicroelectronics Arm |reg| Cortex |reg|M7 and Cortex |reg|M4 core-based STM32H745XI microcontroller.
The full range of hardware features available on the board helps users enhance their application
development by an evaluation of almost all peripherals (such as USB OTG FS, Ethernet 10/100Mb/s,
eMMC, USART, SAI audio DAC stereo with audio jack input and output, MEMS digital microphone, SDRAM,
Quad-SPI flash memory, and RGB interface LCD with capacitive multi-touch panel). ARDUINO |reg| Uno V3
connectors provide easy connection to extension shields or daughterboards for specific applications.
STLINK-V3E is integrated into the board, as an embedded in-circuit debugger and programmer for the
STM32 MCU and the USB Virtual COM port bridge
Key Features
- Arm |reg| Cortex |reg| core-based microcontroller with 2 Mbytes of flash memory and 1 Mbyte of RAM, in a TFBGA240+25 package
- 4.3” RGB interface LCD with touch panel connector
- Ethernet compliant with IEEE-802.3-2002, and PoE
- USB OTG FS
- SAI audio codec
- One ST-MEMS digital microphone
- 2× 512-Mbit Quad-SPI NOR flash memory
- 128-Mbit SDRAM
- 4-Gbyte on-board eMMC
- 1 user and reset push-button
- Fanout daughterboard
- 2× CAN FDs
- Board connectors:
- USB FS Micro-AB connectors
- ST-LINK Micro-B USB connector
- USB power Micro-B connector
- Ethernet RJ45
- Stereo headset jack including analog microphone input
- Audio header for external speakers
- TagConnect |trade| (TAG) 10-pin footprint
- Arm |reg| Cortex |reg| 10-pin 1.27 mm pitch debug connector over STDC14 footprint
- ARDUINO |reg| Uno V3 expansion connectors
- STMod+
- Flexible power-supply options:
- STLINK-V3E USB connector, USB FS connector
- 5 V delivered by RJ45 (Power over Ethernet)
- 5 V delivered by ARDUINO |reg| or external connector
- USB charger
- USB power
.. image:: img/stm32h745i-disco.jpg
:align: center
:alt: STM32H745I-DISCO
More information about the board can be found at the `STM32H745I-DISCO website`_.
More information about STM32H747XIH6 can be found here:
- `STM32H745XI on www.st.com`_
- `STM32H745xx reference manual`_
- `STM32H745xx datasheet`_
Supported Features
==================
The current Zephyr stm32h745i_disco board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| RTC | on-chip | counter |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
| ETHERNET | on-chip | ethernet |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| QSPI NOR | on-chip | off-chip flash |
+-----------+------------+-------------------------------------+
| FDCAN | on-chip | fdcan |
+-----------+------------+-------------------------------------+
| FMC | on-chip | memc (SDRAM) |
+-----------+------------+-------------------------------------+
| RTC | on-chip | rtc |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported on this Zephyr port.
The default configuration per core can be found in the defconfig files:
:zephyr_file:`boards/st/stm32h745i_disco/stm32h745i_disco_stm32h745xx_m7_defconfig`` and
:zephyr_file:`boards/st/stm32h745i_disco/stm32h745i_disco_stm32h745xx_m4_defconfig`
For more details please refer to `STM32H745-Disco UM`_.
Default Zephyr Peripheral Mapping:
----------------------------------
- USART_3 TX/RX : PB10/PB11 (ST-Link Virtual Port Com)
- USART_1 TX/RX : PB6/PB7 (Arduino Serial)
- SPI_2 NSS/SCK/MISO/MOSI : PB4/PD3/PI2/PB15 (Arduino SPI)
- I2C_4 SCL/SDA: PD12, PD13 (Arduino I2C)
- USER_PB : PC13
- LD1 : PI13
- LD2 : PJ2
- LD3 : PD3
System Clock
------------
STM32H745I-DISCO System Clock could be driven by an internal or external
oscillator, as well as the main PLL clock. By default, the System clock is
driven by the PLL clock at 480MHz, driven by an 25MHz high-speed external clock.
Serial Port
-----------
STM32H745I-DISCO board has 4 UARTs and 4 USARTs. The Zephyr console output is
assigned to UART3. Default settings are 115200 8N1.
Resources sharing
-----------------
The dual core nature of STM32H745 SoC requires sharing HW resources between the
two cores. This is done in 3 ways:
- **Compilation**: Clock configuration is only accessible to M7 core. M4 core only
has access to bus clock activation and deactivation.
- **Static pre-compilation assignment**: Peripherals such as a UART are assigned in
devicetree before compilation. The user must ensure peripherals are not assigned
to both cores at the same time.
- **Run time protection**: Interrupt-controller and GPIO configurations could be
accessed by both cores at run time. Accesses are protected by a hardware semaphore
to avoid potential concurrent access issues.
Programming and Debugging
*************************
Applications for the ``stm32h745i_disco`` board should be built per core target,
using either ``stm32h745i_disco/stm32h745xx/m7`` or ``stm32h745i_disco/stm32h745xx/m4`` as the target
(see :ref:`build_an_application` and :ref:`application_run` for more details).
.. note::
Check if the on-board ST-LINK V3 has the latest firmware version. It can be done with either `STM32CubeIDE`_ or `STM32CubeProgrammer`_
Flashing
========
STM32H745I-DISCO board includes an ST-LINK/V3 embedded debug tool interface.
Flashing operation will depend on the target and the SoC
option bytes configuration.
By default:
- CPU0 (Cortex-M7) boot address is set to 0x80000000 (OB: BOOT_CM7_ADD0)
- CPU1 (Cortex-M4) boot address is set to 0x81000000 (OB: BOOT_CM4_ADD0)
Also, the out of the box default board configuration enables CM7 and CM4 boot when
board is powered (Option bytes BCM7 and BCM4 are checked).
In that configuration, Kconfig boot option ``STM32H7_BOOT_CM4_CM7`` should be selected.
Zephyr flash configuration has been set to meet these default settings.
Alternatively, west `STM32CubeProgrammer`_ runner can be used, after installing
it, to flash applications for both cores. The target core is detected automatically.
.. code-block:: console
$ west flash --runner stm32cubeprogrammer
Flashing an application to STM32H745XI M7 Core
----------------------------------------------
First, connect the STM32H745I-DISCO to your host computer using
the USB port to prepare it for flashing. Then build and flash your application.
Here is an example for the :ref:`hello_world` application.
Run a serial host program to connect with your STM32H745I-DISCO board.
.. code-block:: console
$ minicom -b 115200 -D /dev/ttyACM0
or use screen:
.. code-block:: console
$ screen /dev/ttyACM0 115200
Build and flash the application:
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: stm32h745i_disco/stm32h745xx/m7
:goals: build flash
You should see the following message on the console:
.. code-block:: console
$ Hello World! stm32h745i_disco
.. note::
Sometimes, flashing does not work properly. It is necessary to erase the flash
(with STM32CubeProgrammer for example) to make it work again.
Similarly, you can build and flash samples on the M4 target. For this, please
take care of the resource sharing (UART port used for console for instance).
Here is an example for the :zephyr:code-sample:`blinky` application on M4 core.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: stm32h745i_disco/stm32h745xx/m7
:goals: build flash
.. note::
Flashing both M4 and M7 and pushing RESTART button on the board leads
to LD1 and LD2 flashing simultaneously.
Debugging
=========
You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: stm32h745i_disco/stm32h745xx/m7
:maybe-skip-config:
:goals: debug
Debugging with west is currently not available on Cortex M4 side.
In order to debug a Zephyr application on Cortex M4 side, you can use
`STM32CubeIDE`_.
.. _STM32H745I-DISCO website:
https://www.st.com/en/evaluation-tools/stm32h745i-disco.html
.. _STM32H745XI on www.st.com:
https://www.st.com/en/microcontrollers-microprocessors/stm32h745xi.html
.. _STM32H745xx reference manual:
https://www.st.com/resource/en/reference_manual/rm0399-stm32h745755-and-stm32h747757-advanced-armbased-32bit-mcus-stmicroelectronics.pdf
.. _STM32H745xx datasheet:
https://www.st.com/resource/en/datasheet/stm32h745xi.pdf
.. _STM32H745-Disco UM:
https://www.st.com/resource/en/user_manual/um2488-discovery-kits-with-stm32h745xi-and-stm32h750xb-mcus-stmicroelectronics.pdf
.. _STM32CubeProgrammer:
https://www.st.com/en/development-tools/stm32cubeprog.html
.. _STM32CubeIDE:
https://www.st.com/en/development-tools/stm32cubeide.html

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/*
* Copyright (c) 2020 Alexander Kozhinov <AlexanderKozhinov@yandex.com>
* Copyright (c) 2024 Tomas Jurena <jurena@utb.cz>
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <st/h7/stm32h745xihx-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
leds: leds {
compatible = "gpio-leds";
green_led: led_1 {
gpios = <&gpioj 2 GPIO_ACTIVE_HIGH>;
label = "User LD7";
};
red_led: led_2 {
gpios = <&gpioi 13 GPIO_ACTIVE_HIGH>;
label = "User LD6";
};
green_led_2: led_3 {
gpios = <&gpiod 3 GPIO_ACTIVE_HIGH>;
label = "User LD8";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button_0 {
gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
label = "User SB1";
zephyr,code = <INPUT_KEY_0>;
};
};
};
&rcc {
d1cpre = <1>;
hpre = <2>;
d1ppre = <2>;
d2ppre1 = <2>;
d2ppre2 = <2>;
d3ppre = <2>;
};
&mailbox {
status = "okay";
};

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/*
* Copyright (c) 2020 Alexander Kozhinov <AlexanderKozhinov@yandex.com>
* Copyright (c) 2024 Tomas Jurena <jurena@utb.cz>
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <st/h7/stm32h745Xi_m4.dtsi>
#include "stm32h745i_disco.dtsi"
/ {
model = "STMicroelectronics STM32H745I-DISCO board";
compatible = "st,stm32h745i-disco";
/* HW resources belonging to CM4 */
chosen {
zephyr,console = &usart2;
zephyr,shell-uart = &usart2;
zephyr,sram = &sram1;
zephyr,flash = &flash1;
};
aliases {
led0 = &green_led;
};
};
&usart2 {
pinctrl-0 = <&usart2_tx_pd5 &usart2_rx_pd6>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&rcc {
clock-frequency = <DT_FREQ_M(240)>;
};

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identifier: stm32h745i_disco/stm32h745xx/m4
name: STM32H745XI Discovery (M4)
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
ram: 288
flash: 1024
supported:
- arduino_gpio
- gpio
testing:
ignore_tags:
- mpu
- nfc
vendor: st

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# SPDX-License-Identifier: Apache-2.0
# Copyright (c) 2020 Alexander Kozhinov <AlexanderKozhinov@yandex.com>
# Copyright (c) 2024 Tomas Jurena <jurena@utb.cz>
# Enable GPIO
CONFIG_GPIO=y
# Enable clock
CONFIG_CLOCK_CONTROL=y
# By default SERIAL peripherals are assigned to m7
# Enable uart driver
#CONFIG_SERIAL=y
# Console
#CONFIG_CONSOLE=y
#CONFIG_UART_CONSOLE=y
# enable pin controller
CONFIG_PINCTRL=y

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/*
* Copyright (c) 2020 Alexander Kozhinov <AlexanderKozhinov@yandex.com>
* Copyright (c) 2024 Tomas Jurena <jurena@utb.cz>
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <st/h7/stm32h745Xi_m7.dtsi>
#include "stm32h745i_disco.dtsi"
/ {
model = "STMicroelectronics STM32H745I-DISCO board";
compatible = "st,stm32h745i-disco";
/* HW resources belonging to CM7 */
chosen {
zephyr,console = &usart3;
zephyr,shell-uart = &usart3;
zephyr,dtcm = &dtcm;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,flash-controller = &mt25ql512ab1;
zephyr,canbus = &fdcan1;
};
pwmleds {
compatible = "pwm-leds";
green_pwm_led: green_pwm_led {
pwms = <&pwm11 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
label = "User LD8 - PWM11";
};
};
transceiver0: can-phy0 {
compatible = "microchip,mcp2562fd", "can-transceiver-gpio";
max-bitrate = <5000000>;
#phy-cells = <0>;
};
transceiver1: can-phy1 {
compatible = "microchip,mcp2562fd", "can-transceiver-gpio";
max-bitrate = <5000000>;
#phy-cells = <0>;
};
/* RM0455 - 23.6 External device address mapping */
sdram2: sdram@d0000000 {
compatible = "zephyr,memory-region", "mmio-sram";
device_type = "memory";
reg = <0xd0000000 DT_SIZE_M(16)>; /* 128Mbit */
zephyr,memory-region = "SDRAM2";
zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
};
aliases {
led0 = &green_led;
pwm-led0 = &green_pwm_led;
sw0 = &user_button;
};
};
&clk_lsi {
status = "okay";
};
&clk_hsi48 {
status = "okay";
};
&clk_hse {
clock-frequency = <DT_FREQ_M(25)>; /* X1: 25MHz */
status = "okay";
};
&pll {
div-m = <5>;
mul-n = <192>;
div-p = <2>;
div-q = <15>;
div-r = <4>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(480)>;
};
&usart1 {
pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>;
pinctrl-names = "default";
current-speed = <57600>;
status = "okay";
};
&usart3 {
pinctrl-0 = <&usart3_tx_pb10 &usart3_rx_pb11>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB4 0x00010000>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
};
&timers1 {
st,prescaler = <10000>;
status = "okay";
pwm11: pwm {
status = "okay";
pinctrl-0 = <&tim1_ch1_pa8>;
pinctrl-names = "default";
};
};
&mac {
status = "okay";
/* MII */
pinctrl-0 = <&eth_ref_clk_pa1
&eth_crs_dv_pa7
&eth_rxd2_pb0
&eth_rxd3_pb1
&eth_txd2_pc2
&eth_tx_clk_pc3
&eth_rxd0_pc4
&eth_rxd1_pc5
&eth_txd3_pe2
&eth_tx_en_pg11
&eth_txd1_pg12
&eth_txd0_pg13
&eth_rx_er_pi10>;
pinctrl-names = "default";
};
&mdio {
status = "okay";
pinctrl-0 = <&eth_mdio_pa2 &eth_mdc_pc1>;
pinctrl-names = "default";
ethernet-phy@0 {
compatible = "ethernet-phy";
reg = <0x00>;
status = "okay";
};
};
&rng {
status = "okay";
};
&quadspi {
pinctrl-names = "default";
pinctrl-0 = <
&quadspi_bk1_io0_pd11
&quadspi_bk1_io3_pf6
&quadspi_bk1_io2_pf7
&quadspi_bk1_io1_pf9
&quadspi_clk_pf10
&quadspi_bk1_ncs_pg6
&quadspi_bk2_io2_pg9
&quadspi_bk2_io3_pg14
&quadspi_bk2_io0_ph2
&quadspi_bk2_io1_ph3
>;
flash-id = <1>;
status = "okay";
mt25ql512ab1: qspi-nor-flash-1@90000000 {
compatible = "st,stm32-qspi-nor";
reg = <0x90000000 DT_SIZE_M(64)>; /* 512 Mbits */
qspi-max-frequency = <72000000>;
spi-bus-width = <4>;
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
storage_partition: partition@0 {
reg = <0x0 DT_SIZE_M(64)>;
};
};
};
mt25ql512ab2: qspi-nor-flash-2@90000000 {
compatible = "st,stm32-qspi-nor";
reg = <0x90000000 DT_SIZE_M(64)>; /* 512 Mbits */
qspi-max-frequency = <72000000>;
status = "okay";
};
};
&i2c4 {
status = "okay";
pinctrl-0 = <&i2c4_scl_pd12 &i2c4_sda_pd13>;
pinctrl-names = "default";
};
&spi2 {
status = "okay";
pinctrl-0 = <&spi2_nss_pb4 &spi2_mosi_pb15 &spi2_miso_pi2 &spi2_sck_pd3>;
pinctrl-names = "default";
};
&fdcan1 {
status = "okay";
pinctrl-0 = <&fdcan1_tx_ph13 &fdcan1_rx_ph14>;
pinctrl-names = "default";
bus-speed = <125000>;
bus-speed-data = <1000000>;
sample-point = <875>;
sample-point-data = <875>;
phys = <&transceiver0>;
};
&fdcan2 {
status = "okay";
pinctrl-0 = <&fdcan2_tx_pb13 &fdcan2_rx_pb5>;
pinctrl-names = "default";
bus-speed = <125000>;
bus-speed-data = <1000000>;
sample-point = <875>;
sample-point-data = <875>;
phys = <&transceiver1>;
};
&fmc {
pinctrl-0 = <&fmc_nbl0_pe0 &fmc_nbl1_pe1
&fmc_sdclk_pg8 &fmc_sdnwe_ph5 &fmc_sdcke1_ph7
&fmc_sdne1_ph6 &fmc_sdnras_pf11 &fmc_sdncas_pg15
&fmc_a0_pf0 &fmc_a1_pf1 &fmc_a2_pf2 &fmc_a3_pf3 &fmc_a4_pf4
&fmc_a5_pf5 &fmc_a6_pf12 &fmc_a7_pf13 &fmc_a8_pf14
&fmc_a9_pf15 &fmc_a10_pg0 &fmc_a11_pg1
&fmc_a14_pg4 &fmc_a15_pg5 &fmc_d0_pd14 &fmc_d1_pd15
&fmc_d2_pd0 &fmc_d3_pd1 &fmc_d4_pe7 &fmc_d5_pe8 &fmc_d6_pe9
&fmc_d7_pe10 &fmc_d8_pe11 &fmc_d9_pe12 &fmc_d10_pe13
&fmc_d11_pe14 &fmc_d12_pe15 &fmc_d13_pd8 &fmc_d14_pd9
&fmc_d15_pd10>;
pinctrl-names = "default";
status = "okay";
sdram {
status = "okay";
power-up-delay = <100>;
num-auto-refresh = <8>;
mode-register = <0x220>;
refresh-rate = <0x603>;
bank@1 {
reg = <1>;
st,sdram-control = <STM32_FMC_SDRAM_NC_8
STM32_FMC_SDRAM_NR_12
STM32_FMC_SDRAM_MWID_16
STM32_FMC_SDRAM_NB_4
STM32_FMC_SDRAM_CAS_2
STM32_FMC_SDRAM_SDCLK_PERIOD_2
STM32_FMC_SDRAM_RBURST_ENABLE
STM32_FMC_SDRAM_RPIPE_0>;
st,sdram-timing = <2 7 4 7 2 2 2>;
};
};
};

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@ -0,0 +1,23 @@
identifier: stm32h745i_disco/stm32h745xx/m7
name: STM32H745XI Discovery (M7)
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
ram: 512
flash: 1024
supported:
- arduino_gpio
- arduino_i2c
- uart
- gpio
- counter
- i2c
- pwm
- netif:eth
- qspi
- memc
- spi
- rtc
vendor: st

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@ -0,0 +1,28 @@
# SPDX-License-Identifier: Apache-2.0
# Copyright (c) 2020 Alexander Kozhinov <AlexanderKozhinov@yandex.com>
# Copyright (c) 2024 Tomas Jurena <jurena@utb.cz>
# Enable the internal SMPS regulator
CONFIG_POWER_SUPPLY_DIRECT_SMPS=y
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
# Enable UART ( disable to assign to M4 core)
CONFIG_SERIAL=y
# Console ( disable to assign to M4 core)
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Enable GPIO
CONFIG_GPIO=y
# Enable Clock
CONFIG_CLOCK_CONTROL=y
# enable pin controller
CONFIG_PINCTRL=y

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# STM32H745XI DISCOVERY board OpenOCD ST-LINK V3 configuration
#
# Copyright (c) 2020 Alexander Kozhinov <AlexanderKozhinov@yandex.com>
# Copyright (c) 2024 Tomas Jurena <jurena@utb.cz>
# SPDX-License-Identifier: Apache-2.0
#
source [find board/stm32h745i-disco.cfg]
# Use connect_assert_srst here to be able to program
# even when core is in sleep mode
reset_config srst_only srst_nogate connect_assert_srst
$_CHIPNAME.cpu0 configure -event gdb-attach {
echo "Debugger attaching: halting execution"
gdb_breakpoint_override hard
}
$_CHIPNAME.cpu0 configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
# Due to the use of connect_assert_srst, running gdb requires
# to reset halt just after openocd init.
rename init old_init
proc init {} {
old_init
reset halt
}