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dts: stm32: Add rcc node on stm32 socs

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This commit provides rcc nodes to all stm32 based socs.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2017-07-20 08:38:29 +02:00 • committed by Kumar Gala
commit c8852fb379
9 changed files with 72 additions and 0 deletions
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8
dts/arm/st/stm32f103Xb.dtsi
View file

@ -33,6 +33,14 @@
};
soc {
rcc: rcc@40021000 {
compatible = "st,stm32-rcc";
clocks-controller;
#clocks-cells = <2>;
reg = <0x40021000 0x400>;
label = "STM32_CLK_RCC";
};
usart1: serial@40013800 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40013800 0x400>;

8
dts/arm/st/stm32f103Xe.dtsi
View file

@ -33,6 +33,14 @@
};
soc {
rcc: rcc@40021000 {
compatible = "st,stm32-rcc";
clocks-controller;
#clocks-cells = <2>;
reg = <0x40021000 0x400>;
label = "STM32_CLK_RCC";
};
usart1: serial@40013800 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40013800 0x400>;

8
dts/arm/st/stm32f107.dtsi
View file

@ -30,6 +30,14 @@
};
soc {
rcc: rcc@40021000 {
compatible = "st,stm32-rcc";
clocks-controller;
#clocks-cells = <2>;
reg = <0x40021000 0x400>;
label = "STM32_CLK_RCC";
};
usart1: serial@40013800 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40013800 0x400>;

8
dts/arm/st/stm32f303.dtsi
View file

@ -30,6 +30,14 @@
};
soc {
rcc: rcc@40021000 {
compatible = "st,stm32-rcc";
clocks-controller;
#clocks-cells = <2>;
reg = <0x40021000 0x400>;
label = "STM32_CLK_RCC";
};
usart1: serial@40013800 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40013800 0x400>;

8
dts/arm/st/stm32f334.dtsi
View file

@ -30,6 +30,14 @@
};
soc {
rcc: rcc@40021000 {
compatible = "st,stm32-rcc";
clocks-controller;
#clocks-cells = <2>;
reg = <0x40021000 0x400>;
label = "STM32_CLK_RCC";
};
usart1: serial@40013800 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40013800 0x400>;

8
dts/arm/st/stm32f373.dtsi
View file

@ -30,6 +30,14 @@
};
soc {
rcc: rcc@40021000 {
compatible = "st,stm32-rcc";
clocks-controller;
#clocks-cells = <2>;
reg = <0x40021000 0x400>;
label = "STM32_CLK_RCC";
};
usart1: serial@40013800 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40013800 0x400>;

8
dts/arm/st/stm32f4.dtsi
View file

@ -30,6 +30,14 @@
};
soc {
rcc: rcc@40023800 {
compatible = "st,stm32-rcc";
clocks-controller;
#clocks-cells = <2>;
reg = <0x40023800 0x400>;
label = "STM32_CLK_RCC";
};
usart1: serial@40011000 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40011000 0x400>;

8
dts/arm/st/stm32l432.dtsi
View file

@ -30,6 +30,14 @@
};
soc {
rcc: rcc@40021000 {
compatible = "st,stm32-rcc";
clocks-controller;
#clocks-cells = <2>;
reg = <0x40021000 0x400>;
label = "STM32_CLK_RCC";
};
usart1: serial@40013800 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40013800 0x400>;

8
dts/arm/st/stm32l475.dtsi
View file

@ -30,6 +30,14 @@
};
soc {
rcc: rcc@40021000 {
compatible = "st,stm32-rcc";
clocks-controller;
#clocks-cells = <2>;
reg = <0x40021000 0x400>;
label = "STM32_CLK_RCC";
};
usart1: serial@40013800 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40013800 0x400>;