soc: microchip: add new soc sama7g54

Product URL: https://www.microchip.com/en-us/product/SAMA7G54

Signed-off-by: Tony Han <tony.han@microchip.com>

soc/microchip/sam/CMakeLists.txt

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+# Copyright (C) 2025 Microchip Technology Inc. and its subsidiaries
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+add_subdirectory(common)
+add_subdirectory(${SOC_SERIES})

soc/microchip/sam/Kconfig

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+# Copyright (C) 2025 Microchip Technology Inc. and its subsidiaries
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+config SOC_SERIES_SAMA7G5
+	select ARM
+	select CPU_CORTEX_A7
+	select SOC_EARLY_INIT_HOOK

soc/microchip/sam/Kconfig.defconfig

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+# Copyright (C) 2025 Microchip Technology Inc. and its subsidiaries
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+if SOC_FAMILY_MICROCHIP_SAM
+
+rsource "*/Kconfig.defconfig"
+
+config CLOCK_CONTROL
+	default y
+
+endif # SOC_FAMILY_MICROCHIP_SAM

soc/microchip/sam/Kconfig.soc

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+# Copyright (C) 2025 Microchip Technology Inc. and its subsidiaries
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+config SOC_FAMILY_MICROCHIP_SAM
+	bool
+
+config SOC_FAMILY
+	default "microchip_sam" if SOC_FAMILY_MICROCHIP_SAM
+
+rsource "*/Kconfig.soc"

soc/microchip/sam/sama7g5/CMakeLists.txt

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+# Copyright (C) 2025 Microchip Technology Inc. and its subsidiaries
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+zephyr_sources(soc.c)
+zephyr_include_directories(.)
+
+set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/arm/cortex_a_r/scripts/linker.ld CACHE INTERNAL "")

soc/microchip/sam/sama7g5/Kconfig.defconfig

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+# Copyright (C) 2025 Microchip Technology Inc. and its subsidiaries
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+if SOC_SERIES_SAMA7G5
+
+config NUM_IRQS
+	default 155
+
+config SYS_CLOCK_HW_CYCLES_PER_SEC
+	default $(dt_node_int_prop_int,/soc/timer@e1800000,clock-frequency)
+
+config MMU
+	default y
+
+endif # SOC_SERIES_SAMA7G5

soc/microchip/sam/sama7g5/Kconfig.soc

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+# Copyright (C) 2025 Microchip Technology Inc. and its subsidiaries
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+config SOC_SERIES_SAMA7G5
+	bool
+	select SOC_FAMILY_MICROCHIP_SAM
+	help
+	  Enable support for Microchip SAM Microprocessors.
+
+config SOC_SERIES
+	default "sama7g5" if SOC_SERIES_SAMA7G5
+
+rsource "Kconfig.soc.sam*"

soc/microchip/sam/sama7g5/Kconfig.soc.sama7g54

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+# Copyright (C) 2025 Microchip Technology Inc. and its subsidiaries
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+config SOC_SAMA7G54
+	bool
+	select SOC_SERIES_SAMA7G5
+
+config SOC
+	default "sama7g54" if SOC_SAMA7G54

soc/microchip/sam/sama7g5/soc.c

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+/*
+ * Copyright (C) 2025 Microchip Technology Inc. and its subsidiaries
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ */
+
+#include <zephyr/init.h>
+#include <zephyr/arch/arm/mmu/arm_mmu.h>
+#include <zephyr/kernel.h>
+
+static const struct arm_mmu_region mmu_regions[] = {
+	MMU_REGION_FLAT_ENTRY("vectors", CONFIG_KERNEL_VM_BASE, 0x1000,
+			      MT_STRONGLY_ORDERED | MPERM_R | MPERM_X),
+
+	MMU_REGION_FLAT_ENTRY("flexcom3", FLEXCOM3_BASE_ADDRESS, 0x4000,
+			      MT_STRONGLY_ORDERED | MPERM_R | MPERM_W),
+
+	MMU_REGION_FLAT_ENTRY("gic", GIC_DISTRIBUTOR_BASE, 0x1100,
+			      MT_STRONGLY_ORDERED | MPERM_R | MPERM_W),
+
+	MMU_REGION_FLAT_ENTRY("pioa", PIO_BASE_ADDRESS, 0x4000,
+			      MT_STRONGLY_ORDERED | MPERM_R | MPERM_W),
+
+	MMU_REGION_FLAT_ENTRY("pit64b0", PIT64B0_BASE_ADDRESS, 0x4000,
+			      MT_STRONGLY_ORDERED | MPERM_R | MPERM_W),
+
+	MMU_REGION_FLAT_ENTRY("pmc", PMC_BASE_ADDRESS, 0x200,
+			      MT_STRONGLY_ORDERED | MPERM_R | MPERM_W),
+
+	MMU_REGION_FLAT_ENTRY("sckc", SCKC_BASE_ADDRESS, 0x4,
+			      MT_STRONGLY_ORDERED | MPERM_R | MPERM_W),
+};
+
+const struct arm_mmu_config mmu_config = {
+	.num_regions = ARRAY_SIZE(mmu_regions),
+	.mmu_regions = mmu_regions,
+};
+
+void relocate_vector_table(void)
+{
+	write_vbar(CONFIG_KERNEL_VM_BASE);
+}
+
+void soc_early_init_hook(void)
+{
+	/* Enable Generic clock for PIT64B0 for system tick */
+	PMC_REGS->PMC_PCR = PMC_PCR_CMD(1) | PMC_PCR_GCLKEN(1) | PMC_PCR_EN(1) |
+			    PMC_PCR_GCLKDIV(40 - 1) | PMC_PCR_GCLKCSS_SYSPLL |
+			    PMC_PCR_PID(ID_PIT64B0);
+}

soc/microchip/sam/sama7g5/soc.h

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+/*
+ * Copyright (C) 2025 Microchip Technology Inc. and its subsidiaries
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef __SAMA7G5_SOC__H_
+#define __SAMA7G5_SOC__H_
+
+#ifdef CONFIG_SOC_SAMA7G54
+	#define __SAMA7G54__
+#endif
+
+#include "sam.h"
+
+#endif /* __SAMA7G5_SOC__H_ */

soc/microchip/sam/soc.yml

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+family:
+- name: microchip_sam
+  series:
+  - name: sama7g5
+    socs:
+    - name: sama7g54