mgmt: ec_host_cmd: stm32_spi: fix clock domain support
Fix support for clock domains. Create define that identify if clock domain was selected in any of the st_stm32_spi_host_cmd nodes. Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
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1 changed files with 8 additions and 1 deletions
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@ -102,6 +102,12 @@ BUILD_ASSERT(DT_NODE_HAS_COMPAT_STATUS(DT_CHOSEN(zephyr_host_cmd_spi_backend),
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#define STM32_DMA_FEATURES_ID(id, dir) DT_DMAS_CELL_BY_NAME_OR(id, dir, features, 0)
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#define STM32_DMA_FEATURES_ID(id, dir) DT_DMAS_CELL_BY_NAME_OR(id, dir, features, 0)
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#if DT_CLOCKS_HAS_IDX(DT_CHOSEN(zephyr_host_cmd_spi_backend), 1)
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#define STM32_EC_HOST_CMD_SPI_DOMAIN_CLOCK_SUPPORT 1
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#else
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#define STM32_EC_HOST_CMD_SPI_DOMAIN_CLOCK_SUPPORT 0
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#endif
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/*
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/*
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* Max data size for a version 3 request/response packet. This is big enough
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* Max data size for a version 3 request/response packet. This is big enough
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* to handle a request/response header, flash write offset/size, and 512 bytes
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* to handle a request/response header, flash write offset/size, and 512 bytes
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@ -335,7 +341,8 @@ static int spi_init(const struct ec_host_cmd_spi_ctx *hc_spi)
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return err;
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return err;
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}
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}
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if (IS_ENABLED(STM32_SPI_DOMAIN_CLOCK_SUPPORT) && (hc_spi->spi_config->pclk_len > 1)) {
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if (IS_ENABLED(STM32_EC_HOST_CMD_SPI_DOMAIN_CLOCK_SUPPORT) &&
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hc_spi->spi_config->pclk_len > 1) {
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err = clock_control_configure(
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err = clock_control_configure(
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DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE),
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DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE),
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(clock_control_subsys_t)&hc_spi->spi_config->pclken[1], NULL);
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(clock_control_subsys_t)&hc_spi->spi_config->pclken[1], NULL);
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