dts: bindings: adc: Add NXP GAU ADC binding

Add binding for NXP GAU ADC

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This commit is contained in:
Declan Snyder 2024-04-26 10:30:36 -05:00 committed by Anas Nashif
commit c767ed6e27
2 changed files with 82 additions and 0 deletions

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# Copyright 2022 NXP
# SPDX-License-Identifier: Apache-2.0
description: |
NXP GAU GPADC.
compatible: "nxp,gau-adc"
include:
- name: base.yaml
- name: adc-controller.yaml
properties:
reg:
required: true
interrupts:
required: true
nxp,clock-divider:
type: int
description: |
Clock divider from 1 to 32.
Default is 1 which is reset value.
default: 1
nxp,power-mode:
type: string
description: |
Current bias.
Default is "full-bias" because it is the reset value.
enum:
- "full-bias"
- "half-bias"
default: "full-bias"
nxp,input-buffer:
type: boolean
description: Enable use of the input buffer
nxp,calibration-voltage:
type: string
enum:
- "internal"
- "external"
default: "internal"
description: |
Use external calibration voltage.
Default is "internal" because it is the reset value.
"#io-channel-cells":
const: 1
io-channel-cells:
- input

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/*
* SPDX-License-Identifier: Apache-2.0
* Copyright 2022 NXP
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_ADC_NXP_GAU_ADC_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_ADC_NXP_GAU_ADC_H_
#include <zephyr/dt-bindings/adc/adc.h>
/* Channel Sources */
#define GAU_ADC_CH0 0
#define GAU_ADC_CH1 1
#define GAU_ADC_CH2 2
#define GAU_ADC_CH3 3
#define GAU_ADC_CH4 4
#define GAU_ADC_CH5 5
#define GAU_ADC_CH6 6
#define GAU_ADC_CH7 7
#define GAU_ADC_VBATS 8
#define GAU_ADC_VREF 9
#define GAU_ADC_DACA 10
#define GAU_ADC_DACB 11
#define GAU_ADC_VSSA 12
#define GAU_ADC_TEMPP 15
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_ADC_NXP_GAU_ADC_H_ */