From c73a1eb806dc3d3bc3c0c01e4d747a5983707a23 Mon Sep 17 00:00:00 2001 From: Gil Pitney Date: Tue, 18 Apr 2017 14:08:56 -0700 Subject: [PATCH] cc3220sf: Add support for the TI CC3220SF SoC The CC3220SF is a replacement for the CC3200 SoC, comprising a network coprocessor and Cortex-M4 MPU. This leverages the CC3220 SDK driver peripheral library in ROM, and some files built from ext/hal/ti/. Jira: ZEP-1958 Change-Id: I892b212c178e05d84ff1d716dde593ced653ae6d Signed-off-by: Gil Pitney --- .gitreview | 1 + .../cc32xx/Kconfig.defconfig.cc3220sf | 43 +++++++++++++++++++ arch/arm/soc/ti_simplelink/cc32xx/Kconfig.soc | 15 +++++++ arch/arm/soc/ti_simplelink/cc32xx/README | 10 ++++- arch/arm/soc/ti_simplelink/cc32xx/soc.c | 6 +-- 5 files changed, 71 insertions(+), 4 deletions(-) create mode 100644 arch/arm/soc/ti_simplelink/cc32xx/Kconfig.defconfig.cc3220sf diff --git a/.gitreview b/.gitreview index 6a28e361c88..62340f69043 100644 --- a/.gitreview +++ b/.gitreview @@ -2,3 +2,4 @@ host=gerrit.zephyrproject.org port=29418 project=zephyr.git +defaultremote=origin diff --git a/arch/arm/soc/ti_simplelink/cc32xx/Kconfig.defconfig.cc3220sf b/arch/arm/soc/ti_simplelink/cc32xx/Kconfig.defconfig.cc3220sf new file mode 100644 index 00000000000..34c1de3b9cb --- /dev/null +++ b/arch/arm/soc/ti_simplelink/cc32xx/Kconfig.defconfig.cc3220sf @@ -0,0 +1,43 @@ +# Kconfig.defconfig.cc3220sf - TI SimpleLink CC3220SF SoC +# + +if SOC_CC3220SF + +config SOC + string + default cc3220sf + +config NUM_IRQS + int + # must be >= the highest interrupt number used + # This includes the NWP interrupt + default 179 + +config SYS_CLOCK_HW_CYCLES_PER_SEC + int + default 80000000 + +config TEXT_SECTION_OFFSET + default 0x800 if XIP + default 0x0 if !XIP + +if GPIO + +config GPIO_CC32XX + def_bool y + +config GPIO_CC32XX_A0 + default n + +config GPIO_CC32XX_A1 + default y + +config GPIO_CC32XX_A2 + default y + +config GPIO_CC32XX_A3 + default n + +endif # GPIO + +endif # SOC_CC3220SF diff --git a/arch/arm/soc/ti_simplelink/cc32xx/Kconfig.soc b/arch/arm/soc/ti_simplelink/cc32xx/Kconfig.soc index 6424fd622ec..c97ea90a500 100644 --- a/arch/arm/soc/ti_simplelink/cc32xx/Kconfig.soc +++ b/arch/arm/soc/ti_simplelink/cc32xx/Kconfig.soc @@ -9,4 +9,19 @@ config SOC_CC3200 bool "CC3200" select HAS_CC3200SDK +config SOC_CC3220SF + bool "CC3220SF" + select HAS_CC3220SDK + endchoice + + +if SOC_CC3220SF + +config CC3220SF_DEBUG + bool "Prepend debug header, disabling flash verification" + depends on XIP + default y if XIP + default n if !XIP + +endif # SOC_CC3220SF diff --git a/arch/arm/soc/ti_simplelink/cc32xx/README b/arch/arm/soc/ti_simplelink/cc32xx/README index 70ef782350e..f5a6f293819 100644 --- a/arch/arm/soc/ti_simplelink/cc32xx/README +++ b/arch/arm/soc/ti_simplelink/cc32xx/README @@ -2,9 +2,17 @@ CC3200 Board and Bootloader info taken from: * http://www.ti.com.cn/cn/lit/ug/swru367c/swru367c.pdf * http://www.ti.com/lit/ug/swru369c/swru369c.pdf -Notes: +CC3220 Info taken from: +* http://www.ti.com/lit/ug/swru465/swru465.pdf + +Notes for CC3200: * CC3200 has no integrated flash Memory. * TI bootloader takes first 16Kb of the 256Kb SRAM, so app must start at 0x20004000. CC3200 Kconfig must set SRAM size to 240Kb or less, since Zephyr computes TOP_OF_MEMORY (used for stack) based on SRAM_BASE_ADDRESS + SRAM_SIZE. + +Notes for CC3220SF: + * Text must start at 0x800 offset in flash. The first 0x800 bytes are + reserved for the flash header. + * See CONFIG_TEXT_SECTION_OFFSET. diff --git a/arch/arm/soc/ti_simplelink/cc32xx/soc.c b/arch/arm/soc/ti_simplelink/cc32xx/soc.c index 61ac3bd1f3e..ffa42418238 100644 --- a/arch/arm/soc/ti_simplelink/cc32xx/soc.c +++ b/arch/arm/soc/ti_simplelink/cc32xx/soc.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, Texas Instruments Incorporated + * Copyright (c) 2016-2017, Texas Instruments Incorporated * * SPDX-License-Identifier: Apache-2.0 */ @@ -12,7 +12,7 @@ #include #include -static int ti_cc3200_init(struct device *arg) +static int ti_cc32xx_init(struct device *arg) { ARG_UNUSED(arg); @@ -30,4 +30,4 @@ static int ti_cc3200_init(struct device *arg) return 0; } -SYS_INIT(ti_cc3200_init, PRE_KERNEL_1, 0); +SYS_INIT(ti_cc32xx_init, PRE_KERNEL_1, 0);