michaelh/zephyr
1
0
Fork 0
Code Releases Activity

dts: stm32wl: Configure LPUART wakeup line

Browse source 
Rather than configuring in serial_wakeup sample, define LPUART1 wakeup
line in wl.dtsi file.

Additionally make few cosmetic changes to nucleo_wl55rj overlay in
serial wakeup sample.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
This commit is contained in:
Erwan Gouriou 2023-11-16 12:29:34 +01:00 • committed by Carles Cufí
commit c6bba39f4d
2 changed files with 10 additions and 6 deletions
Download patch file Download diff file Expand all files Collapse all files

1
dts/arm/st/wl/stm32wl.dtsi
View file

@ -259,6 +259,7 @@
clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00000001>; clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00000001>;
resets = <&rctl STM32_RESET(APB1H, 0U)>; resets = <&rctl STM32_RESET(APB1H, 0U)>;
interrupts = <38 0>; interrupts = <38 0>;
wakeup-line = <28>;
status = "disabled"; status = "disabled";
}; };

15
samples/boards/stm32/power_mgmt/serial_wakeup/boards/nucleo_wl55jc.overlay
View file

@ -4,17 +4,20 @@
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
&clk_lse {
status = "okay";
};
/* LPUART1 clock source on LSE : set console at 9600 */
&lpuart1 { &lpuart1 {
/delete-property/ clocks; /* Set domain clock to LSE to allow wakeup from Stop mode */
clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00000001>, clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00000001>,
<&rcc STM32_SRC_LSE LPUART1_SEL(3)>; <&rcc STM32_SRC_LSE LPUART1_SEL(3)>;
/* LPUART1 clock source on LSE : set console at 9600 */
current-speed = <9600>; current-speed = <9600>;
/* Enable as wakeup source */
wakeup-source; wakeup-source;
wakeup-line = <28>; };
&clk_lse {
/* Make sure LSE clock is enabled */
status = "okay";
}; };