From c678d4508d2bd91cfebca2ea13dddcc85aecd723 Mon Sep 17 00:00:00 2001 From: Richard Osterloh Date: Wed, 4 Sep 2019 09:47:06 +0100 Subject: [PATCH] drivers: counter: Add STM32G4X counter support Add counter driver support for STM32G4X SoC series. Signed-off-by: Richard Osterloh --- drivers/counter/Kconfig.stm32_rtc | 2 +- drivers/counter/counter_ll_stm32_rtc.c | 3 ++- dts/arm/st/g4/stm32g4.dtsi | 10 ++++++++++ soc/arm/st_stm32/stm32g4/dts_fixup.h | 7 +++++++ soc/arm/st_stm32/stm32g4/soc.h | 6 ++++++ 5 files changed, 26 insertions(+), 2 deletions(-) diff --git a/drivers/counter/Kconfig.stm32_rtc b/drivers/counter/Kconfig.stm32_rtc index 4991cae45d1..17c2a80da94 100644 --- a/drivers/counter/Kconfig.stm32_rtc +++ b/drivers/counter/Kconfig.stm32_rtc @@ -14,7 +14,7 @@ menuconfig COUNTER_RTC_STM32 select USE_STM32_LL_EXTI select NEWLIB_LIBC help - Build RTC driver for STM32 SoCs. Tested on STM32 F3, F4, L4, F7 series + Build RTC driver for STM32 SoCs. Tested on STM32 F3, F4, L4, F7, G4 series choice COUNTER_RTC_STM32_CLOCK_SRC bool "RTC clock source" diff --git a/drivers/counter/counter_ll_stm32_rtc.c b/drivers/counter/counter_ll_stm32_rtc.c index d03a9540dd9..ef978a5d509 100644 --- a/drivers/counter/counter_ll_stm32_rtc.c +++ b/drivers/counter/counter_ll_stm32_rtc.c @@ -29,7 +29,8 @@ LOG_MODULE_REGISTER(counter_rtc_stm32, CONFIG_COUNTER_LOG_LEVEL); #elif defined(CONFIG_SOC_SERIES_STM32F4X) \ || defined(CONFIG_SOC_SERIES_STM32F3X) \ || defined(CONFIG_SOC_SERIES_STM32F7X) \ - || defined(CONFIG_SOC_SERIES_STM32WBX) + || defined(CONFIG_SOC_SERIES_STM32WBX) \ + || defined(CONFIG_SOC_SERIES_STM32G4X) #define RTC_EXTI_LINE LL_EXTI_LINE_17 #endif diff --git a/dts/arm/st/g4/stm32g4.dtsi b/dts/arm/st/g4/stm32g4.dtsi index 0dc5935d176..c47972acbf8 100644 --- a/dts/arm/st/g4/stm32g4.dtsi +++ b/dts/arm/st/g4/stm32g4.dtsi @@ -399,6 +399,16 @@ }; }; + rtc: rtc@40002800 { + compatible = "st,stm32-rtc"; + reg = <0x40002800 0x400>; + interrupts = <41 0>; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>; + prescaler = <32768>; + status = "disabled"; + label = "RTC_0"; + }; + }; }; diff --git a/soc/arm/st_stm32/stm32g4/dts_fixup.h b/soc/arm/st_stm32/stm32g4/dts_fixup.h index ec27d48aaf3..a0e52d3c42f 100644 --- a/soc/arm/st_stm32/stm32g4/dts_fixup.h +++ b/soc/arm/st_stm32/stm32g4/dts_fixup.h @@ -149,6 +149,13 @@ #define DT_I2C_3_CLOCK_BITS DT_ST_STM32_I2C_V2_40007800_CLOCK_BITS #define DT_I2C_3_CLOCK_BUS DT_ST_STM32_I2C_V2_40007800_CLOCK_BUS +#define DT_RTC_0_BASE_ADDRESS DT_ST_STM32_RTC_40002800_BASE_ADDRESS +#define DT_RTC_0_IRQ_PRI DT_ST_STM32_RTC_40002800_IRQ_0_PRIORITY +#define DT_RTC_0_IRQ DT_ST_STM32_RTC_40002800_IRQ_0 +#define DT_RTC_0_NAME DT_ST_STM32_RTC_40002800_LABEL +#define DT_RTC_0_CLOCK_BITS DT_ST_STM32_RTC_40002800_CLOCK_BITS +#define DT_RTC_0_CLOCK_BUS DT_ST_STM32_RTC_40002800_CLOCK_BUS + #define DT_SPI_1_BASE_ADDRESS DT_ST_STM32_SPI_FIFO_40013000_BASE_ADDRESS #define DT_SPI_1_IRQ_PRI DT_ST_STM32_SPI_FIFO_40013000_IRQ_0_PRIORITY #define DT_SPI_1_NAME DT_ST_STM32_SPI_FIFO_40013000_LABEL diff --git a/soc/arm/st_stm32/stm32g4/soc.h b/soc/arm/st_stm32/stm32g4/soc.h index 3ebea046975..b2e837fa0b9 100644 --- a/soc/arm/st_stm32/stm32g4/soc.h +++ b/soc/arm/st_stm32/stm32g4/soc.h @@ -60,6 +60,12 @@ #include #endif +#if defined(CONFIG_COUNTER_RTC_STM32) +#include +#include +#include +#endif + #endif /* !_ASMLANGUAGE */ #endif /* _STM32G4_SOC_H_ */