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soc/intel_adsp: Newlib heap should be uncached

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The sentry symbols that mark the ends of the newlib heap area were
being placed in cached memory, which violates the coherence rules.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
This commit is contained in:
Andy Ross 2021-03-08 18:06:52 -08:00 • committed by Anas Nashif
commit c65cf1cd15
1 changed files with 5 additions and 1 deletions
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6
soc/xtensa/intel_adsp/cavs_v15/linker.ld
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@ -502,7 +502,12 @@ SECTIONS
/* Initial/boot stack lives in the CPU0 interrupt stack */ /* Initial/boot stack lives in the CPU0 interrupt stack */
__stack = z_interrupt_stacks + CONFIG_ISR_STACK_SIZE; __stack = z_interrupt_stacks + CONFIG_ISR_STACK_SIZE;
/* These symbols bound the newlib heap, which must be uncached */
. = SEGSTART_UNCACHED;
_end = .; _end = .;
. = L2_SRAM_BASE + L2_SRAM_SIZE;
. = SEGSTART_UNCACHED;
_heap_sentry = .;
/* dma buffers */ /* dma buffers */
.lpbuf (NOLOAD): ALIGN(4) .lpbuf (NOLOAD): ALIGN(4)
@ -511,7 +516,6 @@ SECTIONS
*(.dma_buffers) *(.dma_buffers)
_dma_buf_end = ABSOLUTE(.); _dma_buf_end = ABSOLUTE(.);
} >LP_SRAM_REGION } >LP_SRAM_REGION
_heap_sentry = L2_SRAM_BASE + L2_SRAM_SIZE;
.comment 0 : { *(.comment) } .comment 0 : { *(.comment) }
.debug 0 : { *(.debug) } .debug 0 : { *(.debug) }
.line 0 : { *(.line) } .line 0 : { *(.line) }