drivers: sensors: lis2dh: Allow any movement on interrupt 1
Allow movement detection to be used on hardware that only has one interrupt line connected. Change hardware configuration to a bitmask. Signed-off-by: Andrew Hedin <andrew.hedin@lairdconnect.com>
This commit is contained in:
parent
5c37441256
commit
c64783f29d
4 changed files with 120 additions and 56 deletions
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@ -352,14 +352,14 @@ int lis2dh_init(const struct device *dev)
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}
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}
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/* Fix LSM303AGR_ACCEL device scale values */
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/* Fix LSM303AGR_ACCEL device scale values */
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if (cfg->is_lsm303agr_dev) {
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if (cfg->hw.is_lsm303agr_dev) {
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lis2dh_reg_val_to_scale[0] = ACCEL_SCALE(1563);
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lis2dh_reg_val_to_scale[0] = ACCEL_SCALE(1563);
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lis2dh_reg_val_to_scale[1] = ACCEL_SCALE(3126);
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lis2dh_reg_val_to_scale[1] = ACCEL_SCALE(3126);
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lis2dh_reg_val_to_scale[2] = ACCEL_SCALE(6252);
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lis2dh_reg_val_to_scale[2] = ACCEL_SCALE(6252);
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lis2dh_reg_val_to_scale[3] = ACCEL_SCALE(18758);
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lis2dh_reg_val_to_scale[3] = ACCEL_SCALE(18758);
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}
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}
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if (cfg->disc_pull_up) {
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if (cfg->hw.disc_pull_up) {
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status = lis2dh->hw_tf->update_reg(dev, LIS2DH_REG_CTRL0,
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status = lis2dh->hw_tf->update_reg(dev, LIS2DH_REG_CTRL0,
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LIS2DH_SDO_PU_DISC_MASK,
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LIS2DH_SDO_PU_DISC_MASK,
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LIS2DH_SDO_PU_DISC_MASK);
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LIS2DH_SDO_PU_DISC_MASK);
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@ -455,6 +455,9 @@ int lis2dh_init(const struct device *dev)
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#define DISC_PULL_UP(inst) \
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#define DISC_PULL_UP(inst) \
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DT_INST_PROP(inst, disconnect_sdo_sa0_pull_up)
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DT_INST_PROP(inst, disconnect_sdo_sa0_pull_up)
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#define ANYM_ON_INT1(inst) \
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DT_INST_PROP(inst, anym_on_int1)
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#ifdef CONFIG_LIS2DH_TRIGGER
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#ifdef CONFIG_LIS2DH_TRIGGER
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#define GPIO_DT_SPEC_INST_GET_BY_IDX_COND(id, prop, idx) \
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#define GPIO_DT_SPEC_INST_GET_BY_IDX_COND(id, prop, idx) \
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COND_CODE_1(DT_INST_PROP_HAS_IDX(id, prop, idx), \
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COND_CODE_1(DT_INST_PROP_HAS_IDX(id, prop, idx), \
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@ -463,9 +466,13 @@ int lis2dh_init(const struct device *dev)
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#define LIS2DH_CFG_INT(inst) \
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#define LIS2DH_CFG_INT(inst) \
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.gpio_drdy = \
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.gpio_drdy = \
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GPIO_DT_SPEC_INST_GET_BY_IDX_COND(inst, irq_gpios, 0), \
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COND_CODE_1(ANYM_ON_INT1(inst), \
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({.port = NULL, .pin = 0, .dt_flags = 0}), \
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(GPIO_DT_SPEC_INST_GET_BY_IDX_COND(inst, irq_gpios, 0))), \
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.gpio_int = \
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.gpio_int = \
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GPIO_DT_SPEC_INST_GET_BY_IDX_COND(inst, irq_gpios, 1),
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COND_CODE_1(ANYM_ON_INT1(inst), \
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(GPIO_DT_SPEC_INST_GET_BY_IDX_COND(inst, irq_gpios, 0)), \
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(GPIO_DT_SPEC_INST_GET_BY_IDX_COND(inst, irq_gpios, 1))),
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#else
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#else
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#define LIS2DH_CFG_INT(inst)
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#define LIS2DH_CFG_INT(inst)
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#endif /* CONFIG_LIS2DH_TRIGGER */
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#endif /* CONFIG_LIS2DH_TRIGGER */
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@ -504,8 +511,9 @@ int lis2dh_init(const struct device *dev)
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SPI_MODE_CPOL | \
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SPI_MODE_CPOL | \
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SPI_MODE_CPHA, \
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SPI_MODE_CPHA, \
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0) }, \
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0) }, \
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.is_lsm303agr_dev = IS_LSM303AGR_DEV(inst), \
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.hw = { .is_lsm303agr_dev = IS_LSM303AGR_DEV(inst), \
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.disc_pull_up = DISC_PULL_UP(inst), \
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.disc_pull_up = DISC_PULL_UP(inst), \
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.anym_on_int1 = ANYM_ON_INT1(inst), }, \
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LIS2DH_CFG_TEMPERATURE(inst) \
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LIS2DH_CFG_TEMPERATURE(inst) \
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LIS2DH_CFG_INT(inst) \
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LIS2DH_CFG_INT(inst) \
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}
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}
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@ -525,8 +533,9 @@ int lis2dh_init(const struct device *dev)
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.bus_name = DT_INST_BUS_LABEL(inst), \
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.bus_name = DT_INST_BUS_LABEL(inst), \
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.bus_init = lis2dh_i2c_init, \
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.bus_init = lis2dh_i2c_init, \
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.bus_cfg = { .i2c_slv_addr = DT_INST_REG_ADDR(inst), }, \
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.bus_cfg = { .i2c_slv_addr = DT_INST_REG_ADDR(inst), }, \
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.is_lsm303agr_dev = IS_LSM303AGR_DEV(inst), \
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.hw = { .is_lsm303agr_dev = IS_LSM303AGR_DEV(inst), \
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.disc_pull_up = DISC_PULL_UP(inst), \
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.disc_pull_up = DISC_PULL_UP(inst), \
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.anym_on_int1 = ANYM_ON_INT1(inst), }, \
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LIS2DH_CFG_TEMPERATURE(inst) \
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LIS2DH_CFG_TEMPERATURE(inst) \
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LIS2DH_CFG_INT(inst) \
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LIS2DH_CFG_INT(inst) \
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}
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}
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@ -117,11 +117,15 @@
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#define LIS2DH_REG_CTRL5 0x24
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#define LIS2DH_REG_CTRL5 0x24
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#define LIS2DH_LIR_INT2_SHIFT 1
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#define LIS2DH_LIR_INT2_SHIFT 1
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#define LIS2DH_LIR_INT1_SHIFT 3
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#define LIS2DH_EN_LIR_INT2 BIT(LIS2DH_LIR_INT2_SHIFT)
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#define LIS2DH_EN_LIR_INT2 BIT(LIS2DH_LIR_INT2_SHIFT)
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#define LIS2DH_EN_LIR_INT1 BIT(LIS2DH_LIR_INT1_SHIFT)
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#define LIS2DH_REG_CTRL6 0x25
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#define LIS2DH_REG_CTRL6 0x25
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#define LIS2DH_EN_INT2_INT2_SHIFT 5
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#define LIS2DH_EN_INT2_INT2_SHIFT 5
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#define LIS2DH_EN_INT2_INT2 BIT(LIS2DH_EN_INT2_INT2_SHIFT)
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#define LIS2DH_EN_INT2_INT2 BIT(LIS2DH_EN_INT2_INT2_SHIFT)
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#define LIS2DH_EN_INT1_INT1_SHIFT 6
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#define LIS2DH_EN_INT1_INT1 BIT(LIS2DH_EN_INT1_INT1_SHIFT)
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#define LIS2DH_REG_REFERENCE 0x26
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#define LIS2DH_REG_REFERENCE 0x26
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@ -145,7 +149,14 @@
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#define LIS2DH_REG_ACCEL_Z_MSB 0x2D
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#define LIS2DH_REG_ACCEL_Z_MSB 0x2D
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#define LIS2DH_REG_INT1_CFG 0x30
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#define LIS2DH_REG_INT1_CFG 0x30
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#define LIS2DH_REG_INT1_SRC 0x31
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#define LIS2DH_REG_INT1_THS 0x32
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#define LIS2DH_REG_INT1_DUR 0x33
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#define LIS2DH_REG_INT2_CFG 0x34
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#define LIS2DH_REG_INT2_CFG 0x34
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#define LIS2DH_REG_INT2_SRC 0x35
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#define LIS2DH_REG_INT2_THS 0x36
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#define LIS2DH_REG_INT2_DUR 0x37
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#define LIS2DH_AOI_CFG BIT(7)
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#define LIS2DH_AOI_CFG BIT(7)
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#define LIS2DH_INT_CFG_ZHIE_ZUPE BIT(5)
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#define LIS2DH_INT_CFG_ZHIE_ZUPE BIT(5)
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#define LIS2DH_INT_CFG_ZLIE_ZDOWNE BIT(4)
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#define LIS2DH_INT_CFG_ZLIE_ZDOWNE BIT(4)
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@ -154,12 +165,6 @@
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#define LIS2DH_INT_CFG_XHIE_XUPE BIT(1)
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#define LIS2DH_INT_CFG_XHIE_XUPE BIT(1)
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#define LIS2DH_INT_CFG_XLIE_XDOWNE BIT(0)
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#define LIS2DH_INT_CFG_XLIE_XDOWNE BIT(0)
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#define LIS2DH_REG_INT2_SRC 0x35
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#define LIS2DH_REG_INT2_THS 0x36
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#define LIS2DH_REG_INT2_DUR 0x37
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/* sample buffer size includes status register */
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/* sample buffer size includes status register */
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#define LIS2DH_BUF_SZ 7
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#define LIS2DH_BUF_SZ 7
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@ -198,8 +203,11 @@ struct lis2dh_config {
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const struct gpio_dt_spec gpio_drdy;
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const struct gpio_dt_spec gpio_drdy;
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const struct gpio_dt_spec gpio_int;
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const struct gpio_dt_spec gpio_int;
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#endif /* CONFIG_LIS2DH_TRIGGER */
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#endif /* CONFIG_LIS2DH_TRIGGER */
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bool is_lsm303agr_dev;
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struct {
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bool disc_pull_up;
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bool is_lsm303agr_dev : 1;
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bool disc_pull_up : 1;
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bool anym_on_int1 : 1;
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} hw;
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#ifdef CONFIG_LIS2DH_MEASURE_TEMPERATURE
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#ifdef CONFIG_LIS2DH_MEASURE_TEMPERATURE
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const struct temperature temperature;
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const struct temperature temperature;
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#endif
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#endif
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@ -143,11 +143,22 @@ static int lis2dh_trigger_anym_set(const struct device *dev,
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/* cancel potentially pending trigger */
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/* cancel potentially pending trigger */
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atomic_clear_bit(&lis2dh->trig_flags, TRIGGED_INT2);
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atomic_clear_bit(&lis2dh->trig_flags, TRIGGED_INT2);
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/* disable all interrupt 2 events */
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if (cfg->hw.anym_on_int1) {
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status = lis2dh->hw_tf->write_reg(dev, LIS2DH_REG_INT2_CFG, 0);
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status = lis2dh->hw_tf->update_reg(dev, LIS2DH_REG_CTRL3,
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LIS2DH_EN_DRDY1_INT1, 0);
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}
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/* disable any movement interrupt events */
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status = lis2dh->hw_tf->write_reg(
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dev,
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cfg->hw.anym_on_int1 ? LIS2DH_REG_INT1_CFG : LIS2DH_REG_INT2_CFG,
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0);
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/* make sure any pending interrupt is cleared */
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/* make sure any pending interrupt is cleared */
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status = lis2dh->hw_tf->read_reg(dev, LIS2DH_REG_INT2_SRC, ®_val);
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status = lis2dh->hw_tf->read_reg(
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dev,
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cfg->hw.anym_on_int1 ? LIS2DH_REG_INT1_SRC : LIS2DH_REG_INT2_SRC,
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®_val);
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lis2dh->handler_anymotion = handler;
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lis2dh->handler_anymotion = handler;
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if ((handler == NULL) || (status < 0)) {
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if ((handler == NULL) || (status < 0)) {
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@ -169,10 +180,13 @@ static int lis2dh_trigger_anym_set(const struct device *dev,
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static int lis2dh_start_trigger_int2(const struct device *dev)
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static int lis2dh_start_trigger_int2(const struct device *dev)
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{
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{
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struct lis2dh_data *lis2dh = dev->data;
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struct lis2dh_data *lis2dh = dev->data;
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const struct lis2dh_config *cfg = dev->config;
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setup_int2(dev, true);
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setup_int2(dev, true);
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return lis2dh->hw_tf->write_reg(dev, LIS2DH_REG_INT2_CFG,
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return lis2dh->hw_tf->write_reg(
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dev,
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cfg->hw.anym_on_int1 ? LIS2DH_REG_INT1_CFG : LIS2DH_REG_INT2_CFG,
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LIS2DH_ANYM_CFG);
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LIS2DH_ANYM_CFG);
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}
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}
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@ -195,6 +209,7 @@ int lis2dh_acc_slope_config(const struct device *dev,
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const struct sensor_value *val)
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const struct sensor_value *val)
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{
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{
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struct lis2dh_data *lis2dh = dev->data;
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struct lis2dh_data *lis2dh = dev->data;
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const struct lis2dh_config *cfg = dev->config;
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int status;
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int status;
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if (attr == SENSOR_ATTR_SLOPE_TH) {
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if (attr == SENSOR_ATTR_SLOPE_TH) {
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@ -224,7 +239,10 @@ int lis2dh_acc_slope_config(const struct device *dev,
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LOG_INF("int2_ths=0x%x range_g=%d ums2=%u", reg_val,
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LOG_INF("int2_ths=0x%x range_g=%d ums2=%u", reg_val,
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range_g, slope_th_ums2 - 1);
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range_g, slope_th_ums2 - 1);
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status = lis2dh->hw_tf->write_reg(dev, LIS2DH_REG_INT2_THS,
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status = lis2dh->hw_tf->write_reg(dev,
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cfg->hw.anym_on_int1 ?
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LIS2DH_REG_INT1_THS :
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LIS2DH_REG_INT2_THS,
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reg_val);
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reg_val);
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} else { /* SENSOR_ATTR_SLOPE_DUR */
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} else { /* SENSOR_ATTR_SLOPE_DUR */
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/*
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/*
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@ -237,7 +255,10 @@ int lis2dh_acc_slope_config(const struct device *dev,
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LOG_INF("int2_dur=0x%x", val->val1);
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LOG_INF("int2_dur=0x%x", val->val1);
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status = lis2dh->hw_tf->write_reg(dev, LIS2DH_REG_INT2_DUR,
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status = lis2dh->hw_tf->write_reg(dev,
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cfg->hw.anym_on_int1 ?
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LIS2DH_REG_INT1_DUR :
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LIS2DH_REG_INT2_DUR,
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val->val1);
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val->val1);
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}
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}
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@ -344,8 +365,11 @@ static void lis2dh_thread_cb(const struct device *dev)
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};
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};
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uint8_t reg_val;
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uint8_t reg_val;
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/* clear interrupt 2 to de-assert int2 line */
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/* clear interrupt to de-assert int line */
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status = lis2dh->hw_tf->read_reg(dev, LIS2DH_REG_INT2_SRC,
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status = lis2dh->hw_tf->read_reg(dev,
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cfg->hw.anym_on_int1 ?
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LIS2DH_REG_INT1_SRC :
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LIS2DH_REG_INT2_SRC,
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®_val);
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®_val);
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if (status < 0) {
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if (status < 0) {
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LOG_ERR("clearing interrupt 2 failed: %d", status);
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LOG_ERR("clearing interrupt 2 failed: %d", status);
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@ -397,6 +421,18 @@ int lis2dh_init_interrupt(const struct device *dev)
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int status;
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int status;
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uint8_t raw[2];
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uint8_t raw[2];
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lis2dh->dev = dev;
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#if defined(CONFIG_LIS2DH_TRIGGER_OWN_THREAD)
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k_sem_init(&lis2dh->gpio_sem, 0, K_SEM_MAX_LIMIT);
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k_thread_create(&lis2dh->thread, lis2dh->thread_stack, CONFIG_LIS2DH_THREAD_STACK_SIZE,
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(k_thread_entry_t)lis2dh_thread, lis2dh, NULL, NULL,
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K_PRIO_COOP(CONFIG_LIS2DH_THREAD_PRIORITY), 0, K_NO_WAIT);
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#elif defined(CONFIG_LIS2DH_TRIGGER_GLOBAL_THREAD)
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lis2dh->work.handler = lis2dh_work_cb;
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#endif
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/*
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/*
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* Setup INT1 (for DRDY) if defined in DT
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* Setup INT1 (for DRDY) if defined in DT
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*/
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*/
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@ -414,20 +450,6 @@ int lis2dh_init_interrupt(const struct device *dev)
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goto check_gpio_int;
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goto check_gpio_int;
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}
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}
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lis2dh->dev = dev;
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#if defined(CONFIG_LIS2DH_TRIGGER_OWN_THREAD)
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k_sem_init(&lis2dh->gpio_sem, 0, K_SEM_MAX_LIMIT);
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k_thread_create(&lis2dh->thread, lis2dh->thread_stack,
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CONFIG_LIS2DH_THREAD_STACK_SIZE,
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(k_thread_entry_t)lis2dh_thread, lis2dh, NULL, NULL,
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K_PRIO_COOP(CONFIG_LIS2DH_THREAD_PRIORITY), 0,
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K_NO_WAIT);
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#elif defined(CONFIG_LIS2DH_TRIGGER_GLOBAL_THREAD)
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lis2dh->work.handler = lis2dh_work_cb;
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#endif
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/* data ready int1 gpio configuration */
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/* data ready int1 gpio configuration */
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status = gpio_pin_configure_dt(&cfg->gpio_drdy, GPIO_INPUT);
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status = gpio_pin_configure_dt(&cfg->gpio_drdy, GPIO_INPUT);
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if (status < 0) {
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if (status < 0) {
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@ -452,7 +474,7 @@ int lis2dh_init_interrupt(const struct device *dev)
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check_gpio_int:
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check_gpio_int:
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/*
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/*
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* Setup INT2 (for Any Motion) if defined in DT
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* Setup Interrupt (for Any Motion) if defined in DT
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*/
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*/
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/* setup any motion gpio interrupt */
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/* setup any motion gpio interrupt */
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@ -491,21 +513,36 @@ check_gpio_int:
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cfg->gpio_int.port->name,
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cfg->gpio_int.port->name,
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cfg->gpio_int.pin);
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cfg->gpio_int.pin);
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/* disable interrupt 2 in case of warm (re)boot */
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/* disable interrupt in case of warm (re)boot */
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status = lis2dh->hw_tf->write_reg(dev, LIS2DH_REG_INT2_CFG, 0);
|
status = lis2dh->hw_tf->write_reg(
|
||||||
|
dev,
|
||||||
|
cfg->hw.anym_on_int1 ? LIS2DH_REG_INT1_CFG : LIS2DH_REG_INT2_CFG,
|
||||||
|
0);
|
||||||
if (status < 0) {
|
if (status < 0) {
|
||||||
LOG_ERR("Interrupt 2 disable reg write failed (%d)", status);
|
LOG_ERR("Interrupt disable reg write failed (%d)", status);
|
||||||
return status;
|
return status;
|
||||||
}
|
}
|
||||||
|
|
||||||
(void)memset(raw, 0, sizeof(raw));
|
(void)memset(raw, 0, sizeof(raw));
|
||||||
status = lis2dh->hw_tf->write_data(dev, LIS2DH_REG_INT2_THS,
|
status = lis2dh->hw_tf->write_data(
|
||||||
|
dev,
|
||||||
|
cfg->hw.anym_on_int1 ? LIS2DH_REG_INT1_THS : LIS2DH_REG_INT2_THS,
|
||||||
raw, sizeof(raw));
|
raw, sizeof(raw));
|
||||||
if (status < 0) {
|
if (status < 0) {
|
||||||
LOG_ERR("Burst write to INT2 THS failed (%d)", status);
|
LOG_ERR("Burst write to THS failed (%d)", status);
|
||||||
return status;
|
return status;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
if (cfg->hw.anym_on_int1) {
|
||||||
|
/* enable interrupt 1 on int1 line */
|
||||||
|
status = lis2dh->hw_tf->update_reg(dev, LIS2DH_REG_CTRL3,
|
||||||
|
LIS2DH_EN_INT1_INT1,
|
||||||
|
LIS2DH_EN_INT1_INT1);
|
||||||
|
|
||||||
|
/* latch int1 line interrupt */
|
||||||
|
status = lis2dh->hw_tf->write_reg(dev, LIS2DH_REG_CTRL5,
|
||||||
|
LIS2DH_EN_LIR_INT1);
|
||||||
|
} else {
|
||||||
/* enable interrupt 2 on int2 line */
|
/* enable interrupt 2 on int2 line */
|
||||||
status = lis2dh->hw_tf->update_reg(dev, LIS2DH_REG_CTRL6,
|
status = lis2dh->hw_tf->update_reg(dev, LIS2DH_REG_CTRL6,
|
||||||
LIS2DH_EN_INT2_INT2,
|
LIS2DH_EN_INT2_INT2,
|
||||||
|
@ -514,8 +551,10 @@ check_gpio_int:
|
||||||
/* latch int2 line interrupt */
|
/* latch int2 line interrupt */
|
||||||
status = lis2dh->hw_tf->write_reg(dev, LIS2DH_REG_CTRL5,
|
status = lis2dh->hw_tf->write_reg(dev, LIS2DH_REG_CTRL5,
|
||||||
LIS2DH_EN_LIR_INT2);
|
LIS2DH_EN_LIR_INT2);
|
||||||
|
}
|
||||||
|
|
||||||
if (status < 0) {
|
if (status < 0) {
|
||||||
LOG_ERR("INT2 latch enable reg write failed (%d)", status);
|
LOG_ERR("latch enable reg write failed (%d)", status);
|
||||||
return status;
|
return status;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -17,3 +17,11 @@ properties:
|
||||||
during device initialization (e.g. to save current
|
during device initialization (e.g. to save current
|
||||||
leakage). Note that only subset of devices supported by this
|
leakage). Note that only subset of devices supported by this
|
||||||
binding have SDO/SA0 pull-up (e.g. LIS2DH12, LIS3DH).
|
binding have SDO/SA0 pull-up (e.g. LIS2DH12, LIS3DH).
|
||||||
|
|
||||||
|
anym-on-int1:
|
||||||
|
type: boolean
|
||||||
|
required: false
|
||||||
|
description: |
|
||||||
|
Indicates that the device driver should use interrupt 1
|
||||||
|
for any movement. This is for boards that only have one
|
||||||
|
interrupt line connected from the sensor to the processor.
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue