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arm float: Enable floating point

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Enable floating point in the Cortex-M4 processor.

Change-Id: Ibadae12b9197d6486fd5c6a3d4e177fa9e1c71bc
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
This commit is contained in:
Peter Mitsis 2016-04-26 10:23:34 -04:00 • committed by Maureen Helm
commit c632271879
1 changed files with 39 additions and 0 deletions
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39
arch/arm/core/cortex_m/prep_c.c
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@ -84,6 +84,44 @@ static inline void relocate_vector_table(void)
} }
#endif #endif
#ifdef CONFIG_FLOAT
static inline void enable_floating_point(void)
{
/*
* Upon reset, the Co-Processor Access Control Register is 0x00000000.
* Enable CP10 and CP11 coprocessors to enable floating point.
*/
__scs.cpacr.val = (_SCS_CPACR_CP10_FULL_ACCESS |
_SCS_CPACR_CP11_FULL_ACCESS);
/*
* Upon reset, the FPU Context Control Register is 0xC0000000
* (both Automatic and Lazy state preservation is enabled).
* Disable lazy state preservation so the volatile FP registers are
* always saved on exception.
*/
__scs.fpu.ccr.val = (_SCS_FPU_CCR_ASPEN_ENABLE |
_SCS_FPU_CCR_LSPEN_DISABLE);
/*
* Although automatic state preservation is enabled, the processor
* does not automatically save the volatile FP registers until they
* have first been touched. Perform a dummy move operation so that
* the stack frames are created as expected before any task or fiber
* context switching can occur.
*/
__asm__ volatile(
"vmov s0, s0;\n\t"
"dsb;\n\t"
"isb;\n\t"
);
}
#else
static inline void enable_floating_point(void)
{
}
#endif
extern FUNC_NORETURN void _Cstart(void); extern FUNC_NORETURN void _Cstart(void);
/** /**
* *
@ -97,6 +135,7 @@ extern FUNC_NORETURN void _Cstart(void);
void _PrepC(void) void _PrepC(void)
{ {
relocate_vector_table(); relocate_vector_table();
enable_floating_point();
bssZero(); bssZero();
dataCopy(); dataCopy();
_Cstart(); _Cstart();