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dts: bindings: gpio: use hyphens instead of underscore

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replace underscore with hyphens to comply with device tree spec

Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
This commit is contained in:
Jilay Pandya 2025-01-11 14:43:15 +01:00 • committed by Benjamin Cabé
commit c5aed65a54
9 changed files with 30 additions and 30 deletions
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6
boards/snps/em_starterkit/em_starterkit_r23.dtsi
View file

@ -34,9 +34,9 @@
compatible = "snps,creg-gpio"; compatible = "snps,creg-gpio";
reg = <0xf0000014 0x4>; reg = <0xf0000014 0x4>;
ngpios = <6>; ngpios = <6>;
bit_per_gpio = <1>; bit-per-gpio = <1>;
off_val = <0>; off-val = <0>;
on_val = <1>; on-val = <1>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;

6
dts/arc/synopsys/arc_hs4xd.dtsi
View file

@ -135,9 +135,9 @@
compatible = "snps,creg-gpio"; compatible = "snps,creg-gpio";
reg = <0xf00014b0 0x4>; reg = <0xf00014b0 0x4>;
ngpios = <12>; ngpios = <12>;
bit_per_gpio = <2>; bit-per-gpio = <2>;
off_val = <0>; off-val = <0>;
on_val = <2>; on-val = <2>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;

6
dts/arc/synopsys/arc_hsdk.dtsi
View file

@ -135,9 +135,9 @@
compatible = "snps,creg-gpio"; compatible = "snps,creg-gpio";
reg = <0xf00014b0 0x4>; reg = <0xf00014b0 0x4>;
ngpios = <12>; ngpios = <12>;
bit_per_gpio = <2>; bit-per-gpio = <2>;
off_val = <0>; off-val = <0>;
on_val = <2>; on-val = <2>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;

2
dts/arm/renesas/ra/ra8/ra8x1.dtsi
View file

@ -97,7 +97,7 @@
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
ngpios = <16>; ngpios = <16>;
vbatts_pins = <2 3 4>; vbatts-pins = <2 3 4>;
status = "disabled"; status = "disabled";
}; };

4
dts/bindings/gpio/nuvoton,nct38xx-gpio-port.yaml
View file

@ -11,7 +11,7 @@ properties:
reg: reg:
required: true required: true
pin_mask: pin-mask:
type: int type: int
required: true required: true
description: | description: |
@ -21,7 +21,7 @@ properties:
NCT3808: <0xdc> NCT3808: <0xdc>
others: <0xff> others: <0xff>
pinmux_mask: pinmux-mask:
type: int type: int
description: | description: |
NCT38XX series port 0 has Pin Multiplexing functionality. However, not NCT38XX series port 0 has Pin Multiplexing functionality. However, not

14
dts/bindings/gpio/nuvoton,nct38xx-gpio.yaml
View file

@ -23,8 +23,8 @@ description: |
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
ngpios = <8>; ngpios = <8>;
pin_mask = <0xff>; pin-mask = <0xff>;
pinmux_mask = <0xf7>; pinmux-mask = <0xf7>;
}; };
gpio@1 { gpio@1 {
@ -33,7 +33,7 @@ description: |
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
ngpios = <8>; ngpios = <8>;
pin_mask = <0xff>; pin-mask = <0xff>;
}; };
}; };
}; };
@ -53,8 +53,8 @@ description: |
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
ngpios = <8>; ngpios = <8>;
pin_mask = <0xdc>; pin-mask = <0xdc>;
pinmux_mask = <0xff>; pinmux-mask = <0xff>;
}; };
}; };
}; };
@ -74,8 +74,8 @@ description: |
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
ngpios = <8>; ngpios = <8>;
pin_mask = <0xdc>; pin-mask = <0xdc>;
pinmux_mask = <0xff>; pinmux-mask = <0xff>;
}; };
}; };
}; };

2
dts/bindings/gpio/renesas,ra-gpio-ioport.yaml
View file

@ -15,7 +15,7 @@ properties:
type: int type: int
required: true required: true
vbatts_pins: vbatts-pins:
type: array type: array
description: Array of vbatt pin on port description: Array of vbatt pin on port

6
dts/bindings/gpio/snps,creg-gpio.yaml
View file

@ -11,15 +11,15 @@ properties:
reg: reg:
required: true required: true
bit_per_gpio: bit-per-gpio:
type: int type: int
required: true required: true
off_val: off-val:
type: int type: int
required: true required: true
on_val: on-val:
type: int type: int
required: true required: true

14
tests/drivers/build_all/gpio/app.overlay
View file

@ -172,8 +172,8 @@
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
ngpios = <8>; ngpios = <8>;
pin_mask = <0xff>; pin-mask = <0xff>;
pinmux_mask = <0xf7>; pinmux-mask = <0xf7>;
}; };
gpio@1 { gpio@1 {
@ -182,7 +182,7 @@
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
ngpios = <8>; ngpios = <8>;
pin_mask = <0xff>; pin-mask = <0xff>;
}; };
}; };
}; };
@ -201,8 +201,8 @@
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
ngpios = <8>; ngpios = <8>;
pin_mask = <0xdc>; pin-mask = <0xdc>;
pinmux_mask = <0xff>; pinmux-mask = <0xff>;
}; };
}; };
}; };
@ -221,8 +221,8 @@
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
ngpios = <8>; ngpios = <8>;
pin_mask = <0xdc>; pin-mask = <0xdc>;
pinmux_mask = <0xff>; pinmux-mask = <0xff>;
}; };
}; };
}; };