dts/bindings: move RISC-V cores bindings to dts/bindings/cpu/

This commit moves the bindings of RISC-V cores from `dts/bindings/riscv` to
`dts/bindings/cpu`. This change aligns the bindings of RISC-V cores with
other architectures.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>

dts/bindings/riscv/riscv,cpus.yaml

@@ -1,19 +0,0 @@
-# Copyright (c) 2021 Gerson Fernando Budke <nandojve@gmail.com>
-# SPDX-License-Identifier: Apache-2.0
-
-include: cpu.yaml
-
-properties:
-  mmu-type:
-    description: Memory Management Unit (MMU)
-    type: string
-    enum:
-      - riscv,sv32
-      - riscv,sv39
-      - riscv,sv48
-      - riscv,none
-
-  riscv,isa:
-    description: RISC-V instruction set architecture
-    required: true
-    type: string

dts/bindings/riscv/sifive,e24.yaml

@@ -1,8 +0,0 @@
-# Copyright (c) 2021 Gerson Fernando Budke <nandojve@gmail.com>
-# SPDX-License-Identifier: Apache-2.0
-
-description: SiFive E24 Standard Core CPU
-
-compatible: "sifive,e24"
-
-include: sifive-common.yaml

dts/bindings/riscv/sifive,e31.yaml

@@ -1,8 +0,0 @@
-# Copyright (c) 2022 Shawn Nematbakhsh <shawn@rivosinc.com>
-# SPDX-License-Identifier: Apache-2.0
-
-description: SiFive E31 Standard Core CPU
-
-compatible: "sifive,e31"
-
-include: sifive-common.yaml

dts/bindings/riscv/sifive,e51.yaml

@@ -1,8 +0,0 @@
-# Copyright (c) 2022 Shawn Nematbakhsh <shawn@rivosinc.com>
-# SPDX-License-Identifier: Apache-2.0
-
-description: SiFive E51 Standard Core CPU
-
-compatible: "sifive,e51"
-
-include: sifive-common.yaml

dts/bindings/riscv/sifive,s7.yaml

@@ -1,8 +0,0 @@
-# Copyright (c) 2022 Shawn Nematbakhsh <shawn@rivosinc.com>
-# SPDX-License-Identifier: Apache-2.0
-
-description: SiFive S7 Standard Core CPU
-
-compatible: "sifive,s7"
-
-include: sifive-common.yaml

dts/bindings/riscv/sifive-common.yaml

@@ -1,11 +0,0 @@
-# Copyright (c) 2021 Gerson Fernando Budke <nandojve@gmail.com>
-# SPDX-License-Identifier: Apache-2.0
-
-# Common fields for SiFive RISC-V CPUs
-
-include: riscv,cpus.yaml
-
-properties:
-  hardware-exec-breakpoint-count:
-    type: int
-    description: Number of hardware break points