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boards: arm: mimxrt1024_evk: enable flexcan1

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Enable FlexCAN1 on the NXP i.MX RT1024 Evaluation Kit.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This commit is contained in:
Henrik Brix Andersen 2021-09-16 13:39:04 +02:00 • committed by Christopher Friedt
commit c5634f1b08
4 changed files with 22 additions and 0 deletions
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6
boards/arm/mimxrt1024_evk/doc/index.rst
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@ -83,6 +83,8 @@ features:
+-----------+------------+-------------------------------------+
| ENET | on-chip | ethernet |
+-----------+------------+-------------------------------------+
| CAN | on-chip | can |
+-----------+------------+-------------------------------------+
The default configuration can be found in the defconfig file:
``boards/arm/mimxrt1024_evk/mimxrt1024_evk_defconfig``
@ -129,6 +131,10 @@ The MIMXRT1024 SoC has five pairs of pinmux/gpio controllers.
+---------------+-----------------+---------------------------+
| GPIO_EMC_40 | ENET_MDIO | Ethernet |
+---------------+-----------------+---------------------------+
| GPIO_SD_B1_00 | FLEXCAN1_TX | CAN TX |
+---------------+-----------------+---------------------------+
| GPIO_SD_B1_01 | FLEXCAN1_RX | CAN RX |
+---------------+-----------------+---------------------------+
System Clock
============

6
boards/arm/mimxrt1024_evk/mimxrt1024_evk.dts
View file

@ -26,6 +26,7 @@
zephyr,dtcm = &dtcm;
zephyr,console = &lpuart1;
zephyr,shell-uart = &lpuart1;
zephyr,can-primary = &flexcan1;
};
sdram0: memory@80000000 {
@ -91,3 +92,8 @@
status = "okay";
current-speed = <115200>;
};
&flexcan1 {
status = "okay";
bus-speed = <125000>;
};

1
boards/arm/mimxrt1024_evk/mimxrt1024_evk.yaml
View file

@ -16,3 +16,4 @@ ram: 32768
flash: 4096
supported:
- netif:eth
- can

9
boards/arm/mimxrt1024_evk/pinmux.c
View file

@ -88,6 +88,15 @@ static int mimxrt1024_evk_init(const struct device *dev)
GPIO_WritePinOutput(GPIO1, 4, 0);
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(flexcan1), okay) && CONFIG_CAN
/* FlexCAN1 TX, RX */
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_00_FLEXCAN1_TX, 1);
IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_01_FLEXCAN1_RX, 1);
IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_00_FLEXCAN1_TX, 0x10B0u);
IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_01_FLEXCAN1_RX, 0x10B0u);
#endif
return 0;
}