From c5414626dcb0a16ec6ce6229f51b349b0a5be73b Mon Sep 17 00:00:00 2001
From: Marti Bolivar <marti.bolivar@linaro.org>
Date: Wed, 20 Sep 2017 15:46:00 -0400
Subject: [PATCH] dts: nxp_k6x: add flash write-block-size

This makes the SoC flash compatible with the common nonvolatile flash
YAML schema, and provides a write alignment. It mirrors work done on
nRF chips for the DFU subsystem.

Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
---
 dts/arm/nxp/nxp_k6x.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/dts/arm/nxp/nxp_k6x.dtsi b/dts/arm/nxp/nxp_k6x.dtsi
index 000a729a9ff..b53bbd58baf 100644
--- a/dts/arm/nxp/nxp_k6x.dtsi
+++ b/dts/arm/nxp/nxp_k6x.dtsi
@@ -71,7 +71,10 @@
 			#size-cells = <1>;
 
 			flash0: flash@0 {
+				compatible = "soc-nv-flash";
 				reg = <0 0x100000>;
+
+				write-block-size = <8>;
 			};
 		};