drivers/sensor: lsm6dso: Add multi-instance support
Make this driver multi-instance and use the new API.
This commit makes use of some DT macro helpers
In particular:
- get bus devices with DEVICE_DT_GET
- get SPI information with SPI_CONFIG_DT_INST
- get drdy gpios with GPIO_DT_SPEC_GET
Moreover the driver is now using the stmemsc common
routines as requested in issue #33440 and it avoids
the unnecessary declaration of both ctx_i2c and ctx_spi
in the data structure.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
This commit is contained in:
Armando Visconti
Carles Cufí
parent
36eceba7e4
commit
c4b35c1d36
7 changed files with 161 additions and 241 deletions
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@ -11,3 +11,5 @@ zephyr_library_sources_ifdef(CONFIG_LSM6DSO lsm6dso_i2c.c)
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zephyr_library_sources_ifdef(CONFIG_LSM6DSO lsm6dso_spi.c)
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zephyr_library_sources_ifdef(CONFIG_LSM6DSO_SENSORHUB lsm6dso_shub.c)
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zephyr_library_sources_ifdef(CONFIG_LSM6DSO_TRIGGER lsm6dso_trigger.c)
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zephyr_library_include_directories(../stmemsc)
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@ -92,7 +92,7 @@ static inline int lsm6dso_reboot(const struct device *dev)
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{
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struct lsm6dso_data *data = dev->data;
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if (lsm6dso_boot_set(data->ctx, 1) < 0) {
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if (lsm6dso_boot_set(&data->ctx, 1) < 0) {
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return -EIO;
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}
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@ -106,7 +106,7 @@ static int lsm6dso_accel_set_fs_raw(const struct device *dev, uint8_t fs)
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{
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struct lsm6dso_data *data = dev->data;
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if (lsm6dso_xl_full_scale_set(data->ctx, fs) < 0) {
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if (lsm6dso_xl_full_scale_set(&data->ctx, fs) < 0) {
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return -EIO;
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}
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@ -119,7 +119,7 @@ static int lsm6dso_accel_set_odr_raw(const struct device *dev, uint8_t odr)
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{
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struct lsm6dso_data *data = dev->data;
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if (lsm6dso_xl_data_rate_set(data->ctx, odr) < 0) {
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if (lsm6dso_xl_data_rate_set(&data->ctx, odr) < 0) {
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return -EIO;
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}
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@ -132,7 +132,7 @@ static int lsm6dso_gyro_set_fs_raw(const struct device *dev, uint8_t fs)
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{
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struct lsm6dso_data *data = dev->data;
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if (lsm6dso_gy_full_scale_set(data->ctx, fs) < 0) {
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if (lsm6dso_gy_full_scale_set(&data->ctx, fs) < 0) {
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return -EIO;
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}
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@ -143,7 +143,7 @@ static int lsm6dso_gyro_set_odr_raw(const struct device *dev, uint8_t odr)
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{
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struct lsm6dso_data *data = dev->data;
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if (lsm6dso_gy_data_rate_set(data->ctx, odr) < 0) {
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if (lsm6dso_gy_data_rate_set(&data->ctx, odr) < 0) {
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return -EIO;
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}
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@ -303,7 +303,7 @@ static int lsm6dso_sample_fetch_accel(const struct device *dev)
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struct lsm6dso_data *data = dev->data;
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union axis3bit16_t buf;
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if (lsm6dso_acceleration_raw_get(data->ctx, buf.u8bit) < 0) {
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if (lsm6dso_acceleration_raw_get(&data->ctx, buf.u8bit) < 0) {
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LOG_DBG("Failed to read sample");
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return -EIO;
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}
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@ -320,7 +320,7 @@ static int lsm6dso_sample_fetch_gyro(const struct device *dev)
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struct lsm6dso_data *data = dev->data;
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union axis3bit16_t buf;
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if (lsm6dso_angular_rate_raw_get(data->ctx, buf.u8bit) < 0) {
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if (lsm6dso_angular_rate_raw_get(&data->ctx, buf.u8bit) < 0) {
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LOG_DBG("Failed to read sample");
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return -EIO;
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}
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@ -338,7 +338,7 @@ static int lsm6dso_sample_fetch_temp(const struct device *dev)
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struct lsm6dso_data *data = dev->data;
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union axis1bit16_t buf;
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if (lsm6dso_temperature_raw_get(data->ctx, buf.u8bit) < 0) {
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if (lsm6dso_temperature_raw_get(&data->ctx, buf.u8bit) < 0) {
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LOG_DBG("Failed to read sample");
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return -EIO;
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}
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@ -680,7 +680,7 @@ static int lsm6dso_channel_get(const struct device *dev,
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return 0;
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}
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static const struct sensor_driver_api lsm6dso_api_funcs = {
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static const struct sensor_driver_api lsm6dso_driver_api = {
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.attr_set = lsm6dso_attr_set,
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#if CONFIG_LSM6DSO_TRIGGER
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.trigger_set = lsm6dso_trigger_set,
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@ -694,7 +694,7 @@ static int lsm6dso_init_chip(const struct device *dev)
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struct lsm6dso_data *lsm6dso = dev->data;
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uint8_t chip_id;
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if (lsm6dso_device_id_get(lsm6dso->ctx, &chip_id) < 0) {
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if (lsm6dso_device_id_get(&lsm6dso->ctx, &chip_id) < 0) {
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LOG_DBG("Failed reading chip id");
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return -EIO;
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}
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@ -707,7 +707,7 @@ static int lsm6dso_init_chip(const struct device *dev)
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}
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/* reset device */
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if (lsm6dso_reset_set(lsm6dso->ctx, 1) < 0) {
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if (lsm6dso_reset_set(&lsm6dso->ctx, 1) < 0) {
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return -EIO;
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}
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@ -739,12 +739,12 @@ static int lsm6dso_init_chip(const struct device *dev)
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}
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/* Set FIFO bypass mode */
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if (lsm6dso_fifo_mode_set(lsm6dso->ctx, LSM6DSO_BYPASS_MODE) < 0) {
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if (lsm6dso_fifo_mode_set(&lsm6dso->ctx, LSM6DSO_BYPASS_MODE) < 0) {
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LOG_DBG("failed to set FIFO mode");
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return -EIO;
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}
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if (lsm6dso_block_data_update_set(lsm6dso->ctx, 1) < 0) {
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if (lsm6dso_block_data_update_set(&lsm6dso->ctx, 1) < 0) {
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LOG_DBG("failed to set BDU mode");
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return -EIO;
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}
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@ -752,56 +752,17 @@ static int lsm6dso_init_chip(const struct device *dev)
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return 0;
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}
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static struct lsm6dso_data lsm6dso_data;
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static const struct lsm6dso_config lsm6dso_config = {
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.bus_name = DT_INST_BUS_LABEL(0),
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#if DT_ANY_INST_ON_BUS_STATUS_OKAY(spi)
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.bus_init = lsm6dso_spi_init,
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.spi_conf.frequency = DT_INST_PROP(0, spi_max_frequency),
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.spi_conf.operation = (SPI_OP_MODE_MASTER | SPI_MODE_CPOL |
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SPI_MODE_CPHA | SPI_WORD_SET(8) |
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SPI_LINES_SINGLE),
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.spi_conf.slave = DT_INST_REG_ADDR(0),
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#if DT_INST_SPI_DEV_HAS_CS_GPIOS(0)
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.gpio_cs_port = DT_INST_SPI_DEV_CS_GPIOS_LABEL(0),
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.cs_gpio = DT_INST_SPI_DEV_CS_GPIOS_PIN(0),
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.cs_gpio_flags = DT_INST_SPI_DEV_CS_GPIOS_FLAGS(0),
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.spi_conf.cs = &lsm6dso_data.cs_ctrl,
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#else
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.spi_conf.cs = NULL,
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#endif
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#elif DT_ANY_INST_ON_BUS_STATUS_OKAY(i2c)
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.bus_init = lsm6dso_i2c_init,
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.i2c_slv_addr = DT_INST_REG_ADDR(0),
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#else
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#error "BUS MACRO NOT DEFINED IN DTS"
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#endif
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#ifdef CONFIG_LSM6DSO_TRIGGER
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.int_gpio_port = DT_INST_GPIO_LABEL(0, irq_gpios),
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.int_gpio_pin = DT_INST_GPIO_PIN(0, irq_gpios),
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.int_gpio_flags = DT_INST_GPIO_FLAGS(0, irq_gpios),
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.int_pin = DT_INST_PROP(0, int_pin),
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#endif /* CONFIG_LSM6DSO_TRIGGER */
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};
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static int lsm6dso_init(const struct device *dev)
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{
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const struct lsm6dso_config * const config = dev->config;
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const struct lsm6dso_config * const cfg = dev->config;
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struct lsm6dso_data *data = dev->data;
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data->dev = dev;
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data->bus = device_get_binding(config->bus_name);
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if (!data->bus) {
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LOG_DBG("master not found: %s",
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config->bus_name);
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if (cfg->bus_init(dev) < 0) {
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return -EINVAL;
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}
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config->bus_init(dev);
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#ifdef CONFIG_LSM6DSO_TRIGGER
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if (lsm6dso_init_interrupt(dev) < 0) {
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LOG_ERR("Failed to initialize interrupt.");
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@ -824,9 +785,79 @@ static int lsm6dso_init(const struct device *dev)
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return 0;
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}
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#if DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) == 0
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#warning "LSM6DSO driver enabled without any devices"
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#endif
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static struct lsm6dso_data lsm6dso_data;
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/*
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* Device creation macro, shared by LSM6DSO_DEFINE_SPI() and
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* LSM6DSO_DEFINE_I2C().
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*/
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DEVICE_DT_INST_DEFINE(0, lsm6dso_init, device_pm_control_nop,
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&lsm6dso_data, &lsm6dso_config, POST_KERNEL,
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CONFIG_SENSOR_INIT_PRIORITY, &lsm6dso_api_funcs);
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#define LSM6DSO_DEVICE_INIT(inst) \
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DEVICE_DT_INST_DEFINE(inst, \
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lsm6dso_init, \
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device_pm_control_nop, \
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&lsm6dso_data_##inst, \
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&lsm6dso_config_##inst, \
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POST_KERNEL, \
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CONFIG_SENSOR_INIT_PRIORITY, \
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&lsm6dso_driver_api);
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/*
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* Instantiation macros used when a device is on a SPI bus.
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*/
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#ifdef CONFIG_LSM6DSO_TRIGGER
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#define LSM6DSO_CFG_IRQ(inst) \
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.gpio_drdy = GPIO_DT_SPEC_GET(DT_DRV_INST(inst), irq_gpios), \
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.int_pin = DT_INST_PROP(inst, int_pin)
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#else
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#define LSM6DSO_CFG_IRQ(inst)
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#endif /* CONFIG_LSM6DSO_TRIGGER */
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#define LSM6DSO_SPI_OP (SPI_WORD_SET(8) | \
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SPI_OP_MODE_MASTER | \
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SPI_LINES_SINGLE | \
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SPI_MODE_CPOL | \
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SPI_MODE_CPHA) \
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#define LSM6DSO_CONFIG_SPI(inst) \
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{ \
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.stmemsc_cfg.spi.bus = DEVICE_DT_GET(DT_INST_BUS(inst)),\
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.stmemsc_cfg.spi.spi_cfg = \
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SPI_CONFIG_DT_INST(inst, \
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LSM6DSO_SPI_OP, \
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0), \
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.bus_init = lsm6dso_spi_init, \
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COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, irq_gpios), \
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(LSM6DSO_CFG_IRQ(inst)), ()) \
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}
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/*
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* Instantiation macros used when a device is on an I2C bus.
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*/
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#define LSM6DSO_CONFIG_I2C(inst) \
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{ \
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.stmemsc_cfg.i2c.bus = DEVICE_DT_GET(DT_INST_BUS(inst)),\
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.stmemsc_cfg.i2c.i2c_slv_addr = DT_INST_REG_ADDR(inst), \
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.bus_init = lsm6dso_i2c_init, \
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COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, irq_gpios), \
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(LSM6DSO_CFG_IRQ(inst)), ()) \
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}
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/*
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* Main instantiation macro. Use of COND_CODE_1() selects the right
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* bus-specific macro at preprocessor time.
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*/
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#define LSM6DSO_DEFINE(inst) \
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static struct lsm6dso_data lsm6dso_data_##inst; \
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static const struct lsm6dso_config lsm6dso_config_##inst = \
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COND_CODE_1(DT_INST_ON_BUS(inst, spi), \
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(LSM6DSO_CONFIG_SPI(inst)), \
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(LSM6DSO_CONFIG_I2C(inst))); \
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LSM6DSO_DEVICE_INIT(inst)
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DT_INST_FOREACH_STATUS_OKAY(LSM6DSO_DEFINE)
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@ -16,8 +16,17 @@
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#include <drivers/gpio.h>
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#include <drivers/spi.h>
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#include <sys/util.h>
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#include <stmemsc.h>
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#include "lsm6dso_reg.h"
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#if DT_ANY_INST_ON_BUS_STATUS_OKAY(spi)
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#include <drivers/spi.h>
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#endif /* DT_ANY_INST_ON_BUS_STATUS_OKAY(spi) */
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#if DT_ANY_INST_ON_BUS_STATUS_OKAY(i2c)
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#include <drivers/i2c.h>
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#endif /* DT_ANY_INST_ON_BUS_STATUS_OKAY(i2c) */
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union axis3bit16_t {
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int16_t i16bit[3];
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uint8_t u8bit[6];
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@ -92,24 +101,19 @@ union axis1bit16_t {
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#endif
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struct lsm6dso_config {
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char *bus_name;
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union {
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#if DT_ANY_INST_ON_BUS_STATUS_OKAY(i2c)
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const struct stmemsc_cfg_i2c i2c;
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#endif
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#if DT_ANY_INST_ON_BUS_STATUS_OKAY(spi)
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const struct stmemsc_cfg_spi spi;
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#endif
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} stmemsc_cfg;
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int (*bus_init)(const struct device *dev);
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#ifdef CONFIG_LSM6DSO_TRIGGER
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const char *int_gpio_port;
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uint8_t int_gpio_pin;
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uint8_t int_gpio_flags;
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const struct gpio_dt_spec gpio_drdy;
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uint8_t int_pin;
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#endif /* CONFIG_LSM6DSO_TRIGGER */
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#if DT_ANY_INST_ON_BUS_STATUS_OKAY(i2c)
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uint16_t i2c_slv_addr;
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#elif DT_ANY_INST_ON_BUS_STATUS_OKAY(spi)
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struct spi_config spi_conf;
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#if DT_INST_SPI_DEV_HAS_CS_GPIOS(0)
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const char *gpio_cs_port;
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uint8_t cs_gpio;
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uint8_t cs_gpio_flags;
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#endif /* DT_INST_SPI_DEV_HAS_CS_GPIOS(0) */
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#endif /* DT_ANY_INST_ON_BUS_STATUS_OKAY(i2c) */
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};
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union samples {
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@ -139,7 +143,6 @@ struct lsm6dso_tf {
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struct lsm6dso_data {
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const struct device *dev;
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const struct device *bus;
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int16_t acc[3];
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uint32_t acc_gain;
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int16_t gyro[3];
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@ -159,13 +162,7 @@ struct lsm6dso_data {
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} hts221;
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#endif /* CONFIG_LSM6DSO_SENSORHUB */
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stmdev_ctx_t *ctx;
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#if DT_ANY_INST_ON_BUS_STATUS_OKAY(i2c)
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stmdev_ctx_t ctx_i2c;
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#elif DT_ANY_INST_ON_BUS_STATUS_OKAY(spi)
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stmdev_ctx_t ctx_spi;
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#endif
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stmdev_ctx_t ctx;
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uint16_t accel_freq;
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uint8_t accel_fs;
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@ -173,7 +170,6 @@ struct lsm6dso_data {
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uint8_t gyro_fs;
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#ifdef CONFIG_LSM6DSO_TRIGGER
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const struct device *gpio;
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struct gpio_callback gpio_cb;
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sensor_trigger_handler_t handler_drdy_acc;
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sensor_trigger_handler_t handler_drdy_gyr;
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@ -187,10 +183,6 @@ struct lsm6dso_data {
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struct k_work work;
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#endif
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#endif /* CONFIG_LSM6DSO_TRIGGER */
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#if DT_INST_SPI_DEV_HAS_CS_GPIOS(0)
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struct spi_cs_control cs_ctrl;
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#endif
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};
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int lsm6dso_spi_init(const struct device *dev);
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@ -10,43 +10,28 @@
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#define DT_DRV_COMPAT st_lsm6dso
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#include <string.h>
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#include <drivers/i2c.h>
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#include <logging/log.h>
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#include "lsm6dso.h"
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#if DT_ANY_INST_ON_BUS_STATUS_OKAY(i2c)
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LOG_MODULE_DECLARE(LSM6DSO, CONFIG_SENSOR_LOG_LEVEL);
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static int lsm6dso_i2c_read(struct lsm6dso_data *data, uint8_t reg_addr,
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uint8_t *value, uint8_t len)
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{
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const struct lsm6dso_config *cfg = data->dev->config;
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return i2c_burst_read(data->bus, cfg->i2c_slv_addr,
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reg_addr, value, len);
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}
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static int lsm6dso_i2c_write(struct lsm6dso_data *data, uint8_t reg_addr,
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uint8_t *value, uint8_t len)
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||||
{
|
||||
const struct lsm6dso_config *cfg = data->dev->config;
|
||||
|
||||
return i2c_burst_write(data->bus, cfg->i2c_slv_addr,
|
||||
reg_addr, value, len);
|
||||
}
|
||||
|
||||
int lsm6dso_i2c_init(const struct device *dev)
|
||||
{
|
||||
struct lsm6dso_data *data = dev->data;
|
||||
const struct lsm6dso_config *cfg = dev->config;
|
||||
|
||||
data->ctx_i2c.read_reg = (stmdev_read_ptr) lsm6dso_i2c_read,
|
||||
data->ctx_i2c.write_reg = (stmdev_write_ptr) lsm6dso_i2c_write,
|
||||
if (!device_is_ready(cfg->stmemsc_cfg.i2c.bus)) {
|
||||
LOG_ERR("Cannot get pointer to bus device");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
data->ctx = &data->ctx_i2c;
|
||||
data->ctx->handle = data;
|
||||
/* Use generic stmemsc routine for read/write I2C bus */
|
||||
data->ctx.read_reg = (stmdev_read_ptr) stmemsc_i2c_read,
|
||||
data->ctx.write_reg = (stmdev_write_ptr) stmemsc_i2c_write,
|
||||
|
||||
data->ctx.handle = (void *)&cfg->stmemsc_cfg.i2c;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -428,9 +428,9 @@ static inline void lsm6dso_shub_wait_completed(struct lsm6dso_data *data)
|
|||
static inline void lsm6dso_shub_embedded_en(struct lsm6dso_data *data, bool on)
|
||||
{
|
||||
if (on) {
|
||||
(void) lsm6dso_mem_bank_set(data->ctx, LSM6DSO_SENSOR_HUB_BANK);
|
||||
(void) lsm6dso_mem_bank_set(&data->ctx, LSM6DSO_SENSOR_HUB_BANK);
|
||||
} else {
|
||||
(void) lsm6dso_mem_bank_set(data->ctx, LSM6DSO_USER_BANK);
|
||||
(void) lsm6dso_mem_bank_set(&data->ctx, LSM6DSO_USER_BANK);
|
||||
}
|
||||
|
||||
k_busy_wait(150);
|
||||
|
|
@ -442,7 +442,7 @@ static int lsm6dso_shub_read_embedded_regs(struct lsm6dso_data *data,
|
|||
{
|
||||
lsm6dso_shub_embedded_en(data, true);
|
||||
|
||||
if (lsm6dso_read_reg(data->ctx, reg_addr, value, len) < 0) {
|
||||
if (lsm6dso_read_reg(&data->ctx, reg_addr, value, len) < 0) {
|
||||
LOG_DBG("shub: failed to read external reg: %02x", reg_addr);
|
||||
lsm6dso_shub_embedded_en(data, false);
|
||||
return -EIO;
|
||||
|
|
@ -459,7 +459,7 @@ static int lsm6dso_shub_write_embedded_regs(struct lsm6dso_data *data,
|
|||
{
|
||||
lsm6dso_shub_embedded_en(data, true);
|
||||
|
||||
if (lsm6dso_write_reg(data->ctx, reg_addr, value, len) < 0) {
|
||||
if (lsm6dso_write_reg(&data->ctx, reg_addr, value, len) < 0) {
|
||||
LOG_DBG("shub: failed to write external reg: %02x", reg_addr);
|
||||
lsm6dso_shub_embedded_en(data, false);
|
||||
return -EIO;
|
||||
|
|
@ -476,7 +476,7 @@ static void lsm6dso_shub_enable(struct lsm6dso_data *data, uint8_t enable)
|
|||
if (!data->accel_freq) {
|
||||
uint8_t odr = (enable) ? 2 : 0;
|
||||
|
||||
if (lsm6dso_xl_data_rate_set(data->ctx, odr) < 0) {
|
||||
if (lsm6dso_xl_data_rate_set(&data->ctx, odr) < 0) {
|
||||
LOG_DBG("shub: failed to set XL sampling rate");
|
||||
return;
|
||||
}
|
||||
|
|
@ -484,7 +484,7 @@ static void lsm6dso_shub_enable(struct lsm6dso_data *data, uint8_t enable)
|
|||
|
||||
lsm6dso_shub_embedded_en(data, true);
|
||||
|
||||
if (lsm6dso_sh_master_set(data->ctx, enable) < 0) {
|
||||
if (lsm6dso_sh_master_set(&data->ctx, enable) < 0) {
|
||||
LOG_DBG("shub: failed to set master on");
|
||||
lsm6dso_shub_embedded_en(data, false);
|
||||
return;
|
||||
|
|
@ -537,7 +537,7 @@ static int lsm6dso_shub_read_slave_reg(struct lsm6dso_data *data,
|
|||
|
||||
/* read data from external slave */
|
||||
lsm6dso_shub_embedded_en(data, true);
|
||||
if (lsm6dso_read_reg(data->ctx, LSM6DSO_SHUB_DATA_OUT,
|
||||
if (lsm6dso_read_reg(&data->ctx, LSM6DSO_SHUB_DATA_OUT,
|
||||
value, len) < 0) {
|
||||
LOG_DBG("shub: error reading sensor data");
|
||||
return -EIO;
|
||||
|
|
@ -642,14 +642,14 @@ static int lsm6dso_shub_set_data_channel(struct lsm6dso_data *data)
|
|||
/* Configure the master */
|
||||
lsm6dso_aux_sens_on_t aux = LSM6DSO_SLV_0_1_2;
|
||||
|
||||
if (lsm6dso_sh_slave_connected_set(data->ctx, aux) < 0) {
|
||||
if (lsm6dso_sh_slave_connected_set(&data->ctx, aux) < 0) {
|
||||
LOG_DBG("shub: error setting aux sensors");
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
lsm6dso_write_once_t wo = LSM6DSO_ONLY_FIRST_CYCLE;
|
||||
|
||||
if (lsm6dso_sh_write_mode_set(data->ctx, wo) < 0) {
|
||||
if (lsm6dso_sh_write_mode_set(&data->ctx, wo) < 0) {
|
||||
LOG_DBG("shub: error setting write once");
|
||||
return -EIO;
|
||||
}
|
||||
|
|
@ -689,7 +689,7 @@ int lsm6dso_shub_fetch_external_devs(const struct device *dev)
|
|||
for (n = 0; n < num_ext_dev; n++) {
|
||||
sp = &lsm6dso_shub_slist[shub_ext[n]];
|
||||
|
||||
if (lsm6dso_read_reg(data->ctx, sp->sh_out_reg,
|
||||
if (lsm6dso_read_reg(&data->ctx, sp->sh_out_reg,
|
||||
data->ext_data[n], sp->out_data_len) < 0) {
|
||||
LOG_DBG("shub: failed to read sample");
|
||||
return -EIO;
|
||||
|
|
|
|||
|
|
@ -10,117 +10,28 @@
|
|||
|
||||
#define DT_DRV_COMPAT st_lsm6dso
|
||||
|
||||
#include <string.h>
|
||||
#include "lsm6dso.h"
|
||||
#include <logging/log.h>
|
||||
|
||||
#if DT_ANY_INST_ON_BUS_STATUS_OKAY(spi)
|
||||
|
||||
#define LSM6DSO_SPI_READ (1 << 7)
|
||||
|
||||
LOG_MODULE_DECLARE(LSM6DSO, CONFIG_SENSOR_LOG_LEVEL);
|
||||
|
||||
static int lsm6dso_spi_read(struct lsm6dso_data *data, uint8_t reg_addr,
|
||||
uint8_t *value, uint8_t len)
|
||||
{
|
||||
const struct lsm6dso_config *cfg = data->dev->config;
|
||||
const struct spi_config *spi_cfg = &cfg->spi_conf;
|
||||
uint8_t buffer_tx[2] = { reg_addr | LSM6DSO_SPI_READ, 0 };
|
||||
const struct spi_buf tx_buf = {
|
||||
.buf = buffer_tx,
|
||||
.len = 2,
|
||||
};
|
||||
const struct spi_buf_set tx = {
|
||||
.buffers = &tx_buf,
|
||||
.count = 1
|
||||
};
|
||||
const struct spi_buf rx_buf[2] = {
|
||||
{
|
||||
.buf = NULL,
|
||||
.len = 1,
|
||||
},
|
||||
{
|
||||
.buf = value,
|
||||
.len = len,
|
||||
}
|
||||
};
|
||||
const struct spi_buf_set rx = {
|
||||
.buffers = rx_buf,
|
||||
.count = 2
|
||||
};
|
||||
|
||||
|
||||
if (len > 64) {
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
if (spi_transceive(data->bus, spi_cfg, &tx, &rx)) {
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int lsm6dso_spi_write(struct lsm6dso_data *data, uint8_t reg_addr,
|
||||
uint8_t *value, uint8_t len)
|
||||
{
|
||||
const struct lsm6dso_config *cfg = data->dev->config;
|
||||
const struct spi_config *spi_cfg = &cfg->spi_conf;
|
||||
uint8_t buffer_tx[1] = { reg_addr & ~LSM6DSO_SPI_READ };
|
||||
const struct spi_buf tx_buf[2] = {
|
||||
{
|
||||
.buf = buffer_tx,
|
||||
.len = 1,
|
||||
},
|
||||
{
|
||||
.buf = value,
|
||||
.len = len,
|
||||
}
|
||||
};
|
||||
const struct spi_buf_set tx = {
|
||||
.buffers = tx_buf,
|
||||
.count = 2
|
||||
};
|
||||
|
||||
|
||||
if (len > 64) {
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
if (spi_write(data->bus, spi_cfg, &tx)) {
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int lsm6dso_spi_init(const struct device *dev)
|
||||
{
|
||||
struct lsm6dso_data *data = dev->data;
|
||||
|
||||
data->ctx_spi.read_reg = (stmdev_read_ptr) lsm6dso_spi_read;
|
||||
data->ctx_spi.write_reg = (stmdev_write_ptr) lsm6dso_spi_write;
|
||||
|
||||
data->ctx = &data->ctx_spi;
|
||||
data->ctx->handle = data;
|
||||
|
||||
#if DT_INST_SPI_DEV_HAS_CS_GPIOS(0)
|
||||
const struct lsm6dso_config *cfg = dev->config;
|
||||
|
||||
/* handle SPI CS thru GPIO if it is the case */
|
||||
data->cs_ctrl.gpio_dev = device_get_binding(cfg->gpio_cs_port);
|
||||
if (!data->cs_ctrl.gpio_dev) {
|
||||
LOG_ERR("Unable to get GPIO SPI CS device");
|
||||
if (!device_is_ready(cfg->stmemsc_cfg.spi.bus)) {
|
||||
LOG_ERR("Cannot get pointer to bus device");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
data->cs_ctrl.gpio_pin = cfg->cs_gpio;
|
||||
data->cs_ctrl.gpio_dt_flags = cfg->cs_gpio_flags;
|
||||
data->cs_ctrl.delay = 0;
|
||||
/* Use generic stmemsc routine for read/write SPI bus */
|
||||
data->ctx.read_reg = (stmdev_read_ptr) stmemsc_spi_read;
|
||||
data->ctx.write_reg = (stmdev_write_ptr) stmemsc_spi_write;
|
||||
|
||||
LOG_DBG("SPI GPIO CS configured on %s:%u",
|
||||
cfg->gpio_cs_port, cfg->cs_gpio);
|
||||
#endif
|
||||
data->ctx.handle = (void *)&cfg->stmemsc_cfg.spi;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -33,17 +33,17 @@ static int lsm6dso_enable_t_int(const struct device *dev, int enable)
|
|||
union axis1bit16_t buf;
|
||||
|
||||
/* dummy read: re-trigger interrupt */
|
||||
lsm6dso_temperature_raw_get(lsm6dso->ctx, buf.u8bit);
|
||||
lsm6dso_temperature_raw_get(&lsm6dso->ctx, buf.u8bit);
|
||||
}
|
||||
|
||||
/* set interrupt (TEMP DRDY interrupt is only on INT2) */
|
||||
if (cfg->int_pin == 1)
|
||||
return -EIO;
|
||||
|
||||
lsm6dso_read_reg(lsm6dso->ctx, LSM6DSO_INT2_CTRL,
|
||||
lsm6dso_read_reg(&lsm6dso->ctx, LSM6DSO_INT2_CTRL,
|
||||
(uint8_t *)&int2_ctrl, 1);
|
||||
int2_route.int2_ctrl.int2_drdy_temp = enable;
|
||||
return lsm6dso_write_reg(lsm6dso->ctx, LSM6DSO_INT2_CTRL,
|
||||
return lsm6dso_write_reg(&lsm6dso->ctx, LSM6DSO_INT2_CTRL,
|
||||
(uint8_t *)&int2_ctrl, 1);
|
||||
}
|
||||
#endif
|
||||
|
|
@ -60,26 +60,26 @@ static int lsm6dso_enable_xl_int(const struct device *dev, int enable)
|
|||
union axis3bit16_t buf;
|
||||
|
||||
/* dummy read: re-trigger interrupt */
|
||||
lsm6dso_acceleration_raw_get(lsm6dso->ctx, buf.u8bit);
|
||||
lsm6dso_acceleration_raw_get(&lsm6dso->ctx, buf.u8bit);
|
||||
}
|
||||
|
||||
/* set interrupt */
|
||||
if (cfg->int_pin == 1) {
|
||||
lsm6dso_int1_ctrl_t int1_ctrl;
|
||||
|
||||
lsm6dso_read_reg(lsm6dso->ctx, LSM6DSO_INT1_CTRL,
|
||||
lsm6dso_read_reg(&lsm6dso->ctx, LSM6DSO_INT1_CTRL,
|
||||
(uint8_t *)&int1_ctrl, 1);
|
||||
|
||||
int1_ctrl.int1_drdy_xl = enable;
|
||||
return lsm6dso_write_reg(lsm6dso->ctx, LSM6DSO_INT1_CTRL,
|
||||
return lsm6dso_write_reg(&lsm6dso->ctx, LSM6DSO_INT1_CTRL,
|
||||
(uint8_t *)&int1_ctrl, 1);
|
||||
} else {
|
||||
lsm6dso_int2_ctrl_t int2_ctrl;
|
||||
|
||||
lsm6dso_read_reg(lsm6dso->ctx, LSM6DSO_INT2_CTRL,
|
||||
lsm6dso_read_reg(&lsm6dso->ctx, LSM6DSO_INT2_CTRL,
|
||||
(uint8_t *)&int2_ctrl, 1);
|
||||
int2_ctrl.int2_drdy_xl = enable;
|
||||
return lsm6dso_write_reg(lsm6dso->ctx, LSM6DSO_INT2_CTRL,
|
||||
return lsm6dso_write_reg(&lsm6dso->ctx, LSM6DSO_INT2_CTRL,
|
||||
(uint8_t *)&int2_ctrl, 1);
|
||||
}
|
||||
}
|
||||
|
|
@ -96,25 +96,25 @@ static int lsm6dso_enable_g_int(const struct device *dev, int enable)
|
|||
union axis3bit16_t buf;
|
||||
|
||||
/* dummy read: re-trigger interrupt */
|
||||
lsm6dso_angular_rate_raw_get(lsm6dso->ctx, buf.u8bit);
|
||||
lsm6dso_angular_rate_raw_get(&lsm6dso->ctx, buf.u8bit);
|
||||
}
|
||||
|
||||
/* set interrupt */
|
||||
if (cfg->int_pin == 1) {
|
||||
lsm6dso_int1_ctrl_t int1_ctrl;
|
||||
|
||||
lsm6dso_read_reg(lsm6dso->ctx, LSM6DSO_INT1_CTRL,
|
||||
lsm6dso_read_reg(&lsm6dso->ctx, LSM6DSO_INT1_CTRL,
|
||||
(uint8_t *)&int1_ctrl, 1);
|
||||
int1_ctrl.int1_drdy_g = enable;
|
||||
return lsm6dso_write_reg(lsm6dso->ctx, LSM6DSO_INT1_CTRL,
|
||||
return lsm6dso_write_reg(&lsm6dso->ctx, LSM6DSO_INT1_CTRL,
|
||||
(uint8_t *)&int1_ctrl, 1);
|
||||
} else {
|
||||
lsm6dso_int2_ctrl_t int2_ctrl;
|
||||
|
||||
lsm6dso_read_reg(lsm6dso->ctx, LSM6DSO_INT2_CTRL,
|
||||
lsm6dso_read_reg(&lsm6dso->ctx, LSM6DSO_INT2_CTRL,
|
||||
(uint8_t *)&int2_ctrl, 1);
|
||||
int2_ctrl.int2_drdy_g = enable;
|
||||
return lsm6dso_write_reg(lsm6dso->ctx, LSM6DSO_INT2_CTRL,
|
||||
return lsm6dso_write_reg(&lsm6dso->ctx, LSM6DSO_INT2_CTRL,
|
||||
(uint8_t *)&int2_ctrl, 1);
|
||||
}
|
||||
}
|
||||
|
|
@ -171,7 +171,7 @@ static void lsm6dso_handle_interrupt(const struct device *dev)
|
|||
lsm6dso_status_reg_t status;
|
||||
|
||||
while (1) {
|
||||
if (lsm6dso_status_reg_get(lsm6dso->ctx, &status) < 0) {
|
||||
if (lsm6dso_status_reg_get(&lsm6dso->ctx, &status) < 0) {
|
||||
LOG_DBG("failed reading status reg");
|
||||
return;
|
||||
}
|
||||
|
|
@ -199,7 +199,7 @@ static void lsm6dso_handle_interrupt(const struct device *dev)
|
|||
#endif
|
||||
}
|
||||
|
||||
gpio_pin_interrupt_configure(lsm6dso->gpio, cfg->int_gpio_pin,
|
||||
gpio_pin_interrupt_configure(cfg->gpio_drdy.port, cfg->gpio_drdy.pin,
|
||||
GPIO_INT_EDGE_TO_ACTIVE);
|
||||
}
|
||||
|
||||
|
|
@ -212,7 +212,7 @@ static void lsm6dso_gpio_callback(const struct device *dev,
|
|||
|
||||
ARG_UNUSED(pins);
|
||||
|
||||
gpio_pin_interrupt_configure(lsm6dso->gpio, cfg->int_gpio_pin,
|
||||
gpio_pin_interrupt_configure(cfg->gpio_drdy.port, cfg->gpio_drdy.pin,
|
||||
GPIO_INT_DISABLE);
|
||||
|
||||
#if defined(CONFIG_LSM6DSO_TRIGGER_OWN_THREAD)
|
||||
|
|
@ -249,10 +249,8 @@ int lsm6dso_init_interrupt(const struct device *dev)
|
|||
int ret;
|
||||
|
||||
/* setup data ready gpio interrupt (INT1 or INT2) */
|
||||
lsm6dso->gpio = device_get_binding(cfg->int_gpio_port);
|
||||
if (lsm6dso->gpio == NULL) {
|
||||
LOG_DBG("Cannot get pointer to %s device",
|
||||
cfg->int_gpio_port);
|
||||
if (!device_is_ready(cfg->gpio_drdy.port)) {
|
||||
LOG_ERR("Cannot get pointer to drdy_gpio device");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
|
|
@ -268,8 +266,8 @@ int lsm6dso_init_interrupt(const struct device *dev)
|
|||
lsm6dso->work.handler = lsm6dso_work_cb;
|
||||
#endif /* CONFIG_LSM6DSO_TRIGGER_OWN_THREAD */
|
||||
|
||||
ret = gpio_pin_configure(lsm6dso->gpio, cfg->int_gpio_pin,
|
||||
GPIO_INPUT | cfg->int_gpio_flags);
|
||||
ret = gpio_pin_configure(cfg->gpio_drdy.port, cfg->gpio_drdy.pin,
|
||||
GPIO_INPUT | cfg->gpio_drdy.dt_flags);
|
||||
if (ret < 0) {
|
||||
LOG_DBG("Could not configure gpio");
|
||||
return ret;
|
||||
|
|
@ -277,20 +275,21 @@ int lsm6dso_init_interrupt(const struct device *dev)
|
|||
|
||||
gpio_init_callback(&lsm6dso->gpio_cb,
|
||||
lsm6dso_gpio_callback,
|
||||
BIT(cfg->int_gpio_pin));
|
||||
BIT(cfg->gpio_drdy.pin));
|
||||
|
||||
if (gpio_add_callback(lsm6dso->gpio, &lsm6dso->gpio_cb) < 0) {
|
||||
if (gpio_add_callback(cfg->gpio_drdy.port, &lsm6dso->gpio_cb) < 0) {
|
||||
LOG_DBG("Could not set gpio callback");
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
/* enable interrupt on int1/int2 in pulse mode */
|
||||
if (lsm6dso_int_notification_set(lsm6dso->ctx,
|
||||
if (lsm6dso_int_notification_set(&lsm6dso->ctx,
|
||||
LSM6DSO_ALL_INT_PULSED) < 0) {
|
||||
LOG_DBG("Could not set pulse mode");
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
return gpio_pin_interrupt_configure(lsm6dso->gpio, cfg->int_gpio_pin,
|
||||
return gpio_pin_interrupt_configure(cfg->gpio_drdy.port,
|
||||
cfg->gpio_drdy.pin,
|
||||
GPIO_INT_EDGE_TO_ACTIVE);
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue