driver: arcv2_timer0: fixes and optimize the timer driver
* MIN_DELAY: 1024 -> 512 * optimzie some code sequence * fix a bug in setting the new timer limit value * case: before set limit register with new value, if counter rolls back to 0, the limit value should be adjusted. Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
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1 changed files with 11 additions and 5 deletions
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@ -22,7 +22,7 @@
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#define _ARC_V2_TMR_CTRL_IP 0x8 /* interrupt pending flag */
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#define _ARC_V2_TMR_CTRL_IP 0x8 /* interrupt pending flag */
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/* Minimum cycles in the future to try to program. */
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/* Minimum cycles in the future to try to program. */
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#define MIN_DELAY 1024
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#define MIN_DELAY 512
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#define COUNTER_MAX 0xffffffff
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#define COUNTER_MAX 0xffffffff
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#define TIMER_STOPPED 0x0
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#define TIMER_STOPPED 0x0
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#define CYC_PER_TICK (CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC \
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#define CYC_PER_TICK (CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC \
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@ -160,7 +160,6 @@ int z_clock_driver_init(struct device *device)
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/* ensure that the timer will not generate interrupts */
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/* ensure that the timer will not generate interrupts */
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timer0_control_register_set(0);
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timer0_control_register_set(0);
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timer0_count_register_set(0);
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last_load = CYC_PER_TICK;
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last_load = CYC_PER_TICK;
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@ -168,6 +167,7 @@ int z_clock_driver_init(struct device *device)
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_timer_int_handler, NULL, 0);
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_timer_int_handler, NULL, 0);
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timer0_limit_register_set(last_load - 1);
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timer0_limit_register_set(last_load - 1);
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timer0_count_register_set(0);
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timer0_control_register_set(_ARC_V2_TMR_CTRL_NH | _ARC_V2_TMR_CTRL_IE);
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timer0_control_register_set(_ARC_V2_TMR_CTRL_NH | _ARC_V2_TMR_CTRL_IE);
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/* everything has been configured: safe to enable the interrupt */
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/* everything has been configured: safe to enable the interrupt */
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@ -205,10 +205,16 @@ void z_clock_set_timeout(s32_t ticks, bool idle)
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/* Round delay up to next tick boundary */
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/* Round delay up to next tick boundary */
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delay = ((delay + CYC_PER_TICK - 1) / CYC_PER_TICK) * CYC_PER_TICK;
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delay = ((delay + CYC_PER_TICK - 1) / CYC_PER_TICK) * CYC_PER_TICK;
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last_load = delay;
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timer0_limit_register_set(last_load - 1);
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if (last_load != delay) {
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timer0_control_register_set(_ARC_V2_TMR_CTRL_NH | _ARC_V2_TMR_CTRL_IE);
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if (timer0_control_register_get() & _ARC_V2_TMR_CTRL_IP) {
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delay -= last_load;
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}
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timer0_limit_register_set(delay - 1);
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last_load = delay;
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timer0_control_register_set(_ARC_V2_TMR_CTRL_NH |
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_ARC_V2_TMR_CTRL_IE);
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}
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k_spin_unlock(&lock, key);
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k_spin_unlock(&lock, key);
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#endif
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#endif
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