boards: nordic: Add support for Thingy:53 as thingy53_nrf5340 board
Adding Thingy53 board with all required files including: - Kconfigs - dts - yamls - cmake - doc Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no> Signed-off-by: Georgios Titas <georgios.titas@nordicsemi.no>
This commit is contained in:
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18 changed files with 1104 additions and 0 deletions
7
boards/arm/thingy53_nrf5340/CMakeLists.txt
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7
boards/arm/thingy53_nrf5340/CMakeLists.txt
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# Copyright (c) 2021 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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if (CONFIG_BOARD_THINGY53_NRF5340_CPUAPP OR CONFIG_BOARD_THINGY53_NRF5340_CPUAPPNS)
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zephyr_library()
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zephyr_library_sources(board.c)
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endif()
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108
boards/arm/thingy53_nrf5340/Kconfig
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108
boards/arm/thingy53_nrf5340/Kconfig
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# Thingy53 NRF5340 board configuration
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# Copyright (c) 2021 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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config THINGY53_MISO_WORKAROUND
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bool "MISO workaround"
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default SPI
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help
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Workaround SPI bus MISO issues. The workaround sets dedicated pin
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high in order to avoid voltage drops on the SPI MISO line.
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config THINGY53_INIT_PRIORITY
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int "Init priority"
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default 80
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help
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Initialization priority of the Thingy:53.
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config IPM_NRFX
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default IPM
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config RPMSG_SERVICE_DUAL_IPM_SUPPORT
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default RPMSG_SERVICE
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if RPMSG_SERVICE_DUAL_IPM_SUPPORT
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config IPM_MSG_CH_0_ENABLE
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default y
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config IPM_MSG_CH_1_ENABLE
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default y
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config RPMSG_SERVICE_IPM_TX_NAME
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default "IPM_0" if RPMSG_SERVICE_MODE_MASTER
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default "IPM_1" if RPMSG_SERVICE_MODE_REMOTE
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config RPMSG_SERVICE_IPM_RX_NAME
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default "IPM_1" if RPMSG_SERVICE_MODE_MASTER
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default "IPM_0" if RPMSG_SERVICE_MODE_REMOTE
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config IPM_MSG_CH_0_TX
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default RPMSG_SERVICE_MODE_MASTER
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config IPM_MSG_CH_0_RX
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default RPMSG_SERVICE_MODE_REMOTE
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config IPM_MSG_CH_1_TX
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default RPMSG_SERVICE_MODE_REMOTE
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config IPM_MSG_CH_1_RX
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default RPMSG_SERVICE_MODE_MASTER
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endif # RPMSG_SERVICE_DUAL_IPM_SUPPORT
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if BOARD_THINGY53_NRF5340_CPUAPP || BOARD_THINGY53_NRF5340_CPUAPPNS
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config BOARD_ENABLE_DCDC_APP
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bool "Enable Application MCU DCDC converter"
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select SOC_DCDC_NRF53X_APP
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default y
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config BOARD_ENABLE_DCDC_NET
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bool "Enable Network MCU DCDC converter"
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select SOC_DCDC_NRF53X_NET
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default y
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config BOARD_ENABLE_DCDC_HV
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bool "Enable High Voltage DCDC converter"
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select SOC_DCDC_NRF53X_HV
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default y
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config BOARD_ENABLE_CPUNET
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bool "Enable nRF53 Network MCU"
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help
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This option enables releasing the Network 'force off' signal, which
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as a consequence will power up the Network MCU during system boot.
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Additionally, the option allocates GPIO pins that will be used by UARTE
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of the Network MCU.
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Note: GPIO pin allocation can only be configured by the secure Application
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MCU firmware, so when this option is used with the non-secure version of
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the board, the application needs to take into consideration, that the
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secure firmware image must already have configured GPIO allocation for the
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Network MCU.
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default y if (BT || NRF_802154_SER_HOST)
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config DOMAIN_CPUNET_BOARD
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string
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default "thingy53_nrf5340_cpunet"
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depends on BOARD_ENABLE_CPUNET
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help
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The board which will be used for CPUNET domain when creating a multi
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image application where one or more images should be located on
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another board. For example hci_rpmsg on the nRF5340_cpunet for
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Bluetooth applications.
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endif # BOARD_THINGY53_NRF5340_CPUAPP || BOARD_THINGY53_NRF5340_CPUAPPNS
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if BOARD_THINGY53_NRF5340_CPUNET
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config DOMAIN_CPUAPP_BOARD
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string
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default "thingy53_nrf5340_cpuapp"
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help
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The board which will be used for CPUAPP domain when creating a multi
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image application where one or more images should be located on
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another board.
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endif # BOARD_THINGY53_NRF5340_CPUNET
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21
boards/arm/thingy53_nrf5340/Kconfig.board
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boards/arm/thingy53_nrf5340/Kconfig.board
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# Thingy53 NRF5340 board configuration
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# Copyright (c) 2021 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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if SOC_NRF5340_CPUAPP_QKAA
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config BOARD_THINGY53_NRF5340_CPUAPP
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bool "Thingy53 nRF5340 Application MCU"
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config BOARD_THINGY53_NRF5340_CPUAPPNS
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bool "Thingy53 nRF5340 Application MCU non-secure"
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endif # SOC_NRF5340_CPUAPP_QKAA
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if SOC_NRF5340_CPUNET_QKAA
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config BOARD_THINGY53_NRF5340_CPUNET
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bool "Thingy53 nRF5340 Network MCU"
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endif # SOC_NRF5340_CPUNET_QKAA
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101
boards/arm/thingy53_nrf5340/Kconfig.defconfig
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101
boards/arm/thingy53_nrf5340/Kconfig.defconfig
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# Thingy53 NRF5340 board configuration
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# Copyright (c) 2021 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_THINGY53_NRF5340_CPUAPP || BOARD_THINGY53_NRF5340_CPUAPPNS
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config BOARD
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default "thingy53_nrf5340_cpuapp"
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# Code Partition:
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#
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# For the secure version of the board the firmware is linked at the beginning
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# of the flash, or into the code-partition defined in DT if it is intended to
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# be loaded by MCUboot. If the secure firmware is to be combined with a non-
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# secure image (TRUSTED_EXECUTION_SECURE=y), the secure FW image shall always
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# be restricted to the size of its code partition.
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#
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# For the non-secure version of the board, the firmware
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# must be linked into the code-partition (non-secure) defined in DT, regardless.
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# Apply this configuration below by setting the Kconfig symbols used by
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# the linker according to the information extracted from DT partitions.
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# SRAM Partition:
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#
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# If the secure firmware is to be combined with a non-secure image
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# (TRUSTED_EXECUTION_SECURE=y), the secure FW image SRAM shall always
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# be restricted to the secure image SRAM partition (sram-secure-partition).
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# Otherwise (if TRUSTED_EXECUTION_SECURE is not set) the whole zephyr,sram
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# may be used by the image.
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#
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# For the non-secure version of the board, the firmware image SRAM is
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# always restricted to the allocated non-secure SRAM partition.
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#
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# Workaround for not being able to have commas in macro arguments
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DT_CHOSEN_Z_CODE_PARTITION := zephyr,code-partition
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DT_CHOSEN_Z_SRAM_PARTITION := zephyr,sram-secure-partition
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if BOARD_THINGY53_NRF5340_CPUAPP && TRUSTED_EXECUTION_SECURE
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config FLASH_LOAD_SIZE
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default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
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config SRAM_SIZE
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default $(dt_chosen_reg_size_int,$(DT_CHOSEN_Z_SRAM_PARTITION),0,K)
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endif # BOARD_THINGY53_NRF5340_CPUAPP && TRUSTED_EXECUTION_SECURE
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if BOARD_THINGY53_NRF5340_CPUAPPNS
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config FLASH_LOAD_OFFSET
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default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
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config FLASH_LOAD_SIZE
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default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
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endif # BOARD_THINGY53_NRF5340_CPUAPPNS
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if !TRUSTED_EXECUTION_SECURE
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choice BT_HCI_BUS_TYPE
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default BT_RPMSG if BT
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endchoice
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config HEAP_MEM_POOL_SIZE
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default 4096 if BT_RPMSG
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config BT_HAS_HCI_VS
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default BT
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config USB_NRFX
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default USB
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config USB_DEVICE_STACK
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default USB
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config I2C
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default y
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config SPI
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default y
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config REGULATOR
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default y
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endif # !TRUSTED_EXECUTION_SECURE
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endif # BOARD_THINGY53_NRF5340_CPUAPP || BOARD_THINGY53_NRF5340_CPUAPPNS
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if BOARD_THINGY53_NRF5340_CPUNET
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config BOARD
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default "thingy53_nrf5340_cpunet"
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config BT_CTLR
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default BT
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config BT_ECC
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default BT
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endif # BOARD_THINGY53_NRF5340_CPUNET
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158
boards/arm/thingy53_nrf5340/board.c
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158
boards/arm/thingy53_nrf5340/board.c
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/*
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* Copyright (c) 2021 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <init.h>
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#include <hal/nrf_gpio.h>
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#include <nrfx.h>
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#include <device.h>
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#include <drivers/gpio.h>
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#include <logging/log.h>
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LOG_MODULE_REGISTER(thingy53_board_init);
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#define NRF21540FEM_CTRL_NODE DT_NODELABEL(nrf21540fem_ctrl)
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#define NRF21540FEM_CTRL_PDN_GPIO_NODE DT_GPIO_CTLR(NRF21540FEM_CTRL_NODE, pdn_gpios)
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#define NRF21540FEM_CTRL_PDN_PIN DT_GPIO_PIN(NRF21540FEM_CTRL_NODE, pdn_gpios)
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#define NRF21540FEM_CTRL_PDN_FLAGS DT_GPIO_FLAGS(NRF21540FEM_CTRL_NODE, pdn_gpios)
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#define ADXL362_NODE DT_NODELABEL(adxl362)
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#define ADXL362_GPIO_NODE DT_SPI_DEV_CS_GPIOS_CTLR(ADXL362_NODE)
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#define ADXL362_CS DT_SPI_DEV_CS_GPIOS_PIN(ADXL362_NODE)
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#define ADXL362_FLAGS DT_SPI_DEV_CS_GPIOS_FLAGS(ADXL362_NODE)
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#define BMI270_NODE DT_NODELABEL(bmi270)
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#define BMI270_GPIO_NODE DT_SPI_DEV_CS_GPIOS_CTLR(BMI270_NODE)
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#define BMI270_CS DT_SPI_DEV_CS_GPIOS_PIN(BMI270_NODE)
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#define BMI270_FLAGS DT_SPI_DEV_CS_GPIOS_FLAGS(BMI270_NODE)
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#define NRF21540FEM_NODE DT_NODELABEL(nrf21540fem)
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#define NRF21540FEM_GPIO_NODE DT_SPI_DEV_CS_GPIOS_CTLR(NRF21540FEM_NODE)
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#define NRF21540FEM_CS DT_SPI_DEV_CS_GPIOS_PIN(NRF21540FEM_NODE)
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#define NRF21540FEM_FLAGS DT_SPI_DEV_CS_GPIOS_FLAGS(NRF21540FEM_NODE)
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/* Initialization chain of Thingy:53 board requires some delays before on board sensors
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* could be accessed after power up. In particular bme680 and bmm150 sensors require,
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* respectively 2ms and 1ms power on delay. In order to avoid delays sum, common delay is
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* introduced in the board start up file. Below asserts ensure correct initialization order:
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* on board regulators, board init (this), sensors init.
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*/
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BUILD_ASSERT(CONFIG_THINGY53_INIT_PRIORITY > CONFIG_REGULATOR_FIXED_INIT_PRIORITY,
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"CONFIG_THINGY53_INIT_PRIORITY must be higher than CONFIG_REGULATOR_FIXED_INIT_PRIORITY");
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#if defined(CONFIG_SENSOR)
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BUILD_ASSERT(CONFIG_THINGY53_INIT_PRIORITY < CONFIG_SENSOR_INIT_PRIORITY,
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"CONFIG_THINGY53_INIT_PRIORITY must be less than CONFIG_SENSOR_INIT_PRIORITY");
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#endif
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static void enable_cpunet(void)
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{
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#if !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE)
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/* Give nRF21540fem control pins to NetworkMCU */
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nrf_gpio_pin_mcu_select(NRF_DT_GPIOS_TO_PSEL(NRF21540FEM_CTRL_NODE, tx_en_gpios),
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GPIO_PIN_CNF_MCUSEL_NetworkMCU); /* TX_EN */
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nrf_gpio_pin_mcu_select(NRF_DT_GPIOS_TO_PSEL(NRF21540FEM_CTRL_NODE, pdn_gpios),
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GPIO_PIN_CNF_MCUSEL_NetworkMCU); /* PDN */
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nrf_gpio_pin_mcu_select(NRF_DT_GPIOS_TO_PSEL(NRF21540FEM_CTRL_NODE, rx_en_gpios),
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GPIO_PIN_CNF_MCUSEL_NetworkMCU); /* RX_EN */
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nrf_gpio_pin_mcu_select(NRF_DT_GPIOS_TO_PSEL(NRF21540FEM_CTRL_NODE, mode_gpios),
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GPIO_PIN_CNF_MCUSEL_NetworkMCU); /* MODE */
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/* Retain nRF5340 Network MCU in Secure domain (bus
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* accesses by Network MCU will have Secure attribute set).
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*/
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NRF_SPU->EXTDOMAIN[0].PERM = 1 << 4;
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#endif /* !CONFIG_TRUSTED_EXECUTION_NONSECURE */
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#if !defined(CONFIG_TRUSTED_EXECUTION_SECURE)
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/*
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* Building Zephyr with CONFIG_TRUSTED_EXECUTION_SECURE=y implies
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* building also a Non-Secure image. The Non-Secure image will, in
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* this case do the remainder of actions to properly configure and
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* boot the Network MCU.
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*/
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/* Release the Network MCU, 'Release force off signal' */
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NRF_RESET->NETWORK.FORCEOFF = RESET_NETWORK_FORCEOFF_FORCEOFF_Release;
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LOG_DBG("Network MCU released.");
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#endif /* !CONFIG_TRUSTED_EXECUTION_SECURE */
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}
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static int setup(const struct device *dev)
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{
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ARG_UNUSED(dev);
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#if !defined(CONFIG_TRUSTED_EXECUTION_SECURE)
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const struct device *gpio;
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int err;
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gpio = DEVICE_DT_GET(NRF21540FEM_CTRL_PDN_GPIO_NODE);
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if (!device_is_ready(gpio)) {
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LOG_ERR("%s device not ready", gpio->name);
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return -ENODEV;
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}
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err = gpio_pin_configure(gpio, NRF21540FEM_CTRL_PDN_PIN,
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NRF21540FEM_CTRL_PDN_FLAGS |
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IS_ENABLED(CONFIG_THINGY53_MISO_WORKAROUND) ?
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GPIO_OUTPUT_ACTIVE : GPIO_OUTPUT_INACTIVE);
|
||||||
|
if (err < 0) {
|
||||||
|
LOG_ERR("Failed to configure NRF21540FEM PDN Pin");
|
||||||
|
return err;
|
||||||
|
}
|
||||||
|
|
||||||
|
gpio = DEVICE_DT_GET(ADXL362_GPIO_NODE);
|
||||||
|
if (!device_is_ready(gpio)) {
|
||||||
|
LOG_ERR("%s device not ready", gpio->name);
|
||||||
|
return -ENODEV;
|
||||||
|
}
|
||||||
|
err = gpio_pin_configure(gpio, ADXL362_CS, ADXL362_FLAGS | GPIO_OUTPUT_INACTIVE);
|
||||||
|
if (err < 0) {
|
||||||
|
LOG_ERR("Failed to configure ADXL362 CS Pin");
|
||||||
|
return err;
|
||||||
|
}
|
||||||
|
|
||||||
|
gpio = DEVICE_DT_GET(BMI270_GPIO_NODE);
|
||||||
|
if (!device_is_ready(gpio)) {
|
||||||
|
LOG_ERR("%s device not ready", gpio->name);
|
||||||
|
return -ENODEV;
|
||||||
|
}
|
||||||
|
err = gpio_pin_configure(gpio, BMI270_CS, BMI270_FLAGS | GPIO_OUTPUT_INACTIVE);
|
||||||
|
if (err < 0) {
|
||||||
|
LOG_ERR("Failed to configure BMI270 CS Pin");
|
||||||
|
return err;
|
||||||
|
}
|
||||||
|
|
||||||
|
gpio = DEVICE_DT_GET(NRF21540FEM_GPIO_NODE);
|
||||||
|
if (!device_is_ready(gpio)) {
|
||||||
|
LOG_ERR("%s device not ready", gpio->name);
|
||||||
|
return -ENODEV;
|
||||||
|
}
|
||||||
|
err = gpio_pin_configure(gpio, NRF21540FEM_CS, NRF21540FEM_FLAGS | GPIO_OUTPUT_INACTIVE);
|
||||||
|
if (err < 0) {
|
||||||
|
LOG_ERR("Failed to configure NRF21540FEM CS Pin");
|
||||||
|
return err;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (IS_ENABLED(CONFIG_SENSOR)) {
|
||||||
|
/* Initialization chain of Thingy:53 board requires some delays before on board
|
||||||
|
* sensors could be accessed after power up. In particular bme680 and bmm150
|
||||||
|
* sensors require, 2ms and 1ms power on delay respectively. In order not to sum
|
||||||
|
* delays, common delay is introduced in the board start up file. This code is
|
||||||
|
* executed after sensors are powered up and before their initialization.
|
||||||
|
* It's ensured by build asserts at the beggining of this file.
|
||||||
|
*/
|
||||||
|
k_msleep(2);
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* !CONFIG_TRUSTED_EXECUTION_SECURE */
|
||||||
|
|
||||||
|
if (IS_ENABLED(CONFIG_BOARD_ENABLE_CPUNET)) {
|
||||||
|
enable_cpunet();
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
SYS_INIT(setup, POST_KERNEL, CONFIG_THINGY53_INIT_PRIORITY);
|
12
boards/arm/thingy53_nrf5340/board.cmake
Normal file
12
boards/arm/thingy53_nrf5340/board.cmake
Normal file
|
@ -0,0 +1,12 @@
|
||||||
|
# SPDX-License-Identifier: Apache-2.0
|
||||||
|
|
||||||
|
if(CONFIG_BOARD_THINGY53_NRF5340_CPUAPP OR CONFIG_BOARD_THINGY53_NRF5340_CPUAPPNS)
|
||||||
|
board_runner_args(jlink "--device=nrf5340_xxaa_app" "--speed=4000")
|
||||||
|
endif()
|
||||||
|
|
||||||
|
if(CONFIG_BOARD_THINGY53_NRF5340_CPUNET)
|
||||||
|
board_runner_args(jlink "--device=nrf5340_xxaa_net" "--speed=4000")
|
||||||
|
endif()
|
||||||
|
|
||||||
|
include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
|
||||||
|
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
|
299
boards/arm/thingy53_nrf5340/thingy53_nrf5340_common.dts
Normal file
299
boards/arm/thingy53_nrf5340/thingy53_nrf5340_common.dts
Normal file
|
@ -0,0 +1,299 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2021 Nordic Semiconductor ASA
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*/
|
||||||
|
|
||||||
|
/ {
|
||||||
|
chosen {
|
||||||
|
zephyr,console = &uart0;
|
||||||
|
zephyr,shell-uart = &uart0;
|
||||||
|
zephyr,uart-mcumgr = &uart0;
|
||||||
|
zephyr,bt-mon-uart = &uart0;
|
||||||
|
zephyr,bt-c2h-uart = &uart0;
|
||||||
|
};
|
||||||
|
|
||||||
|
buttons {
|
||||||
|
compatible = "gpio-keys";
|
||||||
|
button0: button_0 {
|
||||||
|
gpios = <&gpio1 14 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
|
||||||
|
label = "Push button 1";
|
||||||
|
};
|
||||||
|
button1: button_1 {
|
||||||
|
gpios = <&gpio1 13 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
|
||||||
|
label = "Push button 2";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
leds {
|
||||||
|
compatible = "gpio-leds";
|
||||||
|
red_led: led_1 {
|
||||||
|
gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
|
||||||
|
label = "RGB red LED";
|
||||||
|
};
|
||||||
|
green_led: led_2 {
|
||||||
|
gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
|
||||||
|
label = "RGB green LED";
|
||||||
|
};
|
||||||
|
blue_led: led_3 {
|
||||||
|
gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
|
||||||
|
label = "RGB blue LED";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
pwmleds {
|
||||||
|
compatible = "pwm-leds";
|
||||||
|
red_led_pwm: led_pwm_0 {
|
||||||
|
pwms = <&pwm0 40>;
|
||||||
|
label = "Red PWM LED";
|
||||||
|
};
|
||||||
|
|
||||||
|
green_led_pwm: led_pwm_1 {
|
||||||
|
pwms = <&pwm0 38>;
|
||||||
|
label = "Green PWM LED";
|
||||||
|
};
|
||||||
|
|
||||||
|
blue_led_pwm: led_pwm_2 {
|
||||||
|
pwms = <&pwm0 39>;
|
||||||
|
label = "Blue PWM LED";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
vbatt {
|
||||||
|
compatible = "voltage-divider";
|
||||||
|
io-channels = <&adc 2>;
|
||||||
|
output-ohms = <180000>;
|
||||||
|
full-ohms = <(1500000 + 180000)>;
|
||||||
|
power-gpios = <&gpio0 16 0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
regulator_3v3: regulator-3v3-ctrl {
|
||||||
|
compatible = "regulator-fixed-sync", "regulator-fixed";
|
||||||
|
label = "vsys-3v3-ctrl";
|
||||||
|
regulator-name = "ncp114";
|
||||||
|
enable-gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
|
||||||
|
regulator-boot-on;
|
||||||
|
};
|
||||||
|
|
||||||
|
sensor_pwr_ctrl: sensor-pwr-ctrl {
|
||||||
|
compatible = "regulator-fixed-sync", "regulator-fixed";
|
||||||
|
label = "sens-pwr-ctrl";
|
||||||
|
regulator-name = "tck106ag";
|
||||||
|
enable-gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>;
|
||||||
|
regulator-boot-on;
|
||||||
|
};
|
||||||
|
|
||||||
|
nrf21540fem_ctrl: nrf21540fem-ctrl {
|
||||||
|
compatible = "nordic,nrf21540-fem";
|
||||||
|
rx-en-gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
|
||||||
|
mode-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
|
||||||
|
pdn-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
|
||||||
|
tx-en-gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>;
|
||||||
|
};
|
||||||
|
|
||||||
|
aliases {
|
||||||
|
sw0 = &button0;
|
||||||
|
sw1 = &button1;
|
||||||
|
led0 = &red_led;
|
||||||
|
led1 = &green_led;
|
||||||
|
led2 = &blue_led;
|
||||||
|
pwm-led0 = &red_led_pwm;
|
||||||
|
pwm-led1 = &green_led_pwm;
|
||||||
|
pwm-led2 = &blue_led_pwm;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
/* RGB LED control */
|
||||||
|
&pwm0 {
|
||||||
|
status = "okay";
|
||||||
|
ch0-pin = <40>;
|
||||||
|
ch1-pin = <38>;
|
||||||
|
ch2-pin = <39>;
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Buzzer control */
|
||||||
|
&pwm1 {
|
||||||
|
status = "okay";
|
||||||
|
ch0-pin = <47>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&adc {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&gpiote {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&gpio0 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&gpio1 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c1 {
|
||||||
|
compatible = "nordic,nrf-twim";
|
||||||
|
status = "okay";
|
||||||
|
sda-pin = <34>;
|
||||||
|
scl-pin = <35>;
|
||||||
|
clock-frequency = <I2C_BITRATE_FAST>;
|
||||||
|
|
||||||
|
bmm150@10 {
|
||||||
|
compatible = "bosch,bmm150";
|
||||||
|
label = "BMM150";
|
||||||
|
reg = <0x10>;
|
||||||
|
};
|
||||||
|
|
||||||
|
bh1749@38 {
|
||||||
|
compatible = "rohm,bh1749";
|
||||||
|
label = "BH1749";
|
||||||
|
reg = <0x38>;
|
||||||
|
int-gpios = <&gpio1 5 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&spi3 {
|
||||||
|
compatible = "nordic,nrf-spim";
|
||||||
|
status = "okay";
|
||||||
|
sck-pin = <29>;
|
||||||
|
mosi-pin = <28>;
|
||||||
|
miso-pin = <26>;
|
||||||
|
cs-gpios = <&gpio0 22 GPIO_ACTIVE_LOW>,
|
||||||
|
<&gpio1 4 GPIO_ACTIVE_LOW>,
|
||||||
|
<&gpio0 24 GPIO_ACTIVE_LOW>;
|
||||||
|
|
||||||
|
adxl362: spi-dev-adxl362@0 {
|
||||||
|
compatible = "adi,adxl362";
|
||||||
|
label = "ADXL362";
|
||||||
|
spi-max-frequency = <8000000>;
|
||||||
|
reg = <0>;
|
||||||
|
int1-gpios = <&gpio0 19 0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
bmi270: spi-dev-bmi270@1 {
|
||||||
|
compatible = "bosch,bmi270";
|
||||||
|
label = "BMI270";
|
||||||
|
spi-max-frequency = <8000000>;
|
||||||
|
reg = <1>;
|
||||||
|
int1-gpios = <&gpio0 23 0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
nrf21540fem: spi-dev-nrf21540fem@2 {
|
||||||
|
compatible = "nordic,nrf21540-fem-spi";
|
||||||
|
status = "okay";
|
||||||
|
reg = <2>;
|
||||||
|
label = "FEM_SPI_IF";
|
||||||
|
spi-max-frequency = <8000000>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
/* UART0 GPIOs can be configured for other use-cases */
|
||||||
|
&uart0 {
|
||||||
|
current-speed = <115200>;
|
||||||
|
status = "okay";
|
||||||
|
tx-pin = <12>;
|
||||||
|
rx-pin = <11>;
|
||||||
|
rts-pin = <10>;
|
||||||
|
cts-pin = <9>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&qspi {
|
||||||
|
status = "okay";
|
||||||
|
sck-pin = <17>;
|
||||||
|
io-pins = <13>, <14>;
|
||||||
|
csn-pins = <18>;
|
||||||
|
mx25r64: mx25r6435f@0 {
|
||||||
|
compatible = "nordic,qspi-nor";
|
||||||
|
reg = <0>;
|
||||||
|
/* MX24R64 supports only pp and pp4io */
|
||||||
|
/* Thingy:53 supports only pp and pp2o options */
|
||||||
|
writeoc = "pp";
|
||||||
|
/* MX24R64 supports all readoc options */
|
||||||
|
/* Thingy:53 supports only fastread and read2io options */
|
||||||
|
readoc = "read2io";
|
||||||
|
sck-frequency = <8000000>;
|
||||||
|
label = "MX25R64";
|
||||||
|
jedec-id = [c2 28 17];
|
||||||
|
sfdp-bfp = [
|
||||||
|
e5 20 f1 ff ff ff ff 03 44 eb 08 6b 08 3b 04 bb
|
||||||
|
ee ff ff ff ff ff 00 ff ff ff 00 ff 0c 20 0f 52
|
||||||
|
10 d8 00 ff 23 72 f5 00 82 ed 04 cc 44 83 68 44
|
||||||
|
30 b0 30 b0 f7 c4 d5 5c 00 be 29 ff f0 d0 ff ff
|
||||||
|
];
|
||||||
|
size = <67108864>;
|
||||||
|
has-dpd;
|
||||||
|
t-enter-dpd = <10000>;
|
||||||
|
t-exit-dpd = <35000>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&timer0 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&timer1 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&timer2 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&flash0 {
|
||||||
|
partitions {
|
||||||
|
compatible = "fixed-partitions";
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
|
||||||
|
boot_partition: partition@0 {
|
||||||
|
label = "mcuboot";
|
||||||
|
reg = <0x00000000 0x00010000>;
|
||||||
|
};
|
||||||
|
slot0_partition: partition@10000 {
|
||||||
|
label = "image-0";
|
||||||
|
};
|
||||||
|
slot0_ns_partition: partition@50000 {
|
||||||
|
label = "image-0-nonsecure";
|
||||||
|
};
|
||||||
|
slot1_partition: partition@80000 {
|
||||||
|
label = "image-1";
|
||||||
|
};
|
||||||
|
slot1_ns_partition: partition@c0000 {
|
||||||
|
label = "image-1-nonsecure";
|
||||||
|
};
|
||||||
|
scratch_partition: partition@f0000 {
|
||||||
|
label = "image-scratch";
|
||||||
|
reg = <0x000f0000 0xa000>;
|
||||||
|
};
|
||||||
|
storage_partition: partition@fa000 {
|
||||||
|
label = "storage";
|
||||||
|
reg = <0x000fa000 0x00006000>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
/ {
|
||||||
|
|
||||||
|
reserved-memory {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
ranges;
|
||||||
|
|
||||||
|
sram0_image: image@20000000 {
|
||||||
|
/* Zephyr image(s) memory */
|
||||||
|
};
|
||||||
|
|
||||||
|
sram0_s: image_s@20000000 {
|
||||||
|
/* Secure image memory */
|
||||||
|
};
|
||||||
|
|
||||||
|
sram0_ns: image_ns@20040000 {
|
||||||
|
/* Non-Secure image memory */
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Include partition configuration file */
|
||||||
|
#include "thingy53_nrf5340_partition_conf.dts"
|
27
boards/arm/thingy53_nrf5340/thingy53_nrf5340_cpuapp.dts
Normal file
27
boards/arm/thingy53_nrf5340/thingy53_nrf5340_cpuapp.dts
Normal file
|
@ -0,0 +1,27 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2021 Nordic Semiconductor ASA
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
#include <nordic/nrf5340_cpuapp_qkaa.dtsi>
|
||||||
|
#include "thingy53_nrf5340_common.dts"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "Nordic Thingy53 NRF5340 Application";
|
||||||
|
compatible = "nordic,thingy53-nrf5340-cpuapp";
|
||||||
|
|
||||||
|
chosen {
|
||||||
|
zephyr,sram = &sram0_image;
|
||||||
|
zephyr,flash = &flash0;
|
||||||
|
zephyr,code-partition = &slot0_partition;
|
||||||
|
zephyr,sram-secure-partition = &sram0_s;
|
||||||
|
zephyr,sram-non-secure-partition = &sram0_ns;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&usbd {
|
||||||
|
compatible = "nordic,nrf-usbd";
|
||||||
|
status = "okay";
|
||||||
|
};
|
17
boards/arm/thingy53_nrf5340/thingy53_nrf5340_cpuapp.yaml
Normal file
17
boards/arm/thingy53_nrf5340/thingy53_nrf5340_cpuapp.yaml
Normal file
|
@ -0,0 +1,17 @@
|
||||||
|
identifier: thingy53_nrf5340_cpuapp
|
||||||
|
name: Thingy53-NRF5340-application-MCU
|
||||||
|
type: mcu
|
||||||
|
arch: arm
|
||||||
|
toolchain:
|
||||||
|
- gnuarmemb
|
||||||
|
- xtools
|
||||||
|
- zephyr
|
||||||
|
ram: 448
|
||||||
|
flash: 1024
|
||||||
|
supported:
|
||||||
|
- gpio
|
||||||
|
- i2c
|
||||||
|
- pwm
|
||||||
|
- watchdog
|
||||||
|
- usb_cdc
|
||||||
|
- usb_device
|
|
@ -0,0 +1,24 @@
|
||||||
|
# SPDX-License-Identifier: Apache-2.0
|
||||||
|
|
||||||
|
CONFIG_SOC_SERIES_NRF53X=y
|
||||||
|
CONFIG_SOC_NRF5340_CPUAPP_QKAA=y
|
||||||
|
CONFIG_BOARD_THINGY53_NRF5340_CPUAPP=y
|
||||||
|
|
||||||
|
# Enable MPU
|
||||||
|
CONFIG_ARM_MPU=y
|
||||||
|
|
||||||
|
# Enable hardware stack protection
|
||||||
|
CONFIG_HW_STACK_PROTECTION=y
|
||||||
|
|
||||||
|
# Enable TrustZone-M
|
||||||
|
CONFIG_ARM_TRUSTZONE_M=y
|
||||||
|
|
||||||
|
# Enable GPIO
|
||||||
|
CONFIG_GPIO=y
|
||||||
|
|
||||||
|
# Enable console
|
||||||
|
CONFIG_CONSOLE=y
|
||||||
|
CONFIG_UART_CONSOLE=y
|
||||||
|
|
||||||
|
# Enable uart driver
|
||||||
|
CONFIG_SERIAL=y
|
25
boards/arm/thingy53_nrf5340/thingy53_nrf5340_cpuappns.dts
Normal file
25
boards/arm/thingy53_nrf5340/thingy53_nrf5340_cpuappns.dts
Normal file
|
@ -0,0 +1,25 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2021 Nordic Semiconductor ASA
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
#include <nordic/nrf5340_cpuappns_qkaa.dtsi>
|
||||||
|
#include "thingy53_nrf5340_common.dts"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "Nordic Thingy53 NRF5340 Application";
|
||||||
|
compatible = "nordic,thingy53-nrf5340-cpuapp";
|
||||||
|
|
||||||
|
chosen {
|
||||||
|
zephyr,sram = &sram0_ns;
|
||||||
|
zephyr,flash = &flash0;
|
||||||
|
zephyr,code-partition = &slot0_ns_partition;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&usbd {
|
||||||
|
compatible = "nordic,nrf-usbd";
|
||||||
|
status = "okay";
|
||||||
|
};
|
16
boards/arm/thingy53_nrf5340/thingy53_nrf5340_cpuappns.yaml
Normal file
16
boards/arm/thingy53_nrf5340/thingy53_nrf5340_cpuappns.yaml
Normal file
|
@ -0,0 +1,16 @@
|
||||||
|
identifier: thingy53_nrf5340_cpuappns
|
||||||
|
name: Thingy53-NRF5340-application-MCU-Non-Secure
|
||||||
|
type: mcu
|
||||||
|
arch: arm
|
||||||
|
toolchain:
|
||||||
|
- gnuarmemb
|
||||||
|
- xtools
|
||||||
|
- zephyr
|
||||||
|
ram: 192
|
||||||
|
flash: 192
|
||||||
|
supported:
|
||||||
|
- i2c
|
||||||
|
- pwm
|
||||||
|
- watchdog
|
||||||
|
- usb_cdc
|
||||||
|
- usb_device
|
|
@ -0,0 +1,27 @@
|
||||||
|
# SPDX-License-Identifier: Apache-2.0
|
||||||
|
|
||||||
|
CONFIG_SOC_SERIES_NRF53X=y
|
||||||
|
CONFIG_SOC_NRF5340_CPUAPP_QKAA=y
|
||||||
|
CONFIG_BOARD_THINGY53_NRF5340_CPUAPPNS=y
|
||||||
|
|
||||||
|
# Enable MPU
|
||||||
|
CONFIG_ARM_MPU=y
|
||||||
|
|
||||||
|
# Enable hardware stack protection
|
||||||
|
CONFIG_HW_STACK_PROTECTION=y
|
||||||
|
|
||||||
|
# Enable TrustZone-M
|
||||||
|
CONFIG_ARM_TRUSTZONE_M=y
|
||||||
|
|
||||||
|
# This Board implies building Non-Secure firmware
|
||||||
|
CONFIG_TRUSTED_EXECUTION_NONSECURE=y
|
||||||
|
|
||||||
|
# Enable GPIO
|
||||||
|
CONFIG_GPIO=y
|
||||||
|
|
||||||
|
# Enable console
|
||||||
|
CONFIG_CONSOLE=y
|
||||||
|
CONFIG_UART_CONSOLE=y
|
||||||
|
|
||||||
|
# Enable uart driver
|
||||||
|
CONFIG_SERIAL=y
|
143
boards/arm/thingy53_nrf5340/thingy53_nrf5340_cpunet.dts
Normal file
143
boards/arm/thingy53_nrf5340/thingy53_nrf5340_cpunet.dts
Normal file
|
@ -0,0 +1,143 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2021 Nordic Semiconductor ASA
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
#include <nordic/nrf5340_cpunet_qkaa.dtsi>
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "Nordic Thingy53 NRF5340 Network";
|
||||||
|
compatible = "nordic,thingy53-nrf5340-cpunet";
|
||||||
|
|
||||||
|
chosen {
|
||||||
|
zephyr,console = &uart0;
|
||||||
|
zephyr,shell-uart = &uart0;
|
||||||
|
zephyr,uart-mcumgr = &uart0;
|
||||||
|
zephyr,bt-mon-uart = &uart0;
|
||||||
|
zephyr,bt-c2h-uart = &uart0;
|
||||||
|
zephyr,sram = &sram1;
|
||||||
|
zephyr,flash = &flash1;
|
||||||
|
zephyr,code-partition = &slot0_partition;
|
||||||
|
};
|
||||||
|
|
||||||
|
buttons {
|
||||||
|
compatible = "gpio-keys";
|
||||||
|
button0: button_0 {
|
||||||
|
gpios = <&gpio1 14 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
|
||||||
|
label = "Push button 1";
|
||||||
|
};
|
||||||
|
button1: button_1 {
|
||||||
|
gpios = <&gpio1 13 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
|
||||||
|
label = "Push button 2";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
leds {
|
||||||
|
compatible = "gpio-leds";
|
||||||
|
red_led: led_1 {
|
||||||
|
gpios = <&gpio1 8 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>;
|
||||||
|
label = "RGB red LED";
|
||||||
|
};
|
||||||
|
green_led: led_2 {
|
||||||
|
gpios = <&gpio1 6 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>;
|
||||||
|
label = "RGB green LED";
|
||||||
|
};
|
||||||
|
blue_led: led_3 {
|
||||||
|
gpios = <&gpio1 7 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>;
|
||||||
|
label = "RGB blue LED";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
nrf_radio_fem: nrf21540_fem {
|
||||||
|
compatible = "nordic,nrf21540-fem";
|
||||||
|
rx-en-gpios = <&gpio1 11 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>;
|
||||||
|
mode-gpios = <&gpio1 12 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>;
|
||||||
|
pdn-gpios = <&gpio1 10 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>;
|
||||||
|
tx-en-gpios = <&gpio0 30 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>;
|
||||||
|
};
|
||||||
|
|
||||||
|
aliases {
|
||||||
|
sw0 = &button0;
|
||||||
|
sw1 = &button1;
|
||||||
|
led0 = &red_led;
|
||||||
|
led1 = &green_led;
|
||||||
|
led2 = &blue_led;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&gpiote {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&gpio0 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&gpio1 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c0 {
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
&spi0 {
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
&uart0 {
|
||||||
|
compatible = "nordic,nrf-uarte";
|
||||||
|
status = "disabled";
|
||||||
|
current-speed = <115200>;
|
||||||
|
tx-pin = <12>;
|
||||||
|
rx-pin = <11>;
|
||||||
|
rts-pin = <10>;
|
||||||
|
cts-pin = <9>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&timer0 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&timer1 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&timer2 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&flash1 {
|
||||||
|
|
||||||
|
partitions {
|
||||||
|
compatible = "fixed-partitions";
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
|
||||||
|
boot_partition: partition@0 {
|
||||||
|
label = "mcuboot";
|
||||||
|
reg = <0x00000000 0xc000>;
|
||||||
|
};
|
||||||
|
slot0_partition: partition@c000 {
|
||||||
|
label = "image-0";
|
||||||
|
reg = <0x0000C000 0x12000>;
|
||||||
|
};
|
||||||
|
slot1_partition: partition@1e000 {
|
||||||
|
label = "image-1";
|
||||||
|
reg = <0x0001E000 0x12000>;
|
||||||
|
};
|
||||||
|
scratch_partition: partition@30000 {
|
||||||
|
label = "image-scratch";
|
||||||
|
reg = <0x00030000 0xa000>;
|
||||||
|
};
|
||||||
|
storage_partition: partition@3a000 {
|
||||||
|
label = "storage";
|
||||||
|
reg = <0x0003a000 0x6000>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Include shared RAM configuration file */
|
||||||
|
#include "thingy53_nrf5340_shared_sram_planning_conf.dts"
|
12
boards/arm/thingy53_nrf5340/thingy53_nrf5340_cpunet.yaml
Normal file
12
boards/arm/thingy53_nrf5340/thingy53_nrf5340_cpunet.yaml
Normal file
|
@ -0,0 +1,12 @@
|
||||||
|
identifier: thingy53_nrf5340_cpunet
|
||||||
|
name: Thingy53-NRF5340-network-MCU
|
||||||
|
type: mcu
|
||||||
|
arch: arm
|
||||||
|
toolchain:
|
||||||
|
- gnuarmemb
|
||||||
|
- xtools
|
||||||
|
- zephyr
|
||||||
|
ram: 64
|
||||||
|
flash: 256
|
||||||
|
supported:
|
||||||
|
- watchdog
|
|
@ -0,0 +1,17 @@
|
||||||
|
# SPDX-License-Identifier: Apache-2.0
|
||||||
|
|
||||||
|
CONFIG_SOC_SERIES_NRF53X=y
|
||||||
|
CONFIG_SOC_NRF5340_CPUNET_QKAA=y
|
||||||
|
CONFIG_BOARD_THINGY53_NRF5340_CPUNET=y
|
||||||
|
|
||||||
|
# Enable MPU
|
||||||
|
CONFIG_ARM_MPU=y
|
||||||
|
|
||||||
|
# Enable hardware stack protection
|
||||||
|
CONFIG_HW_STACK_PROTECTION=y
|
||||||
|
|
||||||
|
# Enable GPIO
|
||||||
|
CONFIG_GPIO=y
|
||||||
|
|
||||||
|
# Enable console
|
||||||
|
CONFIG_CONSOLE=y
|
|
@ -0,0 +1,60 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2021 Nordic Semiconductor ASA
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Default Flash planning for thingy53_nrf5340.
|
||||||
|
*
|
||||||
|
* Zephyr build for nRF5340 with ARM TrustZone-M support,
|
||||||
|
* implies building Secure and Non-Secure Zephyr images.
|
||||||
|
*
|
||||||
|
* Secure image will be placed, by default, in flash0
|
||||||
|
* (or in slot0, if MCUboot is present).
|
||||||
|
* Secure image will use sram0 for system memory.
|
||||||
|
*
|
||||||
|
* Non-Secure image will be placed in slot0_ns, and use
|
||||||
|
* sram0_ns for system memory.
|
||||||
|
*
|
||||||
|
* Note that the Secure image only requires knowledge of
|
||||||
|
* the beginning of the Non-Secure image (not its size).
|
||||||
|
*/
|
||||||
|
|
||||||
|
&slot0_partition {
|
||||||
|
reg = <0x00010000 0x40000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&slot0_ns_partition {
|
||||||
|
reg = <0x00050000 0x30000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&slot1_partition {
|
||||||
|
reg = <0x00080000 0x40000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&slot1_ns_partition {
|
||||||
|
reg = <0x000c0000 0x30000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Default SRAM planning when building for nRF5340 with
|
||||||
|
* ARM TrustZone-M support
|
||||||
|
* - Lowest 256 kB SRAM allocated to Secure image (sram0_s)
|
||||||
|
* - Middle 192 kB allocated to Non-Secure image (sram0_ns)
|
||||||
|
* - Upper 64 kB SRAM allocated as Shared memory (sram0_shared)
|
||||||
|
* (see nrf5340_shared_sram_planning_conf.dts)
|
||||||
|
*/
|
||||||
|
&sram0_image {
|
||||||
|
reg = <0x20000000 DT_SIZE_K(448)>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&sram0_s {
|
||||||
|
reg = <0x20000000 0x40000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&sram0_ns {
|
||||||
|
reg = <0x20040000 0x30000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Include shared RAM configuration file */
|
||||||
|
#include "thingy53_nrf5340_shared_sram_planning_conf.dts"
|
|
@ -0,0 +1,30 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2021 Nordic Semiconductor ASA
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Default shared SRAM planning when building for nRF5340.
|
||||||
|
* This file is included by both nRF5340 CPUAPP (Application MCU)
|
||||||
|
* and nRF5340 CPUNET (Network MCU).
|
||||||
|
* - 64 kB SRAM allocated as Shared memory (sram0_shared)
|
||||||
|
* - Region defined after the image SRAM of Application MCU
|
||||||
|
*/
|
||||||
|
|
||||||
|
/ {
|
||||||
|
chosen {
|
||||||
|
/* shared memory reserved for the inter-processor communication */
|
||||||
|
zephyr,ipc_shm = &sram0_shared;
|
||||||
|
};
|
||||||
|
|
||||||
|
reserved-memory {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
ranges;
|
||||||
|
|
||||||
|
sram0_shared: memory@20070000 {
|
||||||
|
/* SRAM allocated to shared memory */
|
||||||
|
reg = <0x20070000 0x10000>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
Loading…
Add table
Add a link
Reference in a new issue