michaelh/zephyr
1
0
Fork 0
Code Releases Activity

drivers: watchdog: wwdg_stm32: convert to DT_INST defines

Browse source 
Convert driver to use DT_INST_ defines.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Kumar Gala 2020-02-13 05:56:14 -06:00 • committed by Kumar Gala
commit c44a4d84e0
17 changed files with 9 additions and 106 deletions
Download patch file Download diff file Expand all files Collapse all files

7
soc/arm/st_stm32/stm32f0/dts_fixup.h
View file

@ -190,13 +190,6 @@
#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS
#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL
#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0
#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY
#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS
#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS
#define DT_ADC_1_BASE_ADDRESS DT_ST_STM32_ADC_40012400_BASE_ADDRESS
#define DT_ADC_1_IRQ DT_ST_STM32_ADC_40012400_IRQ_0
#define DT_ADC_1_IRQ_PRI DT_ST_STM32_ADC_40012400_IRQ_0_PRIORITY

7
soc/arm/st_stm32/stm32f1/dts_fixup.h
View file

@ -211,13 +211,6 @@
#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS
#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL
#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0
#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY
#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS
#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS
#define DT_ADC_1_BASE_ADDRESS DT_ST_STM32_ADC_40012400_BASE_ADDRESS
#define DT_ADC_1_IRQ DT_ST_STM32_ADC_40012400_IRQ_0
#define DT_ADC_1_IRQ_PRI DT_ST_STM32_ADC_40012400_IRQ_0_PRIORITY

7
soc/arm/st_stm32/stm32f2/dts_fixup.h
View file

@ -150,13 +150,6 @@
#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS
#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL
#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0
#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY
#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS
#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS
#define DT_ADC_1_BASE_ADDRESS DT_ST_STM32_ADC_40012000_BASE_ADDRESS
#define DT_ADC_1_IRQ DT_ST_STM32_ADC_40012000_IRQ_0
#define DT_ADC_1_IRQ_PRI DT_ST_STM32_ADC_40012000_IRQ_0_PRIORITY

7
soc/arm/st_stm32/stm32f3/dts_fixup.h
View file

@ -265,13 +265,6 @@
#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS
#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL
#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0
#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY
#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS
#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS
#define DT_ADC_1_BASE_ADDRESS DT_ST_STM32_ADC_50000000_BASE_ADDRESS
#define DT_ADC_1_IRQ DT_ST_STM32_ADC_50000000_IRQ_0
#define DT_ADC_1_IRQ_PRI DT_ST_STM32_ADC_50000000_IRQ_0_PRIORITY

7
soc/arm/st_stm32/stm32f4/dts_fixup.h
View file

@ -494,13 +494,6 @@
#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS
#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL
#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0
#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY
#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS
#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS
#define DT_ADC_1_BASE_ADDRESS DT_ST_STM32_ADC_40012000_BASE_ADDRESS
#define DT_ADC_1_IRQ DT_ST_STM32_ADC_40012000_IRQ_0
#define DT_ADC_1_IRQ_PRI DT_ST_STM32_ADC_40012000_IRQ_0_PRIORITY

7
soc/arm/st_stm32/stm32f7/dts_fixup.h
View file

@ -392,13 +392,6 @@
#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS
#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL
#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0
#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY
#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS
#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS
#define DT_ADC_1_BASE_ADDRESS DT_ST_STM32_ADC_40012000_BASE_ADDRESS
#define DT_ADC_1_IRQ DT_ST_STM32_ADC_40012000_IRQ_0
#define DT_ADC_1_IRQ_PRI DT_ST_STM32_ADC_40012000_IRQ_0_PRIORITY

7
soc/arm/st_stm32/stm32g0/dts_fixup.h
View file

@ -99,11 +99,4 @@
#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS
#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL
#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0
#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY
#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS
#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS
/* End of SoC Level DTS fixup file */

7
soc/arm/st_stm32/stm32g4/dts_fixup.h
View file

@ -253,11 +253,4 @@
#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS
#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL
#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0
#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY
#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS
#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS
/* End of SoC Level DTS fixup file */

7
soc/arm/st_stm32/stm32h7/dts_fixup.h
View file

@ -188,11 +188,4 @@
#define DT_RTC_0_CLOCK_BITS DT_ST_STM32_RTC_58004000_CLOCK_BITS
#define DT_RTC_0_CLOCK_BUS DT_ST_STM32_RTC_58004000_CLOCK_BUS
#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS
#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL
#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0
#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY
#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS
#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS
/* End of SoC Level DTS fixup file */

7
soc/arm/st_stm32/stm32l0/dts_fixup.h
View file

@ -135,13 +135,6 @@
#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS
#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL
#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0
#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY
#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS
#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS
#define DT_ADC_1_BASE_ADDRESS DT_ST_STM32_ADC_40012400_BASE_ADDRESS
#define DT_ADC_1_IRQ DT_ST_STM32_ADC_40012400_IRQ_0
#define DT_ADC_1_IRQ_PRI DT_ST_STM32_ADC_40012400_IRQ_0_PRIORITY

7
soc/arm/st_stm32/stm32l1/dts_fixup.h
View file

@ -125,13 +125,6 @@
#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS
#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL
#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0
#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY
#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS
#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS
#define DT_RTC_0_BASE_ADDRESS DT_ST_STM32_RTC_40002800_BASE_ADDRESS
#define DT_RTC_0_IRQ_PRI DT_ST_STM32_RTC_40002800_IRQ_0_PRIORITY
#define DT_RTC_0_IRQ DT_ST_STM32_RTC_40002800_IRQ_0

7
soc/arm/st_stm32/stm32l4/dts_fixup.h
View file

@ -314,13 +314,6 @@
#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS
#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL
#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0
#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY
#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS
#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS
#define DT_ADC_1_BASE_ADDRESS DT_ST_STM32_ADC_50040000_BASE_ADDRESS
#define DT_ADC_1_IRQ DT_ST_STM32_ADC_50040000_IRQ_0
#define DT_ADC_1_IRQ_PRI DT_ST_STM32_ADC_50040000_IRQ_0_PRIORITY

7
soc/arm/st_stm32/stm32mp1/dts_fixup.h
View file

@ -389,11 +389,4 @@
#define DT_I2C_5_CLOCK_BITS DT_ST_STM32_I2C_V2_40015000_CLOCK_BITS
#define DT_I2C_5_CLOCK_BUS DT_ST_STM32_I2C_V2_40015000_CLOCK_BUS
#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS
#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL
#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0
#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY
#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS
#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS
/* End of SoC Level DTS fixup file */

7
soc/arm/st_stm32/stm32wb/dts_fixup.h
View file

@ -157,13 +157,6 @@
#define DT_WDT_0_NAME DT_INST_0_ST_STM32_WATCHDOG_LABEL
#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS
#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL
#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0
#define DT_WWDT_0_IRQ_PRI DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0_PRIORITY
#define DT_WWDT_0_CLOCK_BITS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BITS
#define DT_WWDT_0_CLOCK_BUS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_CLOCK_BUS
#define DT_LPTIM_1_BASE_ADDRESS DT_ST_STM32_TIMERS_40007C00_BASE_ADDRESS
#define DT_LPTIM_1_IRQ DT_ST_STM32_TIMERS_40007C00_IRQ_0
#define DT_LPTIM_1_IRQ_PRI DT_ST_STM32_TIMERS_40007C00_IRQ_0_PRIORITY