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arch: arm: tz: secure_entry_functions: Add support for nRF53

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The nRF53 has different region size than nRF91.
This patch is aware of Erratum 19 (wrong SPU region size).

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
This commit is contained in:
Øyvind Rønningstad 2020-02-20 15:33:33 +01:00 • committed by Ioannis Glaropoulos
commit c3ee533b5e
1 changed files with 20 additions and 12 deletions
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32
arch/arm/core/aarch32/cortex_m/tz/secure_entry_functions.ld
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@ -4,18 +4,23 @@
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
/* nRF-specific defines. */
#ifdef CONFIG_CPU_HAS_NRF_IDAU
/* This SOC needs the NSC region to be at the end of an SPU region. */
#define NSC_ALIGN \
. = ALIGN(CONFIG_NRF_SPU_FLASH_REGION_SIZE) \
- (1 << LOG2CEIL(__sg_size))
#define NSC_ALIGN_END . = ALIGN(CONFIG_NRF_SPU_FLASH_REGION_SIZE)
#endif /* CONFIG_CPU_HAS_NRF_IDAU */
#if CONFIG_ARM_NSC_REGION_BASE_ADDRESS != 0 #if CONFIG_ARM_NSC_REGION_BASE_ADDRESS != 0
#define NSC_ALIGN . = ABSOLUTE(CONFIG_ARM_NSC_REGION_BASE_ADDRESS) #define NSC_ALIGN . = ABSOLUTE(CONFIG_ARM_NSC_REGION_BASE_ADDRESS)
#elif defined(CONFIG_CPU_HAS_NRF_IDAU) #elif !defined(NSC_ALIGN)
/* The nRF9160 needs the NSC region to be at the end of a 32 kB region. */
#define NSC_ALIGN . = ALIGN(0x8000) - (1 << LOG2CEIL(__sg_size))
#else
#define NSC_ALIGN . = ALIGN(4) #define NSC_ALIGN . = ALIGN(4)
#endif #endif /* CONFIG_ARM_NSC_REGION_BASE_ADDRESS */
#ifdef CONFIG_CPU_HAS_NRF_IDAU #ifndef NSC_ALIGN_END
#define NSC_ALIGN_END . = ALIGN(0x8000)
#else
#define NSC_ALIGN_END . = ALIGN(4) #define NSC_ALIGN_END . = ALIGN(4)
#endif #endif
@ -31,11 +36,14 @@ __sg_size = __sg_end - __sg_start;
NSC_ALIGN_END; NSC_ALIGN_END;
__nsc_size = . - __sg_start; __nsc_size = . - __sg_start;
/* nRF-specific ASSERT. */
#ifdef CONFIG_CPU_HAS_NRF_IDAU #ifdef CONFIG_CPU_HAS_NRF_IDAU
ASSERT(1 << LOG2CEIL(0x8000 - (__sg_start % 0x8000)) #define NRF_SG_START (__sg_start % CONFIG_NRF_SPU_FLASH_REGION_SIZE)
== (0x8000 - (__sg_start % 0x8000)) #define NRF_SG_SIZE (CONFIG_NRF_SPU_FLASH_REGION_SIZE - NRF_SG_START)
&& (0x8000 - (__sg_start % 0x8000)) >= 32 ASSERT((__sg_size == 0)
&& (0x8000 - (__sg_start % 0x8000)) <= 4096, || (((1 << LOG2CEIL(NRF_SG_SIZE)) == NRF_SG_SIZE) /* Pow of 2 */
&& (NRF_SG_SIZE >= 32)
&& (NRF_SG_SIZE <= 4096)),
"The Non-Secure Callable region size must be a power of 2 \ "The Non-Secure Callable region size must be a power of 2 \
between 32 and 4096 bytes.") between 32 and 4096 bytes.")
#endif #endif