arch: arm: tz: secure_entry_functions: Add support for nRF53
The nRF53 has different region size than nRF91. This patch is aware of Erratum 19 (wrong SPU region size). Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
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1 changed files with 20 additions and 12 deletions
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@ -4,18 +4,23 @@
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* nRF-specific defines. */
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#ifdef CONFIG_CPU_HAS_NRF_IDAU
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/* This SOC needs the NSC region to be at the end of an SPU region. */
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#define NSC_ALIGN \
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. = ALIGN(CONFIG_NRF_SPU_FLASH_REGION_SIZE) \
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- (1 << LOG2CEIL(__sg_size))
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#define NSC_ALIGN_END . = ALIGN(CONFIG_NRF_SPU_FLASH_REGION_SIZE)
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#endif /* CONFIG_CPU_HAS_NRF_IDAU */
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#if CONFIG_ARM_NSC_REGION_BASE_ADDRESS != 0
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#define NSC_ALIGN . = ABSOLUTE(CONFIG_ARM_NSC_REGION_BASE_ADDRESS)
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#elif defined(CONFIG_CPU_HAS_NRF_IDAU)
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/* The nRF9160 needs the NSC region to be at the end of a 32 kB region. */
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#define NSC_ALIGN . = ALIGN(0x8000) - (1 << LOG2CEIL(__sg_size))
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#else
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#elif !defined(NSC_ALIGN)
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#define NSC_ALIGN . = ALIGN(4)
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#endif
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#endif /* CONFIG_ARM_NSC_REGION_BASE_ADDRESS */
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#ifdef CONFIG_CPU_HAS_NRF_IDAU
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#define NSC_ALIGN_END . = ALIGN(0x8000)
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#else
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#ifndef NSC_ALIGN_END
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#define NSC_ALIGN_END . = ALIGN(4)
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#endif
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@ -31,11 +36,14 @@ __sg_size = __sg_end - __sg_start;
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NSC_ALIGN_END;
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__nsc_size = . - __sg_start;
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/* nRF-specific ASSERT. */
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#ifdef CONFIG_CPU_HAS_NRF_IDAU
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ASSERT(1 << LOG2CEIL(0x8000 - (__sg_start % 0x8000))
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== (0x8000 - (__sg_start % 0x8000))
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&& (0x8000 - (__sg_start % 0x8000)) >= 32
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&& (0x8000 - (__sg_start % 0x8000)) <= 4096,
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#define NRF_SG_START (__sg_start % CONFIG_NRF_SPU_FLASH_REGION_SIZE)
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#define NRF_SG_SIZE (CONFIG_NRF_SPU_FLASH_REGION_SIZE - NRF_SG_START)
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ASSERT((__sg_size == 0)
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|| (((1 << LOG2CEIL(NRF_SG_SIZE)) == NRF_SG_SIZE) /* Pow of 2 */
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&& (NRF_SG_SIZE >= 32)
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&& (NRF_SG_SIZE <= 4096)),
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"The Non-Secure Callable region size must be a power of 2 \
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between 32 and 4096 bytes.")
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#endif
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