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Fix UART on Quark platform

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UART on Quark platfor, according to Quark BSP Programmer's
Reference Manual, is located in the following order on PCI bus:
COM2 BAR0: 16550 registers
     BAR1: DMA registers
COM1 BAR0: 16550 registers
     BAR1: DMA registers

So, the driver on Quark platform has to specify BAR (Base
Address Registers) number, the pci_bus_scan() function looks for.

As long as UART is a concole device, calling pci_show() during
it's initialization does not make any output.

Change-Id: I2261fbcc8f9e3ebc22d5307fdcbb18cb649c1224
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
This commit is contained in:
Dmitriy Korovkin 2015-05-25 17:35:58 -04:00 • committed by Anas Nashif
commit c3c75902fe
2 changed files with 7 additions and 6 deletions
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5
arch/x86/quark/board.h
View file

@ -82,10 +82,8 @@ the 'Quark' BSP.
/* serial port (aka COM port) information */ /* serial port (aka COM port) information */
#define COM1_BAUD_RATE 115200 #define COM1_BAUD_RATE 115200
#define COM1_PCI_IDX 2
#define COM2_BAUD_RATE 115200 #define COM2_BAUD_RATE 115200
#define COM2_PCI_IDX 0
#define COM2_INT_LVL 0x11 /* COM2 connected to IRQ17 */ #define COM2_INT_LVL 0x11 /* COM2 connected to IRQ17 */
#define UART_REG_ADDR_INTERVAL 4 /* address diff of adjacent regs. */ #define UART_REG_ADDR_INTERVAL 4 /* address diff of adjacent regs. */
@ -98,6 +96,7 @@ the 'Quark' BSP.
/* Generic definitions */ /* Generic definitions */
#define CONFIG_UART_PCI_VENDOR_ID 0x8086 #define CONFIG_UART_PCI_VENDOR_ID 0x8086
#define CONFIG_UART_PCI_DEVICE_ID 0x0936 #define CONFIG_UART_PCI_DEVICE_ID 0x0936
#define CONFIG_UART_PCI_BAR 0
#define CONFIG_UART_NUM_SYSTEM_PORTS 2 #define CONFIG_UART_NUM_SYSTEM_PORTS 2
#define CONFIG_UART_NUM_EXTRA_PORTS 0 #define CONFIG_UART_NUM_EXTRA_PORTS 0
#define CONFIG_UART_BAUDRATE COM1_BAUD_RATE #define CONFIG_UART_BAUDRATE COM1_BAUD_RATE
@ -105,7 +104,7 @@ the 'Quark' BSP.
(CONFIG_UART_NUM_SYSTEM_PORTS + CONFIG_UART_NUM_EXTRA_PORTS) (CONFIG_UART_NUM_SYSTEM_PORTS + CONFIG_UART_NUM_EXTRA_PORTS)
/* Console definitions */ /* Console definitions */
#define CONFIG_UART_CONSOLE_INDEX 0 #define CONFIG_UART_CONSOLE_INDEX 1
#define CONFIG_UART_CONSOLE_PCI_IDX COM1_PCI_IDX #define CONFIG_UART_CONSOLE_PCI_IDX COM1_PCI_IDX
/* /*

8
drivers/serial/ns16550.c
View file

@ -249,10 +249,15 @@ static struct ns16550 uart[CONFIG_UART_NUM_SYSTEM_PORTS] = {};
static inline void ns16550_uart_init() static inline void ns16550_uart_init()
{ {
/*
* This device information is specific to Quark UART
* for another device it may need to be changed
*/
struct pci_dev_info dev_info = { struct pci_dev_info dev_info = {
.class = PCI_CLASS_COMM_CTLR, .class = PCI_CLASS_COMM_CTLR,
.vendor_id = CONFIG_UART_PCI_VENDOR_ID, .vendor_id = CONFIG_UART_PCI_VENDOR_ID,
.device_id = CONFIG_UART_PCI_DEVICE_ID, .device_id = CONFIG_UART_PCI_DEVICE_ID,
.bar = CONFIG_UART_PCI_BAR,
}; };
int i; int i;
@ -265,9 +270,6 @@ static inline void ns16550_uart_init()
i < CONFIG_UART_NUM_SYSTEM_PORTS; i++) { i < CONFIG_UART_NUM_SYSTEM_PORTS; i++) {
uart[i].port = dev_info.addr; uart[i].port = dev_info.addr;
uart[i].irq = dev_info.irq; uart[i].irq = dev_info.irq;
#ifdef PCI_DEBUG
pci_show(&dev_info);
#endif /* PCI_DEBUG */
} }
} }