boards: add secondary lpuart pinmux for all boards with lpuart present

Add pinmux settings for a second LPUART peripheral for all boards where
one is present on the SOC and pins are exposed to use the uart.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>

boards/arm/frdm_k82f/frdm_k82f-pinctrl.dtsi

@@ -1,6 +1,6 @@
 /*
- * NOTE: Autogenerated file by kinetis_signal2dts.py
+ * NOTE: Autogenerated file by kinetis_cfg_utils.py
- *       for MK82FN256VLL15/signal_configuration.xml
+ * for MK82FN256VLL15/signal_configuration.xml
  *
  * Copyright (c) 2022, NXP
  * SPDX-License-Identifier: Apache-2.0
@@ -49,6 +49,15 @@
 		};
 	};
 
+	lpuart0_default: lpuart0_default {
+		group0 {
+			pinmux = <LPUART0_RX_PTB16>,
+				<LPUART0_TX_PTB17>;
+			drive-strength = "low";
+			slew-rate = "fast";
+		};
+	};
+
 	lpuart4_default: lpuart4_default {
 		group0 {
 			pinmux = <LPUART4_RX_PTC14>,

boards/arm/frdm_k82f/frdm_k82f.dts

@@ -188,6 +188,11 @@
 	current-speed = <115200>;
 };
 
+&lpuart0 {
+	pinctrl-0 = <&lpuart0_default>;
+	pinctrl-names = "default";
+};
+
 &ftm3 {
 	status = "okay";
 	compatible = "nxp,kinetis-ftm-pwm";

boards/arm/mimxrt1024_evk/mimxrt1024_evk.dts

@@ -104,6 +104,12 @@
 	pinctrl-names = "default", "sleep";
 };
 
+&lpuart2 {
+	pinctrl-0 = <&pinmux_lpuart2>;
+	pinctrl-1 = <&pinmux_lpuart2_sleep>;
+	pinctrl-names = "default", "sleep";
+};
+
 &flexcan1 {
 	status = "okay";
 	bus-speed = <125000>;

boards/arm/mimxrt1160_evk/mimxrt1160_evk.dtsi

@@ -45,6 +45,12 @@
 	pinctrl-names = "default", "sleep";
 };
 
+&lpuart2 {
+	pinctrl-0 = <&pinmux_lpuart2>;
+	pinctrl-1 = <&pinmux_lpuart2_sleep>;
+	pinctrl-names = "default", "sleep";
+};
+
 &user_button {
 	status = "okay";
 };

boards/arm/mimxrt1170_evk/mimxrt1170_evk.dtsi

@@ -65,6 +65,12 @@
 	current-speed = <115200>;
 };
 
+&lpuart2 {
+	pinctrl-0 = <&pinmux_lpuart2>;
+	pinctrl-1 = <&pinmux_lpuart2_sleep>;
+	pinctrl-names = "default", "sleep";
+};
+
 &user_button {
 	status = "okay";
 };